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2014-02-06ARM: sunxi: dt: Convert to the new net compatiblesMaxime Ripard1-2/+2
Switch the device tree to the new compatibles introduced in the ethernet and mdio drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-01-23Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-12/+210
Pull ARM SoC DT updates from Olof Johansson: "DT and DT-conversion-related changes for various ARM platforms. Most of these are to enable various devices on various boards, etc, and not necessarily worth enumerating. New boards and systems continue to come in as new devicetree files that don't require corresponding C changes any more, which is indicating that the system is starting to work fairly well. A few things worth pointing out: * ST Ericsson ux500 platforms have made the major push to move over to fully support the platform with DT * Renesas platforms continue their conversion over from legacy platform devices to DT-based for hardware description" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (327 commits) ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6 ARM: dts: sirf: add lost minigpsrtc device node ARM: dts: sirf: add clock, frequence-voltage table for CPU0 ARM: dts: sirf: add lost bus_width, clock and status for sdhci ARM: dts: sirf: add lost clocks for cphifbg ARM: dts: socfpga: add pl330 clock ARM: dts: socfpga: update L2 tag and data latency arm: sun7i: cubietruck: Enable the i2c controllers ARM: dts: add support for EXYNOS4412 based TINY4412 board ARM: dts: Add initial support for Arndale Octa board ARM: bcm2835: add USB controller to device tree ARM: dts: MSM8974: Add MMIO architected timer node ARM: dts: MSM8974: Add restart node ARM: dts: sun7i: external clock outputs ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style ARM: dts: sun7i: Add pin muxing options for clock outputs ARM: dts: sun7i: Add rtp controller node ARM: dts: sun5i: Add rtp controller node ARM: dts: sun4i: Add rtp controller node ...
2014-01-14Merge branch 'clockevents/3.14' of git://git.linaro.org/people/daniel.lezcano/linux into timers/coreIngo Molnar1-0/+10
Pull clocksource/clockevent updates from Daniel Lezcano: * Axel Lin removed an unused structure defining the ids for the bcm kona driver. * Ezequiel Garcia enabled the timer divider only when the 25MHz timer is not used for the armada 370 XP. * Jingoo Han removed a pointless platform data initialization for the sh_mtu and sh_mtu2. * Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt. * Linus Walleij added a useful warning in clk_of when no clocks are found while the old behavior was to silently hang at boot time. * Maxime Ripard added the high speed timer drivers for the Allwinner SoCs (A10, A13, A20). He increased the rating, shared the irq across all available cpus and fixed the clockevent's irq initialization for the sun4i. * Michael Opdenacker removed the usage of the IRQF_DISABLED for the all the timers driver located in drivers/clocksource. * Stephen Boyd switched to sched_clock_register for the arm_global_timer, cadence_ttc, sun4i and orion timers. Conflicts: drivers/clocksource/clksrc-of.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-01-02ARM: dts: sun7i: external clock outputsChen-Yu Tsai1-0/+28
This commit adds the two external clock outputs available on A20 to its device tree. A dummy fixed factor clock is also added to serve as the first input of the clock outputs, which according to AW's A20 user manual, is the 24MHz oscillator divided by 750. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-02ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N styleChen-Yu Tsai1-1/+2
Device tree naming conventions state that node names should match the nodes function. Change external low speed oscillator node name to match. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-02ARM: dts: sun7i: Add pin muxing options for clock outputsChen-Yu Tsai1-0/+14
This patch adds the clock output pin options on the A20. The 2 pins can output a configurable clock to be used by external modules. This is used on the CubieTruck, to supply a 32768 Hz low power clock to the onboard Wifi+BT module. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-01ARM: dts: sun7i: Add rtp controller nodeHans de Goede1-0/+6
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-29Merge tag 'sunxi-clk-3.14-for-maxime' of https://bitbucket.org/emiliolopez/linux into sunxi/dt-for-3.14Maxime Ripard1-11/+150
Allwinner sunXi SoCs DT changes for clocks This contains the DT parts of the "[PATCH v3 00/13] clk: sunxi: add PLL5 and PLL6 support" series. It adds DT nodes for PLL4/5/6 and mod0 clocks on most sunxi platforms.
2013-12-28ARM: sunxi: dt: add nodes for the mbus clockEmilio López1-0/+8
mbus is the memory bus clock, and it is present on both sun5i and sun7i machines. Its register layout is compatible with the mod0 one. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-28ARM: sun7i: dt: mod0 clocksEmilio López1-0/+120
This commit adds all the mod0 clocks available on A20 to its device tree. This list was created by looking at AW's code release. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-28ARM: sunxi: add PLL5 and PLL6 supportEmilio López1-12/+16
This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i device trees. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-28ARM: sunxi: add PLL4 supportEmilio López1-0/+7
This commit adds the PLL4 definition to the sun4i, sun5i and sun7i device trees. PLL4 is compatible with PLL1. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-11ARM: sun7i: dt: Fix interrupt trigger typesMaxime Ripard1-21/+21
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A20 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org #3.12+ Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-11ARM: sun7i: a20: Add support for the High Speed TimersMaxime Ripard1-0/+10
The Allwinner A20 has support for four high speed timers. Apart for the number of timers (4 vs 2), it's basically the same logic than the high speed timers found in the sun5i chips. Now that we have a driver to support it, we can enable them in the device tree. [dlezcano] : Fixed conflict with 428abbb8 "Enable the I2C controllers" Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-11-22ARM: sunxi: dt: add EMAC aliasesEmilio López1-0/+4
U-Boot uses the ethernet0 alias to locate the right node to fill in the MAC address of the first ethernet interface. This patch adds the alias on all the sunxi SoCs with EMAC. In this way, people using ethernet in U-Boot (eg, for tftp) can keep a consistent address on both U-Boot and Linux with no additional effort. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-11-22ARM: dts: sun4i/sun7i: add RTC nodeCarlo Caione1-0/+6
Add the RTC node to DTS for Allwinner A10 and Allwinner A20. Signed-off-by: Carlo Caione <carlo.caione@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-18ARM: sun7i: Add the pin muxing options for the I2C controllersMaxime Ripard1-0/+21
The A20 boards we currently have share the same pins for the i2c controllers they share. Add them to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-18ARM: sun7i: Enable the I2C controllersMaxime Ripard1-0/+45
The Allwinner A20 shares the same I2C controller than the one that could be found on earlier SoCs from Allwinner. There is only a few more of these controllers. Add all of them in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-16ARM: sunxi: dt: Add sunxi-sid to dts for sun4i, sun5i and sun7iOliver Schinagl1-0/+5
This patch shall add support for the sunxi-sid driver to the device tree for A10, A10s, A13 and A20. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-12ARM: dts: sun7i: Add the muxing options for the EMACMaxime Ripard1-0/+11
The A20 has several muxing options for the EMAC. Yet, the currently supported boards only use one set of them. Add that pin set to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-09-12ARM: dts: sun7i: Enable the Ethernet in the A20Maxime Ripard1-0/+16
The Allwinner A20 SoC also have the EMAC found on the A10 and A10s. Enable the support for it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-26ARM: sun7i: Enable the A20 clocks in the DTSIMaxime Ripard1-10/+116
Now that the clock driver knows about the available clocks found on the A20, we can build up the clock tree from the device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22ARM: sun7i: DT: Add UART muxing options to the DTSIMaxime Ripard1-0/+21
The UARTs on the A20 can be muxed to several pins. Add a few options to the DTSI so that we can start using them in the boards' DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22ARM: sun7i: Add the PIO controller node to the DTSIMaxime Ripard1-0/+12
The PIO controller is responsible for the GPIO/muxing/external interrupts handling. Now that we have support for the A20 pin set in the pinctrl driver, we can start using it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-20ARM: sun7i: Add Allwinner A20 DTSIMaxime Ripard1-0/+172
The Allwinner A20 SoC is based on 2 Cortex A7, an ARM Mali GPU, and is built to be pin-compatible with the older Allwinner A10. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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