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2014-02-19ARM: tegra: enable LCD panel on VentanaStephen Warren1-3/+36
Ventana uses a CLAA101WA01A LCD panel. Enable the relevant display controller, backlight, and regulators. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-18ARM: tegra: set up /aliases entries for RTCsStephen Warren1-0/+5
This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl definesLaxman Dewangan1-22/+22
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra20 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: convert device tree files to use key definesLaxman Dewangan1-1/+2
Use key code macros for all key code refernced for keys. For tegra20-seaboard.dts and tegra20-harmony.dts: The key comment for key (16th row and 1st column) is KEY_KPSLASH but code is 0x004e which is the key code for KEY_KPPLUS. As there other key exist with KY_KPPLUS, I am assuming key code is wrong and comment is fine. With this assumption, I am keeping the key code as KEY_KPSLASH. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: add missing unit addresses to DTStephen Warren1-5/+5
DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12ARM: tegra: enable LP1 suspend modeJoseph Lo1-1/+1
Enabling the LP1 suspend mode for Tegra devices. Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra20: convert device tree files to use CLK definesHiroshi Doyu1-1/+3
Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra: convert device tree files to use IRQ definesStephen Warren1-3/+3
Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra: convert device tree files to use GPIO definesStephen Warren1-18/+23
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra: use #include for all device treesStephen Warren1-1/+1
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17ARM: tegra: update device trees for USB binding reworkVenu Byravarasu1-0/+9
This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17ARM: tegra: modify ULPI reset GPIO propertiesVenu Byravarasu1-5/+5
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active low nature of the GPIO. 2. Placed USB PHY DT node immediately below the EHCI controller DT nodes and corrected reg value in the name of USB PHY DT node. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04clk: tegra: Fix cdev1 and cdev2 IDsPrashant Gaikwad1-1/+1
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04ARM: dts: tegra: add the PM configurations of PMCJoseph Lo1-0/+6
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04ARM: tegra: add non-removable and keep-power-in-suspend property for MMCJoseph Lo1-0/+2
This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04ARM: tegra: add power gpio keys to DTJoseph Lo1-0/+11
This adds the power gpio key to DT and enable the wakeup of the gpio key for the device. The Seaboard and paz00 already had the power gpio key binding and the power key of Whistler was on KBC. So these boards' device tree didn't include in this patch. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04ARM: tegra: add clocks property to sound nodesStephen Warren1-0/+3
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03ARM: tegra: add clock source of PMC to device treesJoseph Lo1-0/+13
Adding the bindings of the clock source of PMC in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc hostJoseph Lo1-1/+1
The GPIO pin of SD slot card detection should active low. Signed-off-by: Joseph Lo <josephl@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-05Merge tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dtOlof Johansson1-6/+17
From Stephen Warren: ARM: tegra: device tree updates Numerous updates to the various Tegra device trees are made: * Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris carrier boards. * Enablement of the HDMI connector on most boards. * Enablement of the keyboard controller on a few boards. * Addition of the AC'97 controller to Tegra20. * Addition of a GPIO poweroff node for TrimSlice. * Changes to support the new "high speed UART" (DMA-capable) driver for Tegra serial ports, and enablement for Cardhu's UART C. * A few cleanups, such as compatible flag fixes, node renames, node ordering fixes, commonizing properties into SoC .dtsi files, etc.. This pull request is based on (most of) the previous pull request with tag tegra-for-3.9-soc-t114. * tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (22 commits) ARM: dt: tegra30: Rename "smmu" to "iommu" ARM: dt: tegra20: Rename "gart" to "iommu" ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM ARM: tegra: Add Colibri T20 512MB COM device tree ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi ARM: tegra: harmony: enable keyboard in DT ARM: tegra: whistler: enable keyboard in DT ARM: tegra: cardhu: register UARTC ARM: tegra: seaboard: enable keyboard in DT ARM: tegra: add DT entry for KBC controller ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT ASoC: tegra: add ac97 host controller to device tree ARM: DT: tegra: Add Tegra30 Beaver board support ARM: DT: tegra: Add board level compatible properties ARM: tegra: paz00: enable HDMI port ARM: tegra: ventana: enable HDMI port ARM: tegra: seaboard: enable HDMI port ARM: tegra: trimslice: add gpio-poweroff node to DT ARM: DT: tegra: Unify the description of Tegra20 boards ...
2013-01-28ARM: tegra: Add reset GPIO information to PHY DT nodeVenu Byravarasu1-0/+4
As reset GPIO information is PHY specific detail, adding it to PHY DT node. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsiLucas Stach1-1/+0
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28ARM: tegra: ventana: enable HDMI portStephen Warren1-4/+16
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28ARM: DT: tegra: Unify the description of Tegra20 boardsBryan Wu1-1/+1
Use engineering name 'Tegra20' instead of 'Tegra2' Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: ventana: Add NCT1008 temperature sensorThierry Reding1-0/+5
The Harmony board has an ON Semiconductors NCT1008 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: tegra: ventana: define pinmux for ddcMark Zhang1-6/+63
Tegra 2's I2C2 controller can be routed to either the PTA or DDC pin group on Ventana. So: - Remove the HDMI function definition of pta pingroup - Define child i2c adapters(ddc & pta) for I2C2 controller Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 ventana: set pinmux and power for wlanWei Ni1-0/+16
Configure pinmux as required for WiFi. Enable the SDHCI1 controller, which is connectted to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: update *.dts for regulator-compatible deprecationStephen Warren1-45/+14
Commit 13511de "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-09-11ARM: dt: tegra: configure power off for some boardsStephen Warren1-0/+2
For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: dt: tegra: ventana: add regulatorsStephen Warren1-0/+204
Ventana uses a TPS6586x regulator. Instantiate this, and hook up a couple of fixed GPIO-controlled regulators too. The data was chosen to match the PMIC HW defaults, with the following exception: ldo6: The HW default is 2.85v. The schematics are unlabelled. Internal research indicates that 1.8v is correct. Our downstream kernel also uses 1.8v. Portions based on work by Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-20ARM: dt: tegra: rename board files to match SoCStephen Warren1-0/+343
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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