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2021-06-07ARM: dts: aspeed: everest: Add vrm and other indicator ledsVishwanatha Subbanna1-0/+270
This commit adds indicator leds for vrms, processors, opencapi connectors, tpm, planar, power distribution card and dasd backplane and are driven by PIC16F882. Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210607031259.475020-6-joel@jms.id.au
2021-06-07ARM: dts: aspeed: everest: Add dimm indicator ledsVishwanatha Subbanna1-0/+552
These are dimm indicator leds driven by PIC16F882. Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210607031259.475020-5-joel@jms.id.au
2021-06-07ARM: dts: aspeed: everest: Add pcie slot indicator ledsVishwanatha Subbanna1-0/+123
These are pcie slot indicator leds driven by PCA9552. Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210607031259.475020-4-joel@jms.id.au
2021-06-07ARM: dts: aspeed: everest: Add nvme and fan indicator ledsVishwanatha Subbanna1-0/+132
These are the indicator leds for nvme slots and fans and are driven by PCA9552. Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210607031259.475020-3-joel@jms.id.au
2021-06-07ARM: dts: aspeed: everest: Add system level indicator ledsVishwanatha Subbanna1-0/+42
These are the system level indicator leds that are driven by PCA9551 connected to the Operator Panel. Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210607031259.475020-2-joel@jms.id.au
2021-06-04ARM: dts: keystone: k2g-evm: Move audio oscillator assigned clock to mcaspNishanth Menon1-8/+3
Setting assigned clock with a dependency on itself for k2g_clks creates a circular dependency. Instead, Lets model the audio clock as a assigned-clock configuration for mcasp and set it up as the first clock assigned-clock to be satisfied. Following the standard convention, we use null entries to indicate entries that doesn't need to be programmed. Reviewed-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-06-04ARM: dts: keystone: k2g: Rename the TI-SCI clocks node nameNishanth Menon1-1/+1
We currently use clocks as the node name for the node representing TI-SCI clock nodes. This is better renamed to being clock-controller as that is a better representative of the system controller function as a clock controller for the SoC. Reviewed-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-06-04ARM: dts: keystone: k2g: Rename the TI-SCI nodeNishanth Menon1-1/+1
Lets rename the node name of TI-SCI node to be system-controller as it is a better standardized name for the function that TI-SCI plays in the SoC. Reviewed-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-06-04ARM: dts: keystone: k2g: Rename message-manager nodeNishanth Menon1-1/+1
Rename message-manager instance node name to be better aligned with current style of device tree nodes for mailboxes. Reviewed-by: Tero Kristo <kristo@kernel.org> Acked-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-06-04ARM: dts: BCM5301X: Fixup SPI bindingRafał Miłecki1-9/+9
1. Reorder interrupts 2. Fix typo: s/spi_lr_overhead/spi_lr_overread/ 3. Rename node: s/spi-nor@0/flash@0/ This fixes: arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: spi@18029200: interrupt-names: 'oneOf' conditional failed, one must be fixed: ['spi_lr_fullness_reached', 'spi_lr_session_aborted', 'spi_lr_impatient', 'spi_lr_session_done', 'spi_lr_overhead', 'mspi_done', 'mspi_halted'] is too long Additional items are not allowed ('spi_lr_session_aborted', 'spi_lr_impatient', 'spi_lr_session_done', 'spi_lr_overhead', 'mspi_done', 'mspi_halted' were unexpected) 'mspi_done' was expected 'spi_l1_intr' was expected 'mspi_halted' was expected 'spi_lr_fullness_reached' was expected 'spi_lr_session_aborted' was expected 'spi_lr_impatient' was expected 'spi_lr_session_done' was expected 'spi_lr_overread' was expected From schema: Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: spi-nor@0: $nodename:0: 'spi-nor@0' does not match '^flash(@.*)?$' From schema: Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-06-04ARM: dts: imx53-ppd: add dma-info nodesFabien Lahoudere1-0/+2
GEHC CS ONE (codename is PPD), has multiple microcontrollers connected via UART controlling. UART2 is connected to an on-board microcontroller at 19200 baud, which constantly pushes critical data (so aging character detect interrupt will never trigger). This data must be processed at 50-200 Hz, so UART should return data in less than 5-20ms. With 1024 byte DMA buffer (and a constant data stream) the read operation instead needs 1024 byte / 19200 baud = 53.333ms, which is way too long (note: Worst case would be remote processor sending data with short pauses <= 7 characters, which would further increase this number). The current downstream kernel instead configures 24 bytes resulting in 1.25ms, but that is obviously not sensible for normal UART use cases and cannot be used as new default. The same device also has another microcontroller with a 4M baud connected to UART5 exchanging lots of data. For this the same mechanism can be used to increase the buffer size (downstream uses 4K instead of the default 1K) with potentially slightly reduced buffer count. At this baud rate latency is not an issue (4096 byte / 4M baud = 0.977 ms). Before increasing the default buffer count from 4 to 16 in 76c38d30fee7, this was required to avoid data loss. With the changed default it's a performance optimization. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> [replace commit message] Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20210430175038.103226-3-sebastian.reichel@collabora.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-06-04ARM: dts: aspeed-g5: Add SCU phandle to GFX nodeJoel Stanley1-0/+1
In v5.13 the DRM driver gained support for using a phandle to the SCU, instead of matching on the scu compatible. Link: https://lore.kernel.org/r/20210603064536.165297-1-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-04ARM: dts: aspeed: Everest: Add directly controlled LEDsVishwanatha Subbanna1-2/+31
These LEDs are directly connected to the BMC's GPIO bank Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-04ARM: dts: aspeed: Rainier 4U: Remove fan updatesEddie James1-30/+0
The 4U fans do not need a different "tach-pulses" property than the 2U machine. In addition, the "maxim,fan-dual-tach" property does not exist upstream yet, so it should also be removed. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-04ARM: dts: aspeed: Everest: Fix cable card PCA chipsSantosh Puranik1-85/+83
Correct two PCA chips which were placed on the wrong I2C bus and address. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Santosh Puranik <santosh.puranik@in.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-03ARM: dts: rockchip: remove #phy-cells from usbphy node rk3066/rk3188Johan Jonker2-2/+0
The review process of rockchip-usb-phy.yaml was not finished when the patch in the link below was already applied. Remove the unneeded #phy-cells property. https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Fixes: 6e4e4e2a2558 ("ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188") Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210603121010.4315-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-06-03ARM: dts: rockchip: rename nodename for phy-rockchip-inno-usb2Johan Jonker2-3/+3
The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$" in phy-provider.yaml has required "#phy-cells" for phy nodes. The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes. Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent notifications. make ARCH=arm dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ phy/phy-provider.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210601164800.7670-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-06-03ARM: dts: aspeed: Grow u-boot partition 64MiB OpenBMC flash layoutTroy Lee2-40/+10
Aspeed AST2600 u-boot requires 600KiB+ flash space. Sharing the same openbmc-flash-layout-64.dtsi requires to resize the flash partition. The updated flash layout as follows: - u-boot: 896 KiB - u-boot-env: 128 KiB - kernel: 9MiB - rofs: 32 MiB - rwfs: 22 MiB Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210316085932.2601-1-troy_lee@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-03ARM: dts: aspeed: mtjade: switch to 64MB flash layoutQuan Nguyen1-1/+1
As the 32MB flash layout will soon be exhausted, switch to 64MB layout. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Phong Vo <phong@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Link: https://lore.kernel.org/r/20210517040036.13667-4-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-03ARM: dts: aspeed: mtjade: Add PSU supportQuan Nguyen1-2/+40
Enable PSU support on Ampere's Mt. Jade BMC. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Phong Vo <phong@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Link: https://lore.kernel.org/r/20210517040036.13667-3-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-03ARM: dts: aspeed: mtjade: Enable OCP card support via NC-SIQuan Nguyen1-1/+12
Enable OCP card support on Ampere's Mt. Jade BMC. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Phong Vo <phong@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Link: https://lore.kernel.org/r/20210517040036.13667-2-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-03ARM: dts: aspeed: Set earlycon boot argumentJoel Stanley29-29/+29
Most of the aspeed boards have copied the 'earlyprink' string in the bootargs. However, there's no earlyprink driver configured in the defconfigs, so this does nothing. A combination of setting stdout in the chosen node and adding earlycon to bootargs causes early serial output to appear early. This changes all boards to use this option. The console=ttyS4,115200 option is still required, as this is used by the run time uart driver. Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Alexander Filippov <a.filippov@yadro.com> Link: https://lore.kernel.org/r/20210526051220.136432-1-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-03ARM: dts: aspeed-g6: Add pinctrl settingsSteven Lee1-0/+10
AST2600 supports 2 SGPIO master interfaces and 2 SGPIO slave interfaces. Currently, only SGPIO master 1 and SGPIO slve 1 in the pinctrl dtsi. SGPIO master 2 and slave 2 should be added in pinctrl dtsi as well. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210525055308.31069-3-steven_lee@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-02ARM: dts: at91: sama5d4: fix pinctrl muxingLudovic Desroches1-1/+1
Fix pinctrl muxing, PD28, PD29 and PD31 can be muxed to peripheral A. It allows to use SCK0, SCK1 and SPI0_NPCS2 signals. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Fixes: 679f8d92bb01 ("ARM: at91/dt: sama5d4: add pioD pin mux mask and enable pioD") Cc: stable@vger.kernel.org # v4.4+ Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191025084210.14726-1-ludovic.desroches@microchip.com
2021-06-01ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warningsAlexandre Torgue3-20/+0
Prevent warning seen with "make dtbs_check W=1" command: Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary address-cells/size-cells without "ranges" or child "reg" property Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: fix RCC node name on stm32f429 MCUAlexandre Torgue1-1/+1
This prevent warning observed with "make dtbs_check W=1" Warning (simple_bus_reg): /soc/rcc@40023810: simple-bus unit address format error, expected "40023800" Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: fix gpio-keys node on STM32 MCU boardsAlexandre Torgue5-21/+11
Fix following warning observed with "make dtbs_check W=1" command. It concerns f429 eval and disco boards, f769 disco board. Warning (unit_address_vs_reg): /gpio_keys/button@0: node has a unit name, but no reg or ranges property Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: fix stm32mp157c-odyssey card detect pinGrzegorz Szymaszek1-1/+1
The microSD card detect pin is physically connected to the MPU pin PI3. The Device Tree configuration of the card detect pin was wrong—it was set to pin PB7 instead. If such configuration was used, the kernel would hang on “Waiting for root device” when booting from a microSD card. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151Patrice Chotard1-2/+2
Configure qspi's mdma from buffer transfer (max 128 bytes) to block transfer (max 64K bytes). mtd_speedtest shows that write throughtput increases : - from 734 to 782 KiB/s (~6.5%) with s25fl512s SPI-NOR. - from 4848 to 5319 KiB/s (~9.72%) with Micron SPI-NAND. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: Fix touchscreen node on dhcom-pdk2Marek Vasut1-2/+2
Fix make dtbs_check warning: arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml:0:0: /soc/i2c@40015000/polytouch@38: failed to match any schema with compatible: ['edt,edt-ft5x06'] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: Remove extra size-cells on dhcom-pdk2Marek Vasut1-2/+0
Fix make dtbs_check warning: arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml: gpio-keys-polled: '#address-cells' is a dependency of '#size-cells' arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml: gpio-keys: '#address-cells' is a dependency of '#size-cells' Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-05-31ARM: dts: qcom: Enable NAND + USB for RB3011Jonathan McDowell1-0/+58
Enable the NAND + USB devices for the MikroTik RB3011 platform now they're in the main IPQ806x DT. Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/1e5c89ba0d2491ca374f10e0446e21d0e42afd34.1621531633.git.noodles@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31ARM: dts: qcom: add L2CC and RPM for IPQ8064Jonathan McDowell1-0/+29
This adds the L2CC IPC resource and RPM devices to the IPQ8064 device tree. Tested on a Mikrotik RB3011. Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/a99eb2a27214b8f41070d7f1faec591e35666b21.1621531633.git.noodles@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31ARM: dts: qcom: Add USB port definitions to ipq806xJonathan McDowell1-0/+88
Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/ad2121defc539abdb339b23eef80a8930b5f086e.1621531633.git.noodles@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31ARM: dts: qcom: Add tsens details to ipq806xJonathan McDowell1-0/+241
Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/f7ebf47ca9e7e973e696e6b9b4fff3a2ac5da40d.1621531633.git.noodles@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31ARM: dts: qcom: Add ADM DMA + NAND definitions to ipq806xJonathan McDowell1-0/+67
Now the ADM driver is in mainline add the appropriate definitions for it and the NAND controller to get NAND working on IPQ806x platforms, Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/17f88a26860f5976ad08dd3c12ea079ba474b6fd.1621531633.git.noodles@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31ARM: dts: exynos: Disable unused camera input for I9100Timon Baetz1-2/+4
As the back camera is not implemented disable the second pair of fimc child nodes as they are not functional. This prevents creating the associated /dev/videoX devices. Signed-off-by: Timon Baetz <timon.baetz@protonmail.com> Link: https://lore.kernel.org/r/20210530105535.4165-1-timon.baetz@protonmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-05-31ARM: dts: stm32: Rework LAN8710Ai PHY reset on DHCOM SoMMarek Vasut1-1/+7
The Microchip LAN8710Ai PHY requires XTAL1/CLKIN external clock to be enabled when the nRST is toggled according to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B page 35 section 3.8.5.1 Hardware Reset: " A Hardware reset is asserted by driving the nRST input pin low. When driven, nRST should be held low for the minimum time detailed in Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 59 to ensure a proper transceiver reset. During a Hardware reset, an external clock must be supplied to the XTAL1/CLKIN signal. " This is accidentally fulfilled in the current setup, where ETHCK_K is used to supply both PHY XTAL1/CLKIN and is also fed back through eth_clk_fb to supply ETHRX clock of the DWMAC. Hence, the DWMAC enables ETHRX clock, that has ETHCK_K as parent, so ETHCK_K clock are also enabled, and then the PHY reset toggles. However, this is not always the case, e.g. in case the PHY XTAL1/CLKIN clock are supplied by some other clock source than ETHCK_K or in case ETHRX clock are not supplied by ETHCK_K. In the later case, ETHCK_K would be kept disabled, while ETHRX clock would be enabled, so the PHY would not be receiving XTAL1/CLKIN clock and the reset would fail. Improve the DT by adding the PHY clock phandle into the PHY node, which then also requires moving the PHY reset GPIO specifier in the same place and that then also requires correct PHY reset GPIO timing, so add that too. A brief note regarding the timing, the datasheet says the reset should stay asserted for at least 100uS and software should wait at least 200nS after deassertion. Set both delays to 500uS which should be plenty. Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-05-31ARM: dts: sun8i: v3s: enable emac for zero DockAndreas Rehn1-4/+13
dwmac-sun8i supports v3s and Licheepi-zero Dock provides an ethernet port furthermore, align nodes in alphabetical order Signed-off-by: Andreas Rehn <rehn.andreas86@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210525173159.183415-1-rehn.andreas86@gmail.com
2021-05-31ARM: tegra: ouya: Enable memory frequency thermal throttling using ACTMONDmitry Osipenko1-1/+3
The ACTMON module monitors activity of memory clients and then devfreq driver makes decisions about a required memory frequency based on info from ACTMON. Add ACTMON device to the thermal zone of Ouya in order to use it as a cooling device which throttles memory freq on overheat. Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: nexus7: Enable memory frequency thermal throttling using ACTMONDmitry Osipenko1-1/+3
The ACTMON module monitors activity of memory clients and then devfreq driver makes decisions about a required memory frequency based on info from ACTMON. Add ACTMON device to the thermal zone of Nexus 7 in order to use it as a cooling device which throttles memory freq on overheat. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: Add cooling cells to ACTMON device-tree nodeDmitry Osipenko2-2/+4
The ACTMON module monitors activity of memory clients and decisions about a minimum required memory frequency are made based on info from ACTMON. Add cooling cells to ACTMON device-tree node in order to turn it into a cooling device that will throttle memory freq on overheat. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: nexus7: Correct 3v3 regulator GPIO of PM269 variantDmitry Osipenko1-1/+1
The 3v3 regulator GPIO is GP6 and not GP7, which is the DDR regulator. Both regulators are always-on, nevertheless the DT model needs to be corrected, fix it. Reported-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: nexus7: Remove monitored-battery propertyDmitry Osipenko1-1/+0
The bq27541 Linux kernel driver will try to reprogram controller based on the values from monitored-battery node, but it fails to do so because controller was locked by manufacturer. Still this is a very undesirable behaviour, hence let's remove the optional battery node. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: nexus7: Improve thermal zonesDmitry Osipenko1-9/+2
Remove unused thermal zone just to clean up device-tree and set critical temperature further apart from the passive cooling trip point since during or thermal testing of Asus Transformer devices we found that CPU could reach the critical temperature in a certain kernel configurations for a brief moment if critical trip point is set close to the passive trip point and then device will be immediately shut off without getting a chance to cool down using passive cooling. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: nexus7: Add i2c-thermtrip nodeDmitry Osipenko2-0/+18
Add i2c-thermtrip node which enables emergency shutdown by PMC on SoC die overheat detected by TSENSOR. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: paz00: Add CPU thermal zoneDmitry Osipenko1-2/+40
Add thermal zone with a passive cooling trip for CPU. Attach it to the LM90 sensor which monitors CPU temperature. Now CPU frequencies will be throttled once trip point is reached, preventing critical overheat. Tested-by: Agneli <poczt@protonmail.ch> Tested-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: wm8903: Fix polarity of headphones-detection GPIO in device-treesDmitry Osipenko8-8/+8
All Tegra boards which use WM8903 audio codec are specifying a wrong polarity for the headphones detection GPIO. The kernel driver hardcodes the polarity to active-low, which is the correct polarity, so we can fix the device-trees safely. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: Add reg property to Tegra20 EMC table device-tree nodesDmitry Osipenko2-0/+5
The reg property is now specified for the emc-tables nodes in the Tegra20 device-tree binding. Add reg property to the EMC table device-tree nodes of Tegra20 board device-trees in order to silence dt_binding_check warning about the missing property. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: acer-a500: Bump thermal trips by 10CDmitry Osipenko1-4/+4
It's possible to hit the temperature of the thermal zone in a very warm environment under a constant load, like watching a video using software decoding. It's even easier to hit the limit with a slightly overclocked CPU. Bump the temperature limit by 10C in order to improve user experience. Acer A500 has a large board and 10" display panel which are used for the heat dissipation, the SoC is placed far away from battery, hence we can safely bump the temperature limit. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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