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2021-03-18Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesArnd Bergmann1-0/+3
Fixes for omaps for v5.12-rc cycle Regression fixes for multiple issues found mostly caused by recent changes to drop legacy platform data and and starting to use the new prm driver reset controller: - Fix ocp interconnect bus access error reporting for omap_l3_noc by setting IRQF_NO_THREAD - Fix changed mmc slot order regression by adding mmc aliases for am335x - Fix dra7 reboot regression caused by invalid pcie reset map - Fix smartreflex init regression caused by dropped legacy data - Fix ti-sysc driver warning on unbind if reset is not deasserted - Fix flakey reset deassert for dra7 iva * tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva bus: ti-sysc: Fix warning on unbind if reset is not deasserted ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7 ARM: dts: am33xx: add aliases for mmc interfaces bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18ARM: dts: imx6ull: fix ubi filesystem mount faileddillon min1-0/+1
For NAND Ecc layout, there is a dependency from old kernel's nand driver setting and current. if old kernel use 4 bit ecc , we should use 4 bit in new kernel either. else will run into following error at filesystem mounting. So, enable fsl,use-minimum-ecc from device tree, to fix this mismatch [ 9.449265] ubi0: scanning is finished [ 9.463968] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading 22528 bytes from PEB 513:4096, read only 22528 bytes, retry [ 9.486940] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading 22528 bytes from PEB 513:4096, read only 22528 bytes, retry [ 9.509906] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading 22528 bytes from PEB 513:4096, read only 22528 bytes, retry [ 9.532845] ubi0 error: ubi_io_read: error -74 (ECC error) while reading 22528 bytes from PEB 513:4096, read 22528 bytes Fixes: f9ecf10cb88c ("ARM: dts: imx6ull: add MYiR MYS-6ULX SBC") Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independentlyFabio Estevam1-6/+16
The imx6ul-evk board designer took the bad decision to tie the two Ethernet PHY reset lines together. This prevents one Ethernet interface to work while the other one is brought down. For example: # ifconfig eth0 down # [ 279.386551] fec 2188000.ethernet eth1: Link is Down Bringing eth0 interface down also causes eth1 to be down. The Ethernet reset lines comes from the IO expander and both come in logic level 0 by default. To fix this issue, remove the Ethernet PHY reset descriptions from its respective PHY nodes and force both Ethernet PHY lines to be at logic level 1 via gpio-hog. Fixes: 2db7e78bf02b ("ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset") Reported-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx7d-mba7: Remove unsupported PCI propertiesFabio Estevam1-2/+0
disable-gpio' and 'power-on-gpio' are not valid properties according to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt. Remove the unsupported properties. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com> Reviewed-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cellsTim Harvey12-24/+0
Remove the unnecessary #address-cells/#size-cells to avoid warnings from W=1 build like this: arch/arm/boot/dts/imx6qdl-gw52xx.dtsi:33.12-78.4: Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Tim Harvey <tharvey@gateworks.com> [fabio: Make the warning messages more succint] Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warningsFabio Estevam1-4/+2
Remove the unnecessary #address-cells/#size-cells and rename the node names to fix the following W=1 dtc warnings: arch/arm/boot/dts/imx6dl-plybas.dts:26.13-30.5: Warning (unit_address_vs_reg): /gpio_keys/button@20: node has a unit name, but no reg or ranges property arch/arm/boot/dts/imx6dl-plybas.dts:32.13-36.5: Warning (unit_address_vs_reg): /gpio_keys/button@21: node has a unit name, but no reg or ranges property arch/arm/boot/dts/imx6dl-plybas.dts:20.12-37.4: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx: bx50v3: Define GPIO line namesIan Ray3-0/+15
Define GPIO line names for b450v3, b650v3, and b850v3. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx: bx50v3: i2c GPIOs are open drainSebastian Reichel1-6/+6
Explicitly mark I2C GPIOs as open drain to fix the following kernel message being printed: enforced open drain please flag it properly in DT/ACPI DSDT/board file Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6q-ba16: improve PHY informationSebastian Reichel1-0/+12
Add PHY voltage supply information fixing the following kernel message: 2188000.ethernet supply phy not found, using dummy regulator Also add PHY clock information to avoid depending on the bootloader programming correct values. The bootloader also sets some reserved registers in the PHY as advised by Qualcomm, which is not supported by the bindings/kernel driver, so the reset GPIO has not been added intentionally. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIOSebastian Reichel1-0/+9
Add VBUS regulator GPIO information, so that USB OTG port can also be used in host mode. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: ls1021a: mark crypto engine dma coherentHoria Geantă1-0/+1
Crypto engine (CAAM) on LS1021A platform is configured HW-coherent, mark accordingly the DT node. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: colibri-imx6ull: Change drive strength for usdhc2Philippe Schenker1-6/+6
The current setting reflects about 86 Ohms of source-impedance on the SDIO signals where the WiFi board is hooked up. PCB traces are routed with 50 Ohms impedance and there are no serial resistors on those traces. This commit changes the source-impedance to 52 Ohms to better match our hardware design. The impedances given in this commit message refer to 3.3V operation. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groupsAlexander Shiyan1-13/+17
Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC, LEDs, so that these pins can be used for different purposes when the respective drivers are disabled. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUXAlexander Shiyan1-2/+3
Board uses 4-wire synchronous mode for audio, so add SYN bit for PTCR AUDMUX registers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" optionAlexander Shiyan1-1/+0
The operating mode is used for the AC97 interface only, so lets drop the excess fsl,mode item from SSI node. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx53-qsb: Describe the esdhc1 card detect pinFabio Estevam1-0/+2
The micro SD card slot uses GPIO3_13 as card detect pin, so describe it in the devicetree. This was noticed when converting imx53-qsb board to driver model in U-Boot as the micro SD card was not getting detected. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes nameSerge Semin1-1/+1
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recoveryDima Azarkin1-2/+22
The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze on low level at the end of transaction so the bus can no longer work. This impacts reading of EDID data leading to incorrect TV resolution and no audio. This scenario is improved by adding scl/sda gpios definitions to implement the i2c bus recovery mechanism. Signed-off-by: Dima Azarkin <azdmg@outlook.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53Sebastian Reichel2-2/+2
IIM contains system fuses with information like SoC unique ID (serial) on i.MX51 and i.MX53. Add "syscon" compatible allowing simple access. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controllerAndreas Kemnade1-2/+5
For now, the driver detects an incompatible version, but since that can be handled by auto-detection, add the controller to the devicetree now. Only PWM seems to be available, there is no RTC in that controller. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx50-kobo-aura: Add Netronix embedded controllerJonathan Neuschäfer1-1/+15
Enable the Netronix EC on the Kobo Aura ebook reader. Several features are still missing: - Frontlight/backlight. The vendor kernel drives the frontlight LED using the PWM output of the EC and an additional boost pin that increases the brightness. - Battery monitoring - Interrupts for RTC alarm and low-battery events Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-11ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter KitJagan Teki2-0/+48
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Evaluation board for creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0Jagan Teki2-0/+48
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier board. Genaral features: - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Carrier board for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoMJagan Teki1-0/+196
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. General features: - STM32MP157A - Up to 1GB DDR3L - 4GB eMMC - 10/100 Ethernet - USB 2.0 Host/OTG - I2S - MIPI DSI to LVDS - rest of STM32MP157A features i.Core STM32MP1 needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OFJagan Teki2-0/+155
7" OF is a capacitive touch 7" Open Frame panel solutions with - 7" AUO B101AW03 LVDS panel - EDT, FT5526 Touch MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" Open Frame Solution board. Add support for it. Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Signed-off-by: Francesco Utel <francesco.utel@engicam.com> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 boardJagan Teki2-0/+56
MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. Genaral features: - Ethernet 10/100 - USB Type A - Audio Out - microSD - LVDS panel connector - Wifi/BT (option) - UMTS LTE with sim connector (option) MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. Add support for it. Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Signed-off-by: Francesco Utel <francesco.utel@engicam.com> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoMJagan Teki1-0/+148
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. General features: - STM32MP157AAC - Up to 1GB DDR3L-800 - 512MB Nand flash - I2S MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier boards for creating complete platform solutions. Add support for it. Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Signed-off-by: Francesco Utel <francesco.utel@engicam.com> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow controlValentin CARON - foss1-3/+18
Modify usart 2 & 3 pins to allow wake up from low power mode while the hardware flow control is activated. UART RTS pin need to stay configure in idle mode to receive characters in order to wake up. Fixes: 842ed898a757 ("ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl") Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-10ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheetNicolas Ferre2-8/+9
Fix the whole mux-mask table according to datasheet for the sam9x60 product. Too much functions for pins were disabled leading to misunderstandings when enabling more peripherals or taking this table as an example for another board. Take advantage of this fix to move the mux-mask in the SoC file where it belongs and use lower case letters for hex numbers like everywhere in the file. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: <stable@vger.kernel.org> # 5.6+ Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210310152006.15018-1-nicolas.ferre@microchip.com
2021-03-10ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and CFederico Pellegrin1-1/+1
According to the datasheet PA7 can be set to either function A, B or C (see table 6-2 of DS60001579D). The previous value would permit just configuring with function C. Signed-off-by: Federico Pellegrin <fede@evolware.org> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: <stable@vger.kernel.org> # 5.6+ Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-10ARM: dts: at91-sama5d27_som1: fix phy address to 7Claudiu Beznea1-2/+2
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No connection established if phy address 0 is used. The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down. But at reset, connected to PD09 of the MPU it's connected with an internal pull-up forming PHYAD[2:0] = 7. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Fixes: 2f61929eb10a ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID") Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: <stable@vger.kernel.org> # 4.14+
2021-03-10Merge branches 'omap-for-v5.13/genpd-dra7', 'omap-for-v5.13/genpd-omap4' and 'omap-for-v5.13/genpd-omap5' into omap-for-v5.13/genpd-drop-legacyTony Lindgren5-21/+1
Merge together branches dropping legacy data to avoid a minor merge conflict.
2021-03-10Merge tags 'genpd-dts-dra7', 'genpd-dts-omap4' and 'genpd-dts-omap5' into omap-for-v5.13/dts-genpdTony Lindgren5-167/+321
Merge together genpd related dts changes to provide base for dropping the legacy data to prevent merge conflicts and to send dts changes separately.
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 l3Tony Lindgren1-1/+0
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 emifTony Lindgren1-2/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 dmmTony Lindgren1-1/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l3Tony Lindgren1-1/+5
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l4_cfgTony Lindgren1-8/+11
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l4_perTony Lindgren1-3/+6
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l4_wkupTony Lindgren1-4/+7
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Move omap5 l3-noc to a separate nodeTony Lindgren1-6/+10
In preparation for probing l3 with simple-pm-bus and genpd, we must move l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from claiming the whole l3 instance before simple-pm-bus has a chance to probe. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Move omap5 mmio-sram out of l3 interconnectTony Lindgren1-5/+9
We need mmio-sram early for omap4_sram_init() for IO barrier init, and will be moving l3 interconnect to probe with simple-pm-bus that probes at module_init() time. So let's move mmio-sram out of l3 to prepare for that. Otherwise we will get the following after probing the interconnects with simple-pm-bus: omap4_sram_init:Unable to get sram pool needed to handle errata I688 Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 sataTony Lindgren2-15/+25
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" peroperty to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Note that the old sysc register offset is wrong, the real offset is at 0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been happily using sata on the bootloader configured sysconfig register and nobody noticed. Also the old register range for SATAMAC_wrapper registers is wrong at 7 while it should be 8. But that too seems harmless. There is also an L3 parent interconnect range that we don't seem to be using. That can be added as needed later on. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 gpmcTony Lindgren1-16/+33
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" property to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 mpuTony Lindgren1-13/+15
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 emifTony Lindgren1-20/+42
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" property to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 dmmTony Lindgren1-4/+17
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" property to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap4 l3Tony Lindgren1-2/+1
We can now probe interconnects with simple-pm-bus and genpd. Let's drop the legacy data along with the ti,hwmods property and flip over to using simple-pm-bus instead of simple-bus. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap4 debugssTony Lindgren1-1/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap4 emifTony Lindgren1-2/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>