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Maxime enables CEC support on both RPi4 HDMI ports
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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The CEC and hotplug interrupts go through an interrupt controller shared
between the two HDMI controllers.
Let's add that interrupt controller and the interrupts for both HDMI
controllers
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20210111142309.193441-16-maxime@cerno.tech
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Fixes for omaps for v5.11-rc cycle
The recent changes to switch SoCs to boot with ti-sysc interconnect
target module driver and genpd caused few regressions:
- The omap_prm reset driver needs to clear any reset bits deasserted by
the bootloader or kexec boot for the three reset bit cases. Otherwise
we can have an oops with accelerators starting to boot with potentially
unconfigured MMU for example
- Custom kernel configs are not automatically selecting simple-pm-bus
driver that we now need to probe interconnects so we need to select it
always
- We are not passing legacy platform data in auxdata with simple-pm-bus
like we do for simple-bus. We need to pass auxdata to simple-pm-bus so
it can pass it to of_platform_populate()
Then recent RCU changes started causing splats for cpuidle44xx that now
need RCU_NONIDLE added to the calls in several places
And then we have few device specific fixes:
- We need to remove legacy spi-cs-hig for gta04 display to work, and
set the gpio to active low
- Omap1 specific ohci-omap needs to call gpio_free()
- Droid4 needs to use padconf interrupt for the slider as the edge
gpio interrupts may be lost for deeper idle states
* tag 'omap-for-v5.11/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
ARM: dts; gta04: SPI panel chip select is active low
soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1
ARM: OMAP1: OSK: fix ohci-omap breakage
DTS: ARM: gta04: remove legacy spi-cs-high to make display work again
Link: https://lore.kernel.org/r/pull-1611818709-243493@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Commit 7536c7e03e74 ("of/fdt: Remove redundant kbasename function
call") exposed a bug creating DT nodes in the ATAGS to DT fixup code.
Non-existent nodes would mistaken get created with a leading '/'. The
problem was fdt_path_offset() takes a full path while creating a node
with fdt_add_subnode() takes just the basename.
Since this we only add root child nodes, we can just skip over the '/'.
Fixes: 7536c7e03e74 ("of/fdt: Remove redundant kbasename function call")
Reported-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Qi Zheng <arch0.zheng@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Rob Herring <robh@kernel.org>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Link: https://lore.kernel.org/r/20210126023905.1631161-1-robh@kernel.org
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STM32 DT fixes for v5.11, round 1
Highlights:
-----------
-Fixes are for DHCOM/DHCOR boards:
- Fix DRC02 uSD card detect polarity
- use uSD card detect on DHCOM
- Disable uSD WP on DHCOM
- Disable TSC2004 on DRC02
- Fix GPIO hogs on DHCOM boards
* tag 'stm32-dt-for-v5.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
ARM: dts: stm32: Fix GPIO hog names on DHCOM
ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
ARM: dts: stm32: Disable WP on DHCOM uSD slot
ARM: dts: stm32: Connect card-detect signal on DHCOM
ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
Link: https://lore.kernel.org/r/b7379980-857e-736a-85d8-58e2bd300141@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds basic support for MYIR Tech MYC-AM335X CPU Module:
- Up to 1GHz TI AM335X Series ARM Cortex-A8 Processors
- Up to 512MB DDR3 SDRAM
- Up to 512MB Nand Flash
and MYD-AM335X Development Board:
- MYC-AM335X CPU Module as Controller Board
- Serial ports, 4 x USB Host, OTG, 2 x Gigabit Ethernet, CAN, RS485,
TF, Audio
- Supports HDMI and LCD Display
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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I've switched employer a long time ago and the mentioned email address no
longer exists. Use my personal address to prevent the issue in the future.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Previously, the 1GHz variants were marked as a turbo,
because that variant has reduced thermal operating range.
Now that the thermal throttling is in place, it should be
safe to remove the turbo-mode from the 1GHz variants, because
the CPU will automatically slow if the thermal limit is reached.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The Android vendor kernel uses 307.2MHz or a divider ratio of /5 while active
153600000 or /10 is only used when the sgx core is inactive.
Signed-off-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The omap4430 HS HIGH performance devces support 1.2GHz opp, lower speed
variants do not. However for mapphone devices Motorola seems to have
decided that this does not really matter for the SoC variants they have
tested to use, and decided to clock all devices, including the ones with
STANDARD performance chips at 1.2GHz upon release of the 3.0.8 vendor
kernel shiped with Android 4.0. Therefore it seems safe to do the same,
but let's only do it for Motorola devices as the others have not been
tested.
Note that we prevent overheating with the passive cooling device
cpu_alert0 configured in the dts file that starts lowering the speed as
needed.
This also removes the "failed to find current OPP for freq 1200000000"
warning.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Carl Philipp Klemm <philipp@uvos.xyz>
[tony@atomide.com: made motorola specific, updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The current cooling device temperature is too high at 100C as we have a
battery on the device right next to the SoC as pointed out by Carl Philipp
Klemm <philipp@uvos.xyz>. Let's configure the max temperature to 80C.
As we only have a tshut interrupt and no talert interrupt on 4430, we have
a passive cooling device configured for 4430. However, we want the poll
interval to be 10 seconds instead of 1 second for power management. The
value of 10 seconds seems like plenty of time to notice the temperature
increase above the 75C temperatures. Having the bandgap temperature change
seems to take several tens of seconds because of heat dissipation above
75C range as monitored with a full CPU load.
Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Suggested-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We have gpio_86 wired internally to the bandgap thermal shutdown
interrupt on 4430 like we have it on 4460 according to the TRM.
This can be found easily by searching for TSHUT.
For some reason the thermal shutdown interrupt was never added
for 4430, let's add it. I believe this is needed for the thermal
shutdown interrupt handler ti_bandgap_tshut_irq_handler() to call
orderly_poweroff().
Fixes: aa9bb4bb8878 ("arm: dts: add omap4430 thermal data")
Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This adds audio playback to the first generation Amazon Echo
Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Recently introduced async probe on mmc devices can shuffle block IDs.
Pin them to fixed values to ease booting in environments where UUIDs are
not practical. Use newly introduced aliases for mmcblk devices from [1].
The sort order is based on reg address.
[1] https://patchwork.kernel.org/patch/11747669/
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118155242.7172-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Recently introduced async probe on mmc devices can shuffle block IDs.
Pin them to fixed values to ease booting in environments where UUIDs are
not practical. Use newly introduced aliases for mmcblk devices from [1].
The sort order is based on reg address.
[1] https://patchwork.kernel.org/patch/11747669/
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118155242.7172-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").
As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/e682edd25133bde2ed8198138febc90071530a51.1611186142.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Fix checkpatch warning:
WARNING: please, no spaces at the start of a line
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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The BSC controllers used for the HDMI DDC have an interrupt controller
shared between both instances. Let's add it to avoid polling.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20210111142309.193441-1-maxime@cerno.tech
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RPi4's co-processor will copy the board's bootloader[1] configuration
into memory for the OS to consume. Specifically, for the bootloader
configuration and upgrade user-space routines to query it through
nvmem's sysfs interface.
Introduce a reserved-memory area template for the co-processor to edit
before booting the system so as for Linux not to overwrite that memory
and to expose it as an nvmem device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Tim Gover <tim.gover@raspberrypi.com>
Link: https://lore.kernel.org/r/e8ca9365-a1f2-1f9d-377c-13bf97883cce@linaro.org
[1] https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711_bootloader_config.md
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Updates the compatible string for DSI1 on BCM2711 to
differentiate it from BCM2835.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20201203132543.861591-9-maxime@cerno.tech
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The vendor kernel uses the following thermal-zone settings:
<= 70°C:
- CPU frequency limited to 1.488GHz
- GPU limited to 511MHz and 2 cores (pixel processors)
<= 80°C:
- CPU frequency limited to 1.2GHz
- GPU limited to 435MHz and 2 cores (pixel processors)
<= 90°C:
- CPU frequency limited to 0.804GHz
- GPU limited to 328MHz and 1 core (pixel processor)
Add simplified thermal configuration which is taken from the
GXBB/GXL/GXM SoC family (which uses the same manufacturing process and
has the same maximum junction temperature of 125°C). With this the
thermal framework will try to keep the SoC temperature at or below 80°C
which is identical to the vendor kernel (with the exception of one CPU
frequency step from 1.488GHz to 1.536GHz).
The number of GPU cores are not taken into account as this is not
supported.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201221181306.904272-5-martin.blumenstingl@googlemail.com
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The vendor kernel uses the following thermal-zone settings:
<= 70°C:
- CPU frequency limited to 1.608GHz
- GPU limited to 511MHz and 5 cores (pixel processors)
<= 80°C:
- CPU frequency limited to 1.2GHz
- GPU limited to 435MHz and 4 cores (pixel processors)
<= 90°C:
- CPU frequency limited to 0.804GHz
- GPU limited to 328MHz and 3 cores (pixel processors)
Add simplified thermal configuration which is taken from the
GXBB/GXL/GXM SoC family (which uses the same manufacturing process and
has the same maximum junction temperature of 125°C). With this the
thermal framework will try to keep the SoC temperature at or below 80°C
which is identical to the vendor kernel (with the exception of one GPU
pixel processor).
The number of GPU cores are not taken into account as this is not
supported.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201221181306.904272-4-martin.blumenstingl@googlemail.com
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The SoC temperature can be retrieved from ADC channel 8 on all 32-bit
SoCs (Meson6, Meson8, Meson8b and Meson8m2). Add a "generic-adc-thermal"
instance to meson.dtsi so the thermal sensor is available for all SoCs.
If the temperature sensor calibration data is missing for a board then
the "generic-adc-thermal" will not probe and not register a thermal
sensor.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201221181306.904272-3-martin.blumenstingl@googlemail.com
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The SoC temperature can be retrieved from ADC channel 8 on all 32-bit
SoCs (Meson6, Meson8, Meson8b and Meson8m2). Move the iio-hwmon instance
to meson.dtsi instead of duplicating it in all board.dts.
If the temperature sensor calibration data is missing for a board then
iio-hwmon will simply not probe.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201221181306.904272-2-martin.blumenstingl@googlemail.com
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Since we now have driver for the SDHCI VQMMC LDO needed
for I/0 voltage levels lets introduce the necessary node for it.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200907101937.10155-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" ,
so adjust the node.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: devicetree@vger.kernel.org
Acked-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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The DHCOM SoM uSD slot has an optional voltage level translator, add
DT bindings which permit the MMCI driver to detect the translator
automatically.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add "init" mux option for SDMMC1, where the CMD, CK, CKIN lines are not
configured, so they can be claimed as GPIOs early on in driver probe().
This is used for probing optional voltage level translator.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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We may lose edge interrupts for gpio banks other than the first gpio
bank as they are not always powered. Instead, we must use the padconf
interrupt as that is always powered.
Note that we still also use the gpio for reading the pin state as that
can't be done with the padconf device.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
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Syonpsys IP cores are supposed to be defined with "snps" vendor-prefix.
Use it instead of the deprecated "synopsys" one.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
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Backmerge v5.11-rc5 into drm-next to clean up a bunch of conflicts we are dragging around.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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i.MX fixes for 5.11, round 2:
- Fix pcf2127 reset for imx7d-flex-concentrator board.
- Fix i.MX6 suspend with Thumb-2 kernel.
- Fix ethernet-phy address issue on imx6qdl-sr-som board.
- Fix GPIO3 `gpio-ranges` on i.MX8MP.
- Select SOC_BUS for IMX_SCU driver to fix build issue.
* tag 'imx-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: select SOC_BUS to fix firmware build
arm64: dts: imx8mp: Correct the gpio ranges of gpio3
ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
ARM: imx: build suspend-imx6.S with arm instruction set
ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
Link: https://lore.kernel.org/r/20210119091949.GD4356@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Fix the node names for the MMC/SD card controller to conform
to the standard node name mmc@..
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210122222038.2888747-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Ux500 DTS updates for the v5.12 kernel cycle:
- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
naming convention
* tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Fix up MMC host node names
ARM: dts: ux500: Add die temperature to AB8505
ARM: dts: ux500: Push VMMCI down to each tree
ARM: dts: ux500: Remove the GPADC HW IRQ
ARM: dts: ux500: Add thermistors to the HREF
ARM: dts: ux500: Add interrupts to charger
ARM: dts: ux500: Fix channel names attributes
ARM: dts: ux500: Add a device tree for Janice
Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The standard mandates that these nodes be named
mmc@... not sdi_foo@...
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200830191643.20717-1-freifunk@adrianschmutzler.de
[bjorn: Rebased and included fixup of sdx55-mtp]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds some additional DT labels which are handy when referring
to the nodes in derived DTS(I) files. It will also make the
definitions more consistent, e.g. by adding gsbi2_serial and
gsbi5_serial where we previously "only" had gsbi4_serial defined.
While at it, add missing spaces after some DT labels and remove one
useless empty line.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200902165159.7733-1-freifunk@adrianschmutzler.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This property appears to be commented out, so we can remove it
as well.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200902165159.7733-2-freifunk@adrianschmutzler.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm
IPQ4018 + QCA8075 platform.
Specification:
- Qualcomm IPQ4018 (717 MHz)
- 256 MB of RAM (DDR3)
- 16 MB (SPI NOR) + 128 or 512 MB (SPI NAND) of flash
- 2x Gbps Ethernet, with 802.3af PoE support in one port
- 2T2R 2.4/5 GHz (IPQ4018), with ext. FEMs (QFE1952, QFE1922)
- 3x U.FL connectors
- 1x 1.8 dBi (Bluetooth) and 2x 3/5 dBi dual-band (Wi-Fi) antennas
- Atmel/Microchip AT97SC3205T TPM module (I2C bus)
- TI CC2540 Bluetooth LE module (USB 2.0 bus)
- 1x button (reset)
- 1x USB 2.0
- DC jack for main power input (12 V)
- UART header available on PCB (2.0 mm pitch)
This adds DTS for both the generic and custom Bit edition for Sartura.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-4-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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8devices Jalapeno is a dual-band SoM, based on Qualcomm
IPQ4018 + QCA8072 platform.
Specification:
QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz
256 MB of DDR3 RAM
8 MB of SPI NOR flash
128 MB of Winbond SPI NAND flash
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN)
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-3-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Lets add labels to more commonly used nodes for easier modification in board DTS files.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-2-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Since we now have driver for the USB PHY, and USB controller is already supported by the DWC3 driver lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200909163831.1894142-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add missing prng definition for ipq806x SoC
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200705142544.GA3389@earth.li
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add support for pshold block to drive pshold towards the PMIC, which is
used to trigger a configurable event such as reboot or poweroff of the
SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable the support for USB3 controller, QMP PHY and HS PHY on SDX55 MTP.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX55.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org
[bjorn: Added missing #power-domain-cells to &gcc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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The BreadBee and the BreadBee Crust are the same PCB with a different
SoC mounted. There are two top level dts to handle this.
To avoid deduplicating the parts that are more related to the PCB than
the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can
be included in both top level dts.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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AT91 DT for 5.12:
- removing a property never documented nor used
- adding i2c recovery GPI for one more board
* tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
ARM: dts: at91-sama5d27_wlsom1: add i2c recovery
Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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