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2020-06-29ARM: dts: am33xx-l4: add gpio-rangesDrew Fustini1-0/+24
Add gpio-ranges properties to the gpio controller nodes. These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE REGISTERS" in the "AM335x Technical Reference Manual" [0] and "Table 4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1]. A csv file with this data is available for reference [2]. These mappings are valid for all SoC's that are using am33xx-l4.dtsi. In addition, the only TI AM33xx parts that actually exist are [0]: AM3351, AM3352, AM3354, AM3356, AM3357, AM3358, AM3359 These gpio-ranges properties should be added as they describe the relationship between a gpio line and pin control register that exists in the hardware. For example, GPMC_A0 pin has mode 7 which is labeled gpio1_16. conf_gpmc_a0 register is at offset 840h which makes it pin 16. [0] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf [1] http://www.ti.com/lit/ds/symlink/am3358.pdf [2] https://gist.github.com/pdp7/6ffaddc8867973c1c3e8612cfaf72020 [3] http://www.ti.com/processors/sitara-arm/am335x-cortex-a8/overview.html Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxesSuman Anna1-52/+0
The IPU and DSP remote processors use sub-mailbox nodes only from a limited set of System Mailboxes 5 and 6 to achieve the Remote Processor Messaging (RPMsg) communication stack between the MPU host processor and the respective remote processor. These are all defined and enabled through the inherited common dra74-ipu-dsp-common.dtsi file. The other System Mailboxes do not define any actual sub-mailboxes, so they serve no purpose and can all be safely dropped. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocsSuman Anna1-0/+21
Assign the previously added CMA reserved memory nodes to the respective IPU and DSP rproc device nodes, and enable these rproc nodes so that these remote processors can be booted on the AM5729 BeagleBone AI board. The addresses and sizes of the CMA pools are identical to those used on various other TI AM572x/AM574x based boards. The mailboxes, timers and watchdog-timers for all these remoteprocs are inherited by including the common dra72-ipu-dsp-common.dtsi file. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@48242000: $nodename:0: 'l2-cache-controller@48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: omap: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@48242000: $nodename:0: 'l2-cache-controller@48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2Adam Ford4-9/+64
Various OMAP3 boards have two AES blocks, but only one is currently available, because the hwmods are only configured for one. This patch migrates the hwmods for the AES engine to sysc-omap2 which allows the second AES crypto engine to become available. omap-aes 480a6000.aes1: OMAP AES hw accel rev: 2.6 omap-aes 480a6000.aes1: will run requests pump with realtime priority omap-aes 480c5000.aes2: OMAP AES hw accel rev: 2.6 omap-aes 480c5000.aes2: will run requests pump with realtime priority Signed-off-by: Adam Ford <aford173@gmail.com> [tony@atomide.com: updated to disable both aes_targets on hs boards] Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: r8a7778: Enable IRLM setup via DTUlrich Hecht1-1/+2
Make use of the IRLM setup feature in the renesas-intc-irqpin driver. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/1441726946-30131-3-git-send-email-ulrich.hecht+renesas@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-28Merge tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds27-119/+46
Pull ARM OMAP fixes from Arnd Bergmann: "The OMAP developers are particularly active at hunting down regressions, so this is a separate branch with OMAP specific fixes for v5.8: As Tony explains "The recent display subsystem (DSS) related platform data changes caused display related regressions for suspend and resume. Looks like I only tested suspend and resume before dropping the legacy platform data, and forgot to test it after dropping it. Turns out the main issue was that we no longer have platform code calling pm_runtime_suspend for DSS like we did for the legacy platform data case, and that fix is still being discussed on the dri-devel list and will get merged separately. The DSS related testing exposed a pile other other display related issues that also need fixing though": - Fix ti-sysc optional clock handling and reset status checks for devices that reset automatically in idle like DSS - Ignore ti-sysc clockactivity bit unless separately requested to avoid unexpected performance issues - Init ti-sysc framedonetv_irq to true and disable for am4 - Avoid duplicate DSS reset for legacy mode with dts data - Remove LCD timings for am4 as they cause warnings now that we're using generic panels Other OMAP changes from Tony include: - Fix omap_prm reset deassert as we still have drivers setting the pm_runtime_irq_safe() flag - Flush posted write for ti-sysc enable and disable - Fix droid4 spi related errors with spi flags - Fix am335x USB range and a typo for softreset - Fix dra7 timer nodes for clocks for IPU and DSP - Drop duplicate mailboxes after mismerge for dra7 - Prevent pocketgeagle header line signal from accidentally setting micro-SD write protection signal by removing the default mux - Fix NFSroot flakeyness after resume for duover by switching the smsc911x gpio interrupt to back to level sensitive - Fix regression for omap4 clockevent source after recent system timer changes - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid" phy-mode - One patch to convert am3/am4 DT files to use the regular sdhci-omap driver instead of the old hsmmc driver, this was meant for the merge window but got lost in the process" * tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits) ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode ARM: dts: Fix omap4 system timer source clocks ARM: dts: Fix duovero smsc interrupt for suspend ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect Revert "bus: ti-sysc: Increase max softreset wait" ARM: dts: am437x-epos-evm: remove lcd timings ARM: dts: am437x-gp-evm: remove lcd timings ARM: dts: am437x-sk-evm: remove lcd timings ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag ARM: dts: Fix am33xx.dtsi USB ranges length bus: ti-sysc: Increase max softreset wait ARM: OMAP2+: Fix legacy mode dss_reset bus: ti-sysc: Fix uninitialized framedonetv_irq bus: ti-sysc: Ignore clockactivity unless specified as a quirk bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit ARM: dts: omap4-droid4: Fix spi configuration and increase rate bus: ti-sysc: Flush posted write on enable and disable soc: ti: omap-prm: use atomic iopoll instead of sleeping one ...
2020-06-28Merge tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixesArnd Bergmann2-13/+13
i.MX fixes for 5.8: - Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device trees. - Fix i.MX8MP UID fuse offset in i.MX8M SoC driver. - Fix watchdog configuration in imx6ul-kontron device tree. - Fix one build warning seen on building soc-imx8m driver with x86_64-randconfig. - Add missing put_device() call for a couple of mach-imx PM functions. * tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx8m: fix build warning ARM: imx6: add missing put_device() call in imx6q_suspend_init() ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram() soc: imx8m: Correct i.MX8MP UID fuse offset ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2 arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range Link: https://lore.kernel.org/r/20200624111725.GA24312@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28Merge tag 'arm-soc/for-5.8/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixesArnd Bergmann9-4/+35
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 5.8, please pull the following: - Rafal adds a missing 'device_type' property to the Luxul XWC-2000 required for the memory nodes to be correctly parsed by Linux - Matthew provides two fixes for the NSP SoCs, one to disable the PL330 DMA controller by default since it can be left in reset by the bootloader and the second to correct the flow accelerator mailbox node * tag 'arm-soc/for-5.8/devicetree-fixes' of https://github.com/Broadcom/stblinux: ARM: dts: NSP: Correct FA2 mailbox node ARM: dts: NSP: Disable PL330 by default, add dma-coherent property ARM: dts: BCM5301X: Add missing memory "device_type" for Luxul XWC-2000 Link: https://lore.kernel.org/r/20200619202250.19029-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28Merge tag 'omap-for-v5.8/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap-fixesArnd Bergmann4-4/+3
Few dts fixes for omaps for v5.8 Few fixes for various devices: - Prevent pocketgeagle header line signal from accidentally setting micro-SD write protection signal by removing the default mux - Fix NFSroot flakeyness after resume for duover by switching the smsc911x gpio interrupt to back to level sensitive - Fix regression for omap4 clockevent source after recent system timer changes - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid" phy-mode * tag 'omap-for-v5.8/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode ARM: dts: Fix omap4 system timer source clocks ARM: dts: Fix duovero smsc interrupt for suspend ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect Link: https://lore.kernel.org/r/pull-1592499282-121092@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28Merge tag 'omap-for-v5.8/dt-missed-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap-fixesArnd Bergmann19-26/+22
Missed sdhci patch for am3 and am4 I forgot to send a pull request earlier for converting am3 and am4 to use sdhci-omap driver instead of the old omap_hsmmc driver. There was a display subsystem related suspend and resume regression found recently and looks like I forgot to send a pull request for this patch while debugging the regression. This patch has been tested without the display subsystem, and has been in Linux next for several weeks now, so would be good to have merged for v5.8. * tag 'omap-for-v5.8/dt-missed-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Move am33xx and am43xx mmc nodes to sdhci-omap driver Link: https://lore.kernel.org/r/pull-1591637467-607254@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28Merge tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesArnd Bergmann7-89/+21
Fixes for omaps for v5.8 The recent display subsystem (DSS) related platform data changes caused display related regressions for suspend and resume. Looks like I only tested suspend and resume before dropping the legacy platform data, and forgot to test it after dropping it. Turns out the main issue was that we no longer have platform code calling pm_runtime_suspend for DSS like we did for the legacy platform data case, and that fix is still being discussed on the dri-devel list and will get merged separately. The DSS related testing exposed a pile other other display related issues that also need fixing though: - Fix ti-sysc optional clock handling and reset status checks for devices that reset automatically in idle like DSS - Ignore ti-sysc clockactivity bit unless separately requested to avoid unexpected performance issues - Init ti-sysc framedonetv_irq to true and disable for am4 - Avoid duplicate DSS reset for legacy mode with dts data - Remove LCD timings for am4 as they cause warnings now that we're using generic panels Then there is a pile of other fixes not related to the DSS: - Fix omap_prm reset deassert as we still have drivers setting the pm_runtime_irq_safe() flag - Flush posted write for ti-sysc enable and disable - Fix droid4 spi related errors with spi flags - Fix am335x USB range and a typo for softreset - Fix dra7 timer nodes for clocks for IPU and DSP - Drop duplicate mailboxes after mismerge for dra7 * tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: Revert "bus: ti-sysc: Increase max softreset wait" ARM: dts: am437x-epos-evm: remove lcd timings ARM: dts: am437x-gp-evm: remove lcd timings ARM: dts: am437x-sk-evm: remove lcd timings ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag ARM: dts: Fix am33xx.dtsi USB ranges length bus: ti-sysc: Increase max softreset wait ARM: OMAP2+: Fix legacy mode dss_reset bus: ti-sysc: Fix uninitialized framedonetv_irq bus: ti-sysc: Ignore clockactivity unless specified as a quirk bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit ARM: dts: omap4-droid4: Fix spi configuration and increase rate bus: ti-sysc: Flush posted write on enable and disable soc: ti: omap-prm: use atomic iopoll instead of sleeping one Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-27Merge tag 'juno-fix-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixesArnd Bergmann1-73/+73
ARMv8 Juno/Vexpress/Fast Models fix for v5.8 Partial revert of some recent fixes to silence DTC warning which broke clocks on some Vexpress platforms resulting in boot issues. * tag 'juno-fix-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm: dts: vexpress: Move mcc node back into motherboard node Link: https://lore.kernel.org/r/20200609180447.GB5732@bogus Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-26ARM: dts: at91: sama5d2_xplained: Remove pdmic nodeCodrin Ciubotariu1-16/+0
The PDMIC needs PDM microphones to work. sama5d2 xplained doesn't have such microphones, so there is no reason to enable PDMIC and take the pins since there is no-one using them. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200618152845.682723-1-codrin.ciubotariu@microchip.com
2020-06-26ARM: dts: sam9x60: add rttClaudiu Beznea2-0/+16
Add RTT. Allong with it enable GBPR as it is requested by RTT. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1591779936-18577-4-git-send-email-claudiu.beznea@microchip.com
2020-06-26ARM: dts: r8a7742: Add MSIOF[0123] supportLad Prabhakar1-0/+64
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1591736054-568-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-26ARM: dts: exynos: Align L2 cache-controller nodename with dtschemaAnand Moon2-2/+2
Fix dtschema warning message by changing nodename to 'cache-controller': DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml arch/arm/boot/dts/exynos4210-i9100.dt.yaml: l2-cache-controller@10502000: $nodename:0: 'l2-cache-controller@10502000' does not match ' ^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-06-25ARM: dts: bcm2711: Add firmware clocks nodeMaxime Ripard1-0/+5
Now that we have a clock driver for the clocks exposed by the firmware, let's add the device tree nodes for it. Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/9a6f113140b3115150bfb18ecb248a48d58562cf.1592210452.git-series.maxime@cerno.tech
2020-06-25ARM: tegra: The Tegra30 SDHCI is not backwards-compatibleThierry Reding1-4/+4
The SDHCI on Tegra30 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: The Tegra30 DC is not backwards-compatibleThierry Reding1-1/+1
The display controller on Tegra30 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Remove spurious comma from node nameThierry Reding1-1/+1
This was probably left there by mistake or perhaps was a typo in the first place. Remove it. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add parent clock to DSI outputThierry Reding2-2/+6
The DSI output needs to specify a parent clock that will be used to drive both the output and the display controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard names for SRAM nodesThierry Reding2-4/+4
SRAM nodes should be named sram@<unit-address> to match the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: seaboard: Use standard battery bindingsThierry Reding1-3/+3
Seaboard uses a non-existing, possibly obsoleted, binding for the battery. Move to the standard binding which seems to be a super- set of the odl binding. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard names for LED nodesThierry Reding1-1/+1
LED nodes should be named led-* to match the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use numeric unit-addressesThierry Reding1-1/+1
Unit-addresses should be numeric. This fixes a validation failure seen using the json-schema tooling. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: medcom-wide: Remove extra panel power supplyThierry Reding1-1/+1
Simple panels can only have a single power supply. The second listed supply is not needed because it is also the input supply of the first supply and therefore will always be on at the same time. In retrospect the panel probably doesn't qualify as simple since it apparently does need both of these supplies, even if in the case of the Medcom Wide it isn't necessary to explicitly hook them up. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use proper unit-addresses for OPPsThierry Reding4-496/+496
Use commas rather than underscores to separate the various parts of the unit-address in CPU OPPs to make them properly validate under the json- schema bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing clock-names for SDHCI controllersThierry Reding3-0/+12
The Tegra SDHCI controllers need to have a clock-names property according to the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Fix order of XUSB controller clocksThierry Reding1-2/+2
This is purely to make the json-schema validation tools happy because they cannot deal with string arrays that may be in arbitrary order. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add #reset-cells to Tegra124 memory controllerThierry Reding1-0/+1
The memory controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing panel power suppliesThierry Reding3-1/+3
Both Nyan boards as well as Venice2 are missing panel power supplies. Add them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add micro-USB A/B port on Jetson TK1Thierry Reding1-0/+6
Run the micro-USB A/B port on Jetson TK1 in host mode by default. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use proper tuple notationThierry Reding5-82/+89
Tuple boundaries should be marked by < and > to make it clear which cells are part of the same tuple. This also helps the json-schema based validation tooling to properly parse this data. While at it, also remove the "immovable" bit from PCI addresses. All of these addresses are in fact "movable". Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard name for Ethernet devicesThierry Reding4-4/+4
Ethernet device should be named "ethernet@<unit-address>". Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing #sound-dai-cells property to codecsThierry Reding5-0/+5
Audio codecs need a #sound-dai-cells property, so add one to the audio codecs on various Tegra-based boards that don't have one. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing #phy-cells property to USB PHYsThierry Reding4-0/+11
USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Tegra114 SDHCI is not backwards-compatibleThierry Reding1-4/+4
The SDHCI controller instantiated on Tegra114 is not backwards- compatible with the version on Tegra30, so remove the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Rename sdhci nodes to mmcThierry Reding33-64/+64
The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Drop display controller parent clocks on Tegra124Thierry Reding1-6/+4
The parent clocks are determined by the output that will be used, not by the display controller that drives the output. On previous generations a simple RGB output used to be part of the display controller and hence an explicit parent clock needed to be assigned to the display controller to drive the RGB output. Starting with Tegra124, that RGB output has been dropped and the parent clock can therefore be removed from the display controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: The Tegra114 DC is not backwards-compatibleThierry Reding1-2/+2
The display controller on Tegra114 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: gr3d is not backwards-compatibleThierry Reding1-1/+1
The instantiation of gr3d in Tegra114 is not backwards-compatible with the version found on earlier chips. Remove the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: gr2d is not backwards-compatibleThierry Reding1-1/+1
The instantiation of gr2d in Tegra114 is not backwards-compatible with the version found on earlier chips. While the hardware IP is identical, the compatible string also describes the integration of the IP, which in the case of Tegra114 is slightly different in that it's part of the HEG power partition, whereas it wasn't previously. Drop the misleading compatible string so that drivers that support the older integrations cannot match on it. Since they wouldn't be able to control the power partition, such driver wouldn't be able to access any of the registers of the IP. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Add missing host1x propertiesThierry Reding4-0/+8
The host1x device tree bindings require the clock- and interrupt-names properties to be present, so add them where missing. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Do not mark host1x as simple busThierry Reding4-4/+4
The host1x is not a simple bus, so drop the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: tn7: Use the correct DSI/CSI supplyThierry Reding1-1/+1
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use that instead of the wrong vdd-supply property. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: roth: Use the correct DSI/CSI supplyThierry Reding1-1/+1
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use that instead of the wrong vdd-supply property. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Remove battery-name propertyThierry Reding1-1/+0
This property is not documented and will cause a validation failure. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Remove simple regulators busThierry Reding19-1353/+1122
The standard way to do this is to list out the regulators at the top level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
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