aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot
AgeCommit message (Collapse)AuthorFilesLines
2020-06-23ARM: tegra: Remove simple clocks busThierry Reding14-154/+56
The standard way to do this is to list out the clocks at the top-level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Add missing clock-names for SDHCI on Tegra114Thierry Reding1-0/+4
The Tegra SDHCI controller bindings state that the clock-names property is required, so add the missing properties on Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drainFrieder Schrempf1-1/+1
The WDOG_ANY signal is connected to the RESET_IN signal of the SoM and baseboard. It is currently configured as push-pull, which means that if some external device like a programmer wants to assert the RESET_IN signal by pulling it to ground, it drives against the high level WDOG_ANY output of the SoC. To fix this we set the WDOG_ANY signal to open-drain configuration. That way we make sure that the RESET_IN can be asserted by the watchdog as well as by external devices. Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards") Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoMFrieder Schrempf2-13/+13
The watchdog's WDOG_ANY signal is used to trigger a POR of the SoC, if a soft reset is issued. As the SoM hardware connects the WDOG_ANY and the POR signals, the watchdog node itself and the pin configuration should be part of the common SoM devicetree. Let's move it from the baseboard's devicetree to its proper place. Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards") Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-21ARM: dts: qcom: add qfprom definition to ipq806xJonathan McDowell1-0/+7
Add missing qfprom definition for ipq806x SoC Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/20200616171554.GA5632@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-17ARM: dts: at91: sam9x60ek: classd: pull-down the L1 and L3 linesCodrin Ciubotariu1-2/+2
The L1 and L3 lines drive NMOS transistors that are OFF with a low level. On the SAM9X60 EK board, if the pins corresponding to L1 and L3 have pull-ups enabled, there is an extra 2 x 30uA power consumption. Use pull-downs for these 2 lines to remove the unnecessary power consumption. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200615095525.43414-2-codrin.ciubotariu@microchip.com
2020-06-17ARM: dts: at91: sama5d2_xplained: classd: pull-down the R1 and R3 linesCodrin Ciubotariu1-5/+9
The R1 and R3 lines drive NMOS transistors that are OFF with a low level. On the SAMA5D2 Xplained board, if the pins corresponding to R1 and R3 have pull-ups enabled, there is an extra 2 x 30uA power consumption. Use pull-downs for these 2 lines to remove the unnecessary power consumption. Fixes: b133ca7a653c ("ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200615095525.43414-1-codrin.ciubotariu@microchip.com
2020-06-17ARM: dts: NSP: Correct FA2 mailbox nodeMatthew Hagan1-3/+3
The FA2 mailbox is specified at 0x18025000 but should actually be 0x18025c00, length 0x400 according to socregs_nsp.h and board_bu.c. Also the interrupt was off by one and should be GIC SPI 151 instead of 150. Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP") Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-06-17ARM: dts: rockchip: Add marvell BT irq configAbhishek Pandit-Subedi1-0/+15
Veyron Jaq and Mighty both use the Marvel 8897 WiFi+BT chip. Add wakeup and pinctrl block to devicetree so the btmrvl driver can correctly configure the wakeup interrupt. Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200612130219.v2.1.I66864be898aa835ccb66b6cd5220d0b082338a81@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-06-17ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpioJohan Jonker10-23/+23
A test with the command below gives for example this error: arch/arm/boot/dts/rk3288-tinker.dt.yaml: tsadc: otp-gpio: {'phandle': [[54]], 'rockchip,pins': [[0, 10, 0, 118]]} is not of type 'array' 'gpio' is a sort of reserved nodename and should not be used for pinctrl in combination with 'rockchip,pins', so change nodes that end with 'gpio' to end with 'pin' or 'pins'. make ARCH=arm dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/ dtschema/schemas/gpio/gpio.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200524160636.16547-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-06-16Merge branch 'omap-for-v5.8/fixes-rc1' into fixesTony Lindgren4-4/+3
2020-06-16Merge tag 'v5.8-rc1' into fixesTony Lindgren265-3521/+12088
Linux 5.8-rc1
2020-06-16ARM: dts: am5729: beaglebone-ai: fix rgmii phy-modeDrew Fustini1-1/+1
Since commit cd28d1d6e52e ("net: phy: at803x: Disable phy delay for RGMII mode") the networking is broken on the BeagleBone AI which has the AR8035 PHY for Gigabit Ethernet [0]. The fix is to switch from phy-mode = "rgmii" to phy-mode = "rgmii-rxid". Note: Grygorii made a similar DT fix for other AM57xx boards with a different phy in commit 820f8a870f65 ("ARM: dts: am57xx: fix networking on boards with ksz9031 phy"). [0] https://git.io/Jf7PX Fixes: 520557d4854b ("ARM: dts: am5729: beaglebone-ai: adding device tree") Cc: Vinod Koul <vkoul@kernel.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16ARM: dts: Fix omap4 system timer source clocksTony Lindgren1-1/+1
I accidentally flipped the system timer to use system clock instead of the 32k source clock. Fixes: 14b1925a7219 ("ARM: dts: Configure system timers for omap4") Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16ARM: dts: Fix duovero smsc interrupt for suspendTony Lindgren1-1/+1
While testing the recent suspend and resume regressions I noticed that duovero can still end up losing edge gpio interrupts on runtime suspend. This causes NFSroot easily stopping working after resume on duovero. Let's fix the issue by using gpio level interrupts for smsc as then the gpio interrupt state is seen by the gpio controller on resume. Fixes: 731b409878a3 ("ARM: dts: Configure duovero for to allow core retention during idle") Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16ARM: dts: am335x-pocketbeagle: Fix mmc0 Write ProtectDrew Fustini1-1/+0
AM3358 pin mcasp0_aclkr (ZCZ ball B13) [0] is routed to P1.31 header [1] Mode 4 of this pin is mmc0_sdwp (SD Write Protect). A signal connected to P1.31 may accidentally trigger mmc0 write protection. To avoid this situation, do not put mcasp0_aclkr in mode 4 (mmc0_sdwp) by default. [0] http://www.ti.com/lit/ds/symlink/am3358.pdf [1] https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#531_Expansion_Headers Fixes: 047905376a16 (ARM: dts: Add am335x-pocketbeagle) Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16ARM: dts: orange-pi-zero-plus2: add leds configurationDiego Rondini1-0/+15
Add pwr and status leds configuration and turn on pwr led by default for Orange Pi Zero Plus 2 (both H3 and H5 variants). Signed-off-by: Diego Rondini <diego.rondini@kynetics.com> Link: https://lore.kernel.org/r/20200615130223.34464-2-diego.rondini@kynetics.com Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-06-16ARM: dts: orange-pi-zero-plus2: enable USB OTG portDiego Rondini1-0/+23
Enable support for USB OTG port on Orange Pi Zero Plus 2 (both H3 and H5 variants). As, according to the board schematics, the USB OTG port cannot provide power to external devices, we set dr_mode to peripheral. Signed-off-by: Diego Rondini <diego.rondini@kynetics.com> Link: https://lore.kernel.org/r/20200615130223.34464-1-diego.rondini@kynetics.com Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-06-15ARM: dts: NSP: Disable PL330 by default, add dma-coherent propertyMatthew Hagan8-1/+31
Currently the PL330 is enabled by default. However if left in IDM reset, as is the case with the Meraki and Synology NSP devices, the system will hang when probing for the PL330's AMBA peripheral ID. We therefore should be able to disable it in these cases. The PL330 is also included among of the list of peripherals put into coherent mode, so "dma-coherent" has been added here as well. Fixes: 5fa1026a3e4d ("ARM: dts: NSP: Add PL330 support") Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-06-15ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrlErwan Le Ray1-4/+4
Fix uart7_pins_a comments to indicate UART7 pins instead of UART4 pins. Fixes: bf4b5f379fed ("ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157") Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrlErwan Le Ray1-61/+61
Fix usart and uart nodes ordering. Several usart nodes didn't respect expecting ordering. Fixes: 077e0638fc83 ("ARM: dts: stm32: Add alternate pinmux for USART2 pins on stm32mp15") Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkxErwan Le Ray1-1/+3
Add sleep and idle states to uart4 pin configuration. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1Erwan Le Ray1-1/+3
Add sleep and idle states to uart4 pin configuration. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157Erwan Le Ray1-0/+17
Sleep pin configuration is refined for low power modes: - "sleep" (no wakeup & console suspend enabled): put pins in analog state to optimize power - "idle" (wakeup capability): keep Rx pin in alternate function Signed-off-by: Bich Hemon <bich.hemon@st.com> Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update led nodes names for stm32f746-evalBenjamin Gaignard1-1/+1
Update led nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Add missing #address and #size cells on spi node for stm32mp151Benjamin Gaignard1-0/+2
Add the missing #address-cells and #size-cells to spi node. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Update nodes names for stm32h743 pinctrlBenjamin Gaignard1-5/+5
Fix the nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: remove useless interrupt-names property on stm32f743Benjamin Gaignard1-1/+0
Driver doesn't use interrupt's name to get it so remove it from the node. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update led nodes names for stm32f746-evalBenjamin Gaignard1-4/+4
Update led nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update led nodes names for stm32f769-discoBenjamin Gaignard1-2/+2
Update led nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update led nodes names for stm32f429-evalBenjamin Gaignard1-4/+4
Update led nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: remove useless interrupt-names property on stm32f746Benjamin Gaignard1-1/+0
Driver doesn't use interrupt's name to get it so remove it from the node. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update led nodes names for stm32f469-discoBenjamin Gaignard1-4/+4
Update led nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update led nodes names for stm32f249-discoBenjamin Gaignard1-2/+2
Update led nodes names to be aligned with yaml description Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: update pwm pinctrl node names for stm32f4Benjamin Gaignard1-2/+2
Rename pwm pinctrl nodes name to matching with yaml bindings requirements. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: remove useless interrupt-names property on stm32f429Benjamin Gaignard1-1/+0
Driver doesn't use interrupt's name to get it so remove it from the node. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: enable stmpe811 on stm32429-disco boarddillon min1-0/+45
Enable the stmpe811 touch screen on stm32429-disco board. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Add pin map for I2C3 controller on stm32f4dillon min1-0/+12
This patch adds the pin configuration for I2C3 controller on stm32f4. Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: add I2C3 support on STM32F429 SoCdillon min1-0/+12
This patch adds I2C3 instances of the STM32F429 SoC Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco boarddillon min1-0/+48
Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board. Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco boarddillon min2-2/+69
This patch adds the pin configuration for ltdc and spi5 controller on stm32f429-disco board. Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Add dma config for spi5 on stm32f429dillon min1-0/+3
Enable spi5's dma configuration for graphics data output to ilitek ili9341 panel via mipi dbi interface. Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add device tree for camera DBLad Prabhakar2-0/+98
Add support for the camera daughter board which is connected to iWave's RZ/G1H Qseven carrier board. Also enable ttySC[0135] and ethernet1 interfaces. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1591552659-21314-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742: Add CMT SoC specific supportLad Prabhakar1-0/+32
Add CMT[01] support to r8a7742 SoC DT. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1590614320-30160-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742: Add thermal device to DTLad Prabhakar1-0/+30
This patch instantiates the thermal sensor module with thermal-zone support. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1590614320-30160-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTSLad Prabhakar1-0/+63
Enable sound with DMA support on carrier board. DMA transfer uses DVC DMA DMApp [MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI] DMA DMApp [MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI] Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1590611013-26029-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codecLad Prabhakar1-0/+37
This patch enables SGTL5000 audio codec on the carrier board. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1590611013-26029-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742: Add audio supportLad Prabhakar1-0/+284
Add sound support for the RZ/G1H SoC (a.k.a. R8A7742). This work is based on similar work done on the R8A7744 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/1590526904-13855-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742-iwg21d-q7: Add RWDT supportLad Prabhakar1-0/+5
Enable RWDT and use 60 seconds as default timeout. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1590420129-7531-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVBLad Prabhakar1-0/+21
Enable Ethernet AVB on iWave RZ/G1H carrier board. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1590420129-7531-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.