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2020-05-18ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPsTudor Ambarus1-0/+2
The sama5d2 SoC has two dedicated I2C IPs that are enabled on sama5d2_xplained. Add alias for the i2c devices to not rely on probe order for the i2c device numbering. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200518114802.253660-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-17ARM: dts: ux500: Add touchscreen to the SkomerLinus Walleij1-1/+31
This adds touchscreen support to the Ux500 Samsung GT-S7710 "Skomer" mobile phone. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200516212913.485365-1-linus.walleij@linaro.org
2020-05-17arm64: dts: vexpress: Move fixed devices out of bus nodeAndre Przywara1-154/+154
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/refclk32khz missing or empty reg/ranges property Move the fixed clocks, the fixed regulator, the leds and the config bus subtree to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-5-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp/juno: Fix node address fieldsAndre Przywara1-5/+5
The Arm Ltd. boards were using an outdated address convention in the DT node names, by separating the high from the low 32-bits of an address by a comma. Remove the comma from the node name suffix to be DT spec compliant. Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17ARM: dts: kirkwood: ReadyNAS NV+v2: Add LCD panelBrian J. Tarricone1-0/+14
The NV+ v2 has a WH1602 LCD panel (which is just a rebranded HD44780), similar to the Netgear RN104, just with different GPIO assignments. Signed-off-by: Brian J. Tarricone <brian@tarricone.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17ARM: dts: kirkwood: Add Check Point L-50 boardPawel Dembicki2-0/+439
This patch adds dts for the Check Point L-50 from 600/1100 series routers. Specification: -CPU: Marvell Kirkwood 88F6821 1200MHz -RAM: 512MB -Flash: NAND 512MB -WiFi: mPCIe card based on Atheros AR9287 b/g/n -WAN: 1 Gigabit Port (Marvell 88E1116R PHY) -LAN: 9 Gigabit Ports (2x Marvell 88E6171(5+4)) -USB: 2x USB2.0 -Express card slot -SD card slot -Serial console: RJ-45 115200 8n1 -Unsupported DSL Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17ARM: dts: marvell: drop i2c timeout-ms propertyBaruch Siach5-11/+0
The timeout-ms property for i2c master nodes is undocumented, and as never been supported. Drop it. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-16arm: dts: mt2701: Add usb2 device nodesMin Guo2-0/+54
Add musb nodes and usb2 phy nodes for MT2701 Signed-off-by: Min Guo <min.guo@mediatek.com> Link: https://lore.kernel.org/r/20191211015446.11477-3-min.guo@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm: dts: mt7623: add Mali-450 device nodeRyder Lee1-0/+25
Add a node for Mali-450. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Link: https://lore.kernel.org/r/af7b5a2e00eb3a4b6262807c378e43afd5f74779.1563867856.git.ryder.lee@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15Merge tag 'renesas-fixes-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixesArnd Bergmann11-27/+5
Renesas fixes for v5.7 (take two) - Fix a wrong clock configuration on R-Mobile A1, - Minor fixes that are fast-tracked to avoid introducing regressions during conversion of DT bindings to json-schema. * tag 'renesas-fixes-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: iwg20d-q7-dbcm-ca: Remove unneeded properties in hdmi@39 ARM: dts: renesas: Make hdmi encoder nodes compliant with DT bindings arm64: dts: renesas: Make hdmi encoder nodes compliant with DT bindings ARM: dts: r8a7740: Add missing extal2 to CPG node Link: https://lore.kernel.org/r/20200515125043.22811-1-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-15ARM: dts: at91: Configure I2C SCL gpio as open drainCodrin Ciubotariu4-13/+13
The SCL gpio pin used by I2C bus for recovery needs to be configured as open drain. Fixes: 455fec938bbb ("ARM: dts: at91: sama5d2: add i2c gpio pinctrl") Fixes: a4bd8da893a3 ("ARM: dts: at91: sama5d3: add i2c gpio pinctrl") Fixes: 8fb82f050cf6 ("ARM: dts: at91: sama5d4: add i2c gpio pinctrl") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200515140001.287932-1-codrin.ciubotariu@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C functionTudor Ambarus1-0/+21
Users can choose which flexcom function to use. Describe the I2C Flexcom0 function. Add alias for the i2c2 node in order to not rely on probe order for the i2c device numbering. The sama5d2 SoC has two dedicated i2c buses and five flexcoms that can function as i2c. The i2c0 and i2c1 aliases are kept for the dedicated i2c buses, the i2c flexcom functions can be numbered in order starting from i2c2. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-16-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliasesTudor Ambarus1-3/+3
Indicate which i2c alias is for which connector on the board. Specify that serial0 is for DBGU. This eases tester's life. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-17-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_xplained: Add alias for DBGUTudor Ambarus1-0/+4
The aliases should be defined in the board dts rather than in the SoC dtsi. Don't rely on the aliases defined in the SoC dtsi and define the alias for the Serial DBGU in the board dts file. sama5d2 boards use the "serial0" alias for the Serial DBGU, do the same for sama5d2_xplained. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-15-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add missing flexcom definitionsTudor Ambarus1-0/+79
Describe all the flexcom functions for all the flexcom nodes. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-13-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsiTudor Ambarus1-4/+0
Device aliases are board-specific, if needed one should define them in board dts rather than in the SoC dtsi. If an alias from the SoC dtsi is addressed by a driver that does not use any of the of_alias*() methods, we can drop it. This is the case for the i2s aliases, drop them. tcb aliases point to nodes that are not enabled in any of the sama5d2 based platforms. atmel_tclib.c is scheduled to go away, any board using that alias is already broken, so get rid of the tcb aliases too. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-14-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functionsTudor Ambarus3-1/+19
Spare boards of duplicating the DMA bindings. Describe the flx0 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-12-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C functionTudor Ambarus2-1/+9
Spare boards of duplicating the DMA bindings. Describe the flx1 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-11-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI functionTudor Ambarus3-0/+11
Spare boards of duplicating the DMA bindings. Describe the flx3 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-10-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functionsTudor Ambarus2-0/+20
Spare boards of duplicating the DMA bindings. Describe the flx4 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-9-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UARTTudor Ambarus1-0/+2
The UART submodule in Flexcom has 32-byte Transmit and Receive FIFOs. Tested uart7 on sama5d2-icp, which has both DMA and FIFO enabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-8-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsiTudor Ambarus6-44/+41
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. There is a single functional change in this patch. With the move of the flx0 uart5 definition in the SoC dtsi, the uart5 from at91-sama5d27_wlsom1_ek.dts inherits the following optional property: atmel,fifo-size = <32>; This particular change was tested by Codrin. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-7-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsiTudor Ambarus3-19/+29
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-6-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsiTudor Ambarus2-12/+18
The Flexcom IP is part of the sama5d2 SoC. Move the flx2 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-5-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsiTudor Ambarus4-31/+30
The Flexcom IP is part of the sama5d2 SoC. Move the flx3 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-4-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsiTudor Ambarus5-50/+40
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-3-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functionsTudor Ambarus5-21/+21
The sama5d2 SoC has the following IPs: [uart0, uart4], {spi0, spi1}, {i2c0, i2c1}. Label the flexcom functions in order: flx0: uart5, spi2, i2c2 flx1: uart6, spi3, i2c3 flx2: uart7, spi4, i2c4 flx3: uart8, spi5, i2c5 flx4: uart9, spi6, i2c6 Some boards respected this scheme, others not. Fix the ones that didn't. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-2-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: iwg20d-q7-dbcm-ca: Remove unneeded properties in hdmi@39Ricardo Cañuelo1-2/+0
Remove the adi,input-style and adi,input-justification properties of hdmi@39 to make it compliant with the "adi,adv7511w" DT binding. Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200511110611.3142-6-ricardo.canuelo@collabora.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-15ARM: dts: renesas: Make hdmi encoder nodes compliant with DT bindingsRicardo Cañuelo9-24/+4
Small fixes to make these DTs compliant with the adi,adv7511w and adi,adv7513 bindings: r8a7745-iwg22d-sodimm-dbhd-ca.dts r8a7790-lager.dts r8a7790-stout.dts r8a7791-koelsch.dts r8a7791-porter.dts r8a7792-blanche.dts r8a7793-gose.dts r8a7794-silk.dts: Remove the adi,input-style and adi,input-justification properties. r8a7792-wheat.dts: Reorder the I2C slave addresses of hdmi@3d and hdmi@39 and remove the adi,input-style and adi,input-justification properties. Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200511110611.3142-3-ricardo.canuelo@collabora.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-14ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 boardMarek Vasut6-615/+675
The Avenger96 is in fact an assembly of DH Electronics DHCOR SoM on top of an Avenger96 reference board. The DHCOR SoM can be populated with any STM32MP15xx. Split the DTs to reflect this such that the common SoM and Avenger96 parts are now in stm32mp15xx-dhcor-*dtsi and a specific example implementation of STM32MP157A SoM and Avenger96 board is separated into stm32mp157a-dhcor-*dts* . The stm32mp157a-avenger96.dts is retained for the sake of backward naming compatibility. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Split SoC-independent parts of DHCOM SOM and PDK2Marek Vasut3-338/+352
The DH Electronics PDK2 can be populated with SoM with any STM32MP15xx variant. Split the SoC-independent parts of the SoM and PDK2 into the stm32mp15xx-dhcom-*.dtsi and reduce stm32mp157c-dhcom-*dts* to example of adding STM32MP157C variant of the SoM into a PDK2 carrier board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add GPIO LEDs for STM32MP1 DHCOM PDK2Marek Vasut1-0/+28
Add bindings for the four GPIO LEDs on DH PDK2 board. Note that LED5 GPIO-E may conflict with touchscreen interrupt, hence LED5 must be disabled when using the DH 560-200 display unit with touchscreen. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add GPIO keys for STM32MP1 DHCOM PDK2Marek Vasut1-0/+43
Add bindings for the four GPIO keys on DH PDK2 board. Note that TA1 key is polled because it's IRQ line conflicts with ethernet IRQ, the rest of the GPIO keys, TA2, TA3, TA4, are interrupt-driven and wake up sources. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add IoT Box board supportManivannan Sadhasivam2-0/+69
IoT Box is an IoT gateway device based on Stinger96 board powered by STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This device makes use of Stinger96 board by having it as a base board with one additional mezzanine on top. Following are the features exposed by this device in addition to the Stinger96 board: * WiFi/BT * CCS811 VOC sensor * 2x Digital microphones IM69D130 * 12x WS2812B LEDs Following peripherals are tested and known to work: * WiFi/BT * CCS811 More information about this device can be found in Shiratech website: https://www.shiratech-solutions.com/products/iot-box/ Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add Stinger96 board supportManivannan Sadhasivam3-0/+355
Stinger96 is a 96Boards IoT Extended edition board designed and manufactured by Shiratech solutions based on STM32MP1 SoC. Following are the features of this board: * 256MB DDR * 125MB NAND Flash * Onboard BG96 modem * 1x uSD * 2x USB (1 available as external connector and another connected to BG96) * 1x SPI * 1x PCM * 2x UART (apart from serial console) * 2x I2C (apart from one connected to PMIC) Following peripherals are tested and known to work: * BG96 modem * 1x I2C (LS-I2C0) * 1x SPI * 1x UART (LS-UART0) * USB (Only Gadget mode) * uSD More information about this board can be found in Shiratech website: https://www.shiratech-solutions.com/products/stinger96/ Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add missing pinctrl entries for STM32MP15Manivannan Sadhasivam1-0/+64
These pinctrl definitions will be used by Stinger96/IoTBox boards from Shiratech. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14Merge tag 'omap-for-v5.6/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesArnd Bergmann3-5/+46
Fixes for omaps for v5.6-rc cycle Few device tree fixes for various devices: - A regression fix for non-existing can device on am534x-idk - Fix missing dma-ranges for dra7 pcie - Fix flakey wlan on droid4 where some devices would not connect at all because of internal pull being used with an external pull - Fix occasional missed wake-up events on droid4 modem uart * tag 'omap-for-v5.6/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap4-droid4: Fix occasional lost wakeirq for uart1 ARM: dts: omap4-droid4: Fix flakey wlan by disabling internal pull for gpio ARM: dts: dra7: Fix bus_dma_limit for PCIe ARM: dts: am574x-idk: Disable m_can node Link: https://lore.kernel.org/r/pull-1588872844-804667@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14Merge tag 'v5.7-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixesArnd Bergmann5-7/+7
Some fixes for the newly added Pinebook Pro and other fixes to make dtc and the new dtscheck against yaml bindings happy. * tag 'v5.7-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: fix pinctrl sub nodename for spi in rk322x.dtsi arm64: dts: rockchip: Fix Pinebook Pro FUSB302 interrupt ARM: dts: rockchip: swap clock-names of gpu nodes arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu node arm64: dts: rockchip: fix status for &gmac2phy in rk3328-evb.dts arm64: dts: rockchip: remove extra assigned-clocks property from &gmac2phy node in rk3328-evb.dts ARM: dts: rockchip: fix phy nodename for rk3229-xms6 ARM: dts: rockchip: fix phy nodename for rk3228-evb arm64: dts: rockchip: Rename dwc3 device nodes on rk3399 to make dtc happy arm64: dts: rockchip: drop #address-cells, #size-cells from rk3399 pmugrf node arm64: dts: rockchip: drop #address-cells, #size-cells from rk3328 grf node arm64: dts: rockchip: drop non-existent gmac2phy pinmux options from rk3328 arm64: dts: rockchip: Replace RK805 PMIC node name with "pmic" on rk3328 boards arm64: dts: rockchip: enable DC charger detection pullup on Pinebook Pro arm64: dts: rockchip: fix inverted headphone detection on Pinebook Pro arm64: dts: rockchip: Correct PMU compatibles for PX30 and RK3308 Link: https://lore.kernel.org/r/1738941.6LdaBJIBqS@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14Merge tag 'renesas-fixes-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixesArnd Bergmann2-4/+8
Renesas fixes for v5.7 - Fix IOMMU support on R-Car V3H, - Minor fixes that are fast-tracked to avoid introducing regressions during conversion of DT bindings to json-schema. * tag 'renesas-fixes-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: r7s9210: Remove bogus clock-names from OSTM nodes arm64: dts: renesas: r8a77980: Fix IPMMU VIP[01] nodes ARM: dts: r8a73a4: Add missing CMT1 interrupts Link: https://lore.kernel.org/r/20200430084834.1384-1-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-14Merge tag 'imx-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixesArnd Bergmann2-3/+3
i.MX fixes for 5.7: - Set correct AHB clock for i.MX8MN SDMA1 device to fix a "Timeout waiting for CH0" error. - Fix a linker error for i.MX6 configurations that have ARM_CPU_SUSPEND=n, which can happen if neither CONFIG_PM, CONFIG_CPU_IDLE, nor ARM_PSCI_FW are selected. - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board. - Fix i.MX8M AIPS 'reg' properties to remove DTC simple_bus_reg warnings. - Add missing compatible "fsl,vf610-edma" for LS1028A EDMA device, so that bootloader can fix up the IOMMU entries there. Otherwise, EDMA just doesn't work on LS1028A with shipped bootloader. - Fix imx6dl-yapp4-ursa board Ethernet connection. - Fix input_val for AUDIOMIX_BIT_STREAM pinctrl defines on i.MX8MP according to Reference Manual. * tag 'imx-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: freescale: imx8mp: update input_val for AUDIOMIX_BIT_STREAM arm64: dts: imx8m: Fix AIPS reg properties arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn ARM: dts: imx27-phytec-phycard-s-rdk: Fix the I2C1 pinctrl entries ARM: imx: provide v7_cpu_resume() only on ARM_CPU_SUSPEND=y ARM: dts: imx6dl-yapp4: Fix Ursa board Ethernet connection arm64: dts: ls1028a: add "fsl,vf610-edma" compatible dt-bindings: dma: fsl-edma: fix ls1028a-edma compatible Link: https://lore.kernel.org/r/20200429063226.GT32592@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-13ARM: dts: imx6qdl-gw552x: add USB OTG supportTim Harvey1-0/+14
The GW552x-B board revision adds USB OTG support. Enable the device-tree node and configure the OTG_ID pin. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-12ARM: dts: Fix wrong mdio clock for dm814xTony Lindgren1-1/+1
Recent PTP-specific cpsw driver changes started exposing an issue on at at least j5eco-evm: Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0169004 ... (davinci_mdio_runtime_suspend) from [<c063f2a4>] (__rpm_callback+0x84/0x154) (__rpm_callback) from [<c063f394>] (rpm_callback+0x20/0x80) (rpm_callback) from [<c063f4f0>] (rpm_suspend+0xfc/0x6ac) (rpm_suspend) from [<c0640af0>] (pm_runtime_work+0x88/0xa4) (pm_runtime_work) from [<c0155338>] (process_one_work+0x228/0x568) ... Let's fix the issue by using the correct mdio clock as suggested by Grygorii Strashko <grygorii.strashko@ti.com>. The DM814_ETHERNET_CPGMAC0_CLKCTRL clock is the interconnect target module clock and managed by ti-sysc. Fixes: 6398f3478e45 ("ARM: dts: Configure interconnect target module for dm814x cpsw") Cc: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-11ARM: dts: r8a7740: Add missing extal2 to CPG nodeGeert Uytterhoeven1-1/+1
The Clock Pulse Generator (CPG) device node lacks the extal2 clock. This may lead to a failure registering the "r" clock, or to a wrong parent for the "usb24s" clock, depending on MD_CK2 pin configuration and boot loader CPG_USBCKCR register configuration. This went unnoticed, as this does not affect the single upstream board configuration, which relies on the first clock input only. Fixes: d9ffd583bf345e2e ("ARM: shmobile: r8a7740: add SoC clocks to DTS") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200508095918.6061-1-geert+renesas@glider.be
2020-05-11ARM: dts: r8a7742: Add GPIO nodesLad Prabhakar1-0/+90
Describe GPIO blocks in the R8A7742 device tree. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588794695-27852-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-11ARM: dts: r8a7742: Add [H]SCIF{A|B} supportLad Prabhakar1-0/+155
Describe [H]SCIF{A|B} ports in the R8A7742 device tree. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588794695-27852-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-11ARM: dts: r8a7742: Add IRQC supportLad Prabhakar1-0/+14
Describe the IRQC interrupt controller in the r8a7742 device tree. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1588794695-27852-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-08ARM: dts: am437x: fix networking on boards with ksz9031 phyGrygorii Strashko3-4/+4
Since commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") the networking is broken on boards: am437x-gp-evm am437x-sk-evm am437x-idk-evm All above boards have phy-mode = "rgmii" and this is worked before, because KSZ9031 PHY started with default RGMII internal delays configuration (TX off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the KSZ9031 PHY starts handling phy mode properly and disables RX delay, as result networking is become broken. Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous behavior. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Philippe Schenker <philippe.schenker@toradex.com> Fixes: bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-07ARM: dts: am57xx: fix networking on boards with ksz9031 phyGrygorii Strashko3-6/+6
Since commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") the networking is broken on boards: am571x-idk am572x-idk am574x-idk am57xx-beagle-x15 All above boards have phy-mode = "rgmii" and this is worked before because KSZ9031 PHY started with default RGMII internal delays configuration (TX off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the KSZ9031 PHY starts handling phy mode properly and disables RX delay, as result networking is become broken. Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous behavior. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Philippe Schenker <philippe.schenker@toradex.com> Fixes: bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-07ARM: dts: stm32: Add bindings for SPI2 on AV96Marek Vasut1-0/+9
Add SPI2 bindings to AV96 DT, the SPI2 IOs are present on low-speed expansion connector X6. This is disabled by default and can be enabled if something is connected there. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-07ARM: dts: stm32: Add alternate pinmux for SPI2 pinsMarek Vasut1-0/+15
Add another mux option for SPI2 pins, this is used on AV96 board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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