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2020-04-20Merge tag 'omap-for-v5.6/fixes-rc7-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesArnd Bergmann1-0/+5
Boot regression fix for N950/N9 We need to tag RNG as disabled for N950/N9 as it blocked by the secure mode. We have a similar change done for N900, but I missed adding it for N950/N9 with the recent RNG changes. * tag 'omap-for-v5.6/fixes-rc7-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: OMAP3: disable RNG on N950/N9 Link: https://lore.kernel.org/r/pull-1585340588-558327@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-04-20ARM: dts: stm32: Enable I2C2 on DHCOM PDK2 carrier boardMarek Vasut1-1/+13
The I2C2 is routed out to header X21, enable it to make it available. Add a comment to I2C5, which is routed to header X22 right next to it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 boardAhmad Fatoum4-1/+669
The Linux Automation MC-1 is a SBC built around the Octavo Systems OSD32MP15x SiP. The SiP features up to 1 GB DDR3 RAM, EEPROM and a PMIC. The board has eMMC and a SD slot for storage and GbE for both connectivity and power. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: use uniform node names for sleep pinctrl groupsAhmad Fatoum1-25/+25
While all sleep pinctrl group labels now follow a fixed naming scheme, node _names_ for these groups don't: - Some use ${dev}-[0-9], where the suffix is the normal group suffix + 1 - Some use ${dev}-sleep-[0-9], where suffix is the normal group suffix - The &ltdc node uses ${dev}-[a-z]-[0-9], where the letter matches the phandle and the number suffix is the normal group's suffix + 1 For uniformity, standardize on using ${dev}-[0-9]+ for all normal pinctrl groups and ${dev}-sleep-[0-9]+ for all sleep pinctrl groups. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: use uniform label names for sleep pinctrl phandlesAhmad Fatoum6-27/+27
Some labels follow the *_sleep_pins_* naming scheme, but some also use *_pins_sleep_*. Because most labels use the former and for uniformity with variants like sdmmc1_b4_pins_a and sdmmc1_dir_pins_a, adopt the *_sleep_pins_* scheme throughout. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: remove now redundant STM32MP15x video cell sizesAhmad Fatoum3-19/+0
With the cell sizes specified in the SoC DTSIs in a previous commit, individual boards no longer need to specify them, thus drop them. No functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: preset stm32mp15x video #address- and #size-cellsAhmad Fatoum2-0/+12
The cell count for address and size is defined by the binding and not something a board would change. Avoid each board adding this boilerplate by having the cell size specification in the SoC DTSI. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: enable stm32mp157's &gpu by defaultAhmad Fatoum4-7/+0
In the original stm32mp157c.dtsi, the GPU was disabled as some SoC variants lacked a GPU. We now have separate a dtsi for each SoC variant and variants without a GPU lack the node altogether. As we need no board support for using the GPU, enable it by default and while at it remove the now redundant status = "okay" in existing board device trees. Suggested-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: fix a typo for DAC io-channel-cells on stm32mp15Fabrice Gasnier1-2/+2
Fix a typo on STM32MP15 DAC, e.g. s/channels/channel Fixes: da6cddc7e8a4 ("ARM: dts: stm32: Add DAC support to stm32mp157c") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: fix a typo for DAC io-channel-cells on stm32h743Fabrice Gasnier1-2/+2
Fix a typo on STM32H743 DAC, e.g. s/channels/channel Fixes: 1536dec45e77 ("ARM: dts: stm32: Add DAC support on stm32h743") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: fix a typo for DAC io-channel-cells on stm32f429Fabrice Gasnier1-2/+2
Fix a typo on STM32F429 DAC, e.g. s/channels/channel Fixes: 25329b23fae9 ("ARM: dts: stm32: Add DAC support on stm32f429") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: r8a7791: Add PWM device nodesGeert Uytterhoeven1-0/+70
Enable support for the 7 PWM channels provided by PWM Timers on R-Car M2-W, by adding device nodes describing the PWM Timers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200316102540.28887-3-geert+renesas@glider.be
2020-04-20ARM: dts: r8a7791: Add TPU device nodeGeert Uytterhoeven1-0/+11
Enable support for the 4 PWM channels provided by the 16-bit Timer Pulse Unit on R-Car M2-W, by adding a device node describing the TPU. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200316102540.28887-2-geert+renesas@glider.be
2020-04-20ARM: dts: r8a73a4: Add missing CMT1 interruptsGeert Uytterhoeven1-1/+8
The R-Mobile APE6 Compare Match Timer 1 generates 8 interrupts, one for each channel, but currently only 1 is described. Fix this by adding the missing interrupts. Fixes: f7b65230019b9dac ("ARM: shmobile: r8a73a4: Add CMT1 node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200408090926.25201-1-geert+renesas@glider.be
2020-04-17dts: arm: stih407-family: remove duplicated rng nodesAlain Volmat1-14/+0
the 2 rng nodes are duplicated within the stih407-family.dtsi Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-17dts: arm: stih418: Fix complain about IRQ_TYPE_NONE usageAlain Volmat1-4/+4
Since commit 83a86fbb5b56 ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE") kernel is complaining about the IRQ_TYPE_NONE usage which shouldn't be used. Use IRQ_TYPE_LEVEL_HIGH instead. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-17ARM: tegra: Kill off "simple-panel" compatiblesRob Herring13-14/+13
"simple-panel" is a Linux driver and has never been an accepted upstream compatible string, so remove it. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-04-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netLinus Torvalds2-4/+3
Pull networking fixes from David Miller: 1) Disable RISCV BPF JIT builds when !MMU, from Björn Töpel. 2) nf_tables leaves dangling pointer after free, fix from Eric Dumazet. 3) Out of boundary write in __xsk_rcv_memcpy(), fix from Li RongQing. 4) Adjust icmp6 message source address selection when routes have a preferred source address set, from Tim Stallard. 5) Be sure to validate HSR protocol version when creating new links, from Taehee Yoo. 6) CAP_NET_ADMIN should be sufficient to manage l2tp tunnels even in non-initial namespaces, from Michael Weiß. 7) Missing release firmware call in mlx5, from Eran Ben Elisha. 8) Fix variable type in macsec_changelink(), caught by KASAN. Fix from Taehee Yoo. 9) Fix pause frame negotiation in marvell phy driver, from Clemens Gruber. 10) Record RX queue early enough in tun packet paths such that XDP programs will see the correct RX queue index, from Gilberto Bertin. 11) Fix double unlock in mptcp, from Florian Westphal. 12) Fix offset overflow in ARM bpf JIT, from Luke Nelson. 13) marvell10g needs to soft reset PHY when coming out of low power mode, from Russell King. 14) Fix MTU setting regression in stmmac for some chip types, from Florian Fainelli. * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (101 commits) amd-xgbe: Use __napi_schedule() in BH context mISDN: make dmril and dmrim static net: stmmac: dwmac-sunxi: Provide TX and RX fifo sizes net: dsa: mt7530: fix tagged frames pass-through in VLAN-unaware mode tipc: fix incorrect increasing of link window Documentation: Fix tcp_challenge_ack_limit default value net: tulip: make early_486_chipsets static dt-bindings: net: ethernet-phy: add desciption for ethernet-phy-id1234.d400 ipv6: remove redundant assignment to variable err net/rds: Use ERR_PTR for rds_message_alloc_sgs() net: mscc: ocelot: fix untagged packet drops when enslaving to vlan aware bridge selftests/bpf: Check for correct program attach/detach in xdp_attach test libbpf: Fix type of old_fd in bpf_xdp_set_link_opts libbpf: Always specify expected_attach_type on program load if supported xsk: Add missing check on user supplied headroom size mac80211: fix channel switch trigger from unknown mesh peer mac80211: fix race in ieee80211_register_hw() net: marvell10g: soft-reset the PHY when coming out of low power net: marvell10g: report firmware version net/cxgb4: Check the return from t4_query_params properly ...
2020-04-16ARM: dts: bcm283x: Disable dsi0 nodeNicolas Saenz Julienne1-0/+1
Since its inception the module was meant to be disabled by default, but the original commit failed to add the relevant property. Fixes: 4aba4cf82054 ("ARM: dts: bcm2835: Add the DSI module nodes and clocks") Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-04-14ARM: dts: imx6dl-yapp4: Fix Ursa board Ethernet connectionMichal Vokáč1-1/+1
The Y Soft yapp4 platform supports up to two Ethernet ports. The Ursa board though has only one Ethernet port populated and that is the port@2. Since the introduction of this platform into mainline a wrong port was deleted and the Ethernet could never work. Fix this by deleting the correct port node. Fixes: 87489ec3a77f ("ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards") Cc: stable@vger.kernel.org Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-14ARM: dts: colibri: introduce device trees with UHS-I supportIgor Opaniuk4-1/+86
1. Introduce dtsi with overlay configuration for enabling UHS-I for Colibri iMX6S/DL V1.1x re-design. 2. Introduce new dts for the Colibri iMX6S/DL V1.1x on Colibri Evaluation Carrier Board V3.x. However, disable 1.8V for the Colibri Evaluation Board since this carrier board has 3.3V pull-ups on. 3. Provide proper configuration for VGEN3, which allows that rail to be automatically switched to 1.8 volts for proper UHS-I operation mode. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-14ARM: dts: imx7d: Add cpu1 supplyAnson Huang5-0/+20
Each cpu-core is supposed to list its supply separately, add supply for cpu1. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-14ARM: dts: imx7: Correct CPU supply nameAnson Huang3-3/+3
i.MX7 uses cpufreq-dt driver which requires the CPU supply name to be either "cpu0-supply" or "cpu-supply", correct it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-14ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0Tudor Ambarus1-0/+4
wlsom1 has an ATECC608A-TNGTLS Secure Element connected on the i2c0 bus. Add alias for the i2c device to not rely on probe order for the i2c device numbering. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200413140922.154886-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-14ARM: dts: ux500: samsung-golden: Add proximity sensorStephan Gerhold1-0/+35
samsung-golden has the same sharp,gp2ap002s00f proximity sensor that is also used in samsung-skomer. A driver was added for it in commit 97d642e23037 ("iio: light: Add a driver for Sharp GP2AP002x00F"). Now that it was merged we can add an entry for it in the device tree for samsung-golden. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200405173252.67614-1-stephan@gerhold.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-14ARM: dts: sun8i-h2-plus-bananapi-m2-zero: Fix led polarityVincent Stehlé1-1/+1
The PWR-LED on the bananapi m2 zero board is on when gpio PL10 is low. This has been verified on a board and in the schematics [1]. [1]: http://wiki.banana-pi.org/Banana_Pi_BPI-M2_ZERO#Documents Fixes: 8b8061fcbfae ("ARM: dts: sun8i: h2+: add support for Banana Pi M2 Zero board") Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> Cc: Icenowy Zheng <icenowy@aosc.io> Cc: Maxime Ripard <mripard@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-14ARM: dts: sunxi: h3/h5: Add msgbox nodeSamuel Holland1-0/+10
The H3 and H5 SoCs contain a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-14ARM: dts: sunxi: a83t: Add msgbox nodeSamuel Holland1-0/+10
The A83T SoC contains a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Tested-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-14ARM: dts: sun8i-h3: add opp table for mali gpuQiang Yu1-3/+21
OPP table value is get from orangepi lichee linux-3.4 kernel driver. Signed-off-by: Qiang Yu <yuq825@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-14ARM: dts: sun7i: Add A20-OLinuXino-LIME-eMMCStefan Mavrodiev2-0/+33
There is new version of A20-OLinuXino-LIME with eMMC storage. The card routing is the same as in A20-OLinuXino-LIME2-eMMC, so this is basically copy/paste. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-14efi/arm: Deal with ADR going out of range in efi_enter_kernel()Ard Biesheuvel1-1/+2
Commit 0698fac4ac2a ("efi/arm: Clean EFI stub exit code from cache instead of avoiding it") introduced a PC-relative reference to 'call_cache_fn' into efi_enter_kernel(), which lives way at the end of head.S. In some cases, the ARM version of the ADR instruction does not have sufficient range, resulting in a build error: arch/arm/boot/compressed/head.S:1453: Error: invalid constant (fffffffffffffbe4) after fixup ARM defines an alternative with a wider range, called ADRL, but this does not exist for Thumb-2. At the same time, the ADR instruction in Thumb-2 has a wider range, and so it does not suffer from the same issue. So let's switch to ADRL for ARM builds, and keep the ADR for Thumb-2 builds. Reported-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200409130434.6736-6-ardb@kernel.org
2020-04-13ARM: dts: qcom: ipq4019: fix high resolution timerAbhishek Sahu1-0/+1
Cherry-picked from CAF QSDK repo. Original commit message: The kernel is failing in switching the timer for high resolution mode and clock source operates in 10ms resolution. The always-on property needs to be given for timer device tree node to make clock source working in 1ns resolution. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Tested-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200403114040.349787-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-13ARM: dts: qcom: add scm definition to ipq806xAnsuel Smith1-0/+6
Add missing scm definition for ipq806x soc Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200319224424.18473-1-ansuelsmth@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-13Merge tag 'tags/bcm2835-dt-fixes-2020-03-27' into devicetree/fixesFlorian Fainelli1-0/+3
This patch is to be squashed into 55c7c0621078 ("ARM: dts: bcm283x: Fix vc4's firmware bus DMA limitations") as it turned out to be faulty Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-04-13Merge tag 'tags/bcm2835-dt-next-2020-03-27' into devicetree/nextFlorian Fainelli6-2/+27
- First patch updates RPi4's expgpio's GPIO labels, adding the SD power rail. - Second patch adds a fixed regulator that controls the SD power and hooks it up with emmc2. - Third patch rolls back to the firmware based power driver as the MMIO version is unstable. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-04-13arm: dts: mt7623: add phy-mode property for gmac2Sean Wang1-0/+1
Add phy-mode property required by phylink on gmac2 Fixes: b8fc9f30821e ("net: ethernet: mediatek: Add basic PHYLINK support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Link: https://lore.kernel.org/r/70e3eff31ecd500ed4862d9de28325a4dbd15105.1583648927.git.sean.wang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-04-13ARM: dts: imx6q-dhcom: Add DH 560-200 display unit supportMarek Vasut1-2/+113
Add DT bits to support the DH 560-200 display unit, which can be plugged into the side of the PDK2 board. The display unit contains a display, EDT ETM0700G0EDH6 and an EDT FT5x06 touchscreen controller. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-13ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICPCristian Birsan2-0/+798
This is the addition of the new SAMA5D2 Industrial Connectivity Platform(ICP). Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Link: https://lore.kernel.org/r/20200410164320.7658-3-cristian.birsan@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: at91-sama5d27_som1: Enable eeprom deviceLudovic Desroches2-14/+22
There is an EEPROM on at91-sama5d27_som1 connected to i2c0. i2c0 node has to be moved from at91-sama5d27_som1_ek to at91-sama5d27_som1. Enable the i2c EEPROM found on at91-sama5d27_som1. Add an alias for the i2c node. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-5-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d2_xplained: Add QSPI0 + SPI NOR memory nodesCyrille Pitchen1-0/+68
This patch enables the QSPI0 controller, configures its pin muxing and declares a jedec,spi-nor memory. sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash memory which advertises a maximum frequency of 80MHz for Quad IO Fast Read. Set the spi-max-frequency to 80MHz knowing that actually the QSPI drver will set the SPI bus clock to 166MHz / 3 = 55.3MHz. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-3-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sam9x60ek: Add sdmmc1 nodeTudor Ambarus1-0/+21
sdmmc1 is not populated by default on sam9x60ek, but there are cases where it is populated with wilc3000. Add the node, but keep it disabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-4-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d27_som1: Add SPI NOR flash mappingClaudiu Beznea1-0/+32
Add SoM1 flash mapping, identical with the other SPI NOR flash mappings found on the other at91 boards. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-2-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sam9x60ek: Use quad mode in the spi-nor flashTudor Ambarus1-0/+2
Both the QSPI controller and the sst26vf064b flash support quad mode, enable it. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d27_som1_ek: add an alias for i2c0Ludovic Desroches1-0/+1
Add aliases for i2c devices to not rely on probe order for i2c device numbering. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20200401221504.41196-5-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d27_som1_ek: enable i2c0Ludovic Desroches1-0/+13
Enable i2c0 controller. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20200401221504.41196-4-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d2_ptc_ek: add PB_USER as wakeup sourceLudovic Desroches1-0/+1
Add the push button PB_USER as wakeup source Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20200401221504.41196-3-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d2_ptc_ek: fix vbus pinLudovic Desroches1-1/+1
The gpio property for the vbus pin doesn't match the pinctrl and is not correct. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Fixes: 42ed535595ec "ARM: dts: at91: introduce the sama5d2 ptc ek board" Cc: stable@vger.kernel.org # 4.19 and later Link: https://lore.kernel.org/r/20200401221947.41502-1-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sama5d2_ptc_ek: fix sdmmc0 node descriptionLudovic Desroches1-2/+0
Remove non-removable and mmc-ddr-1_8v properties from the sdmmc0 node which come probably from an unchecked copy/paste. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Fixes:42ed535595ec "ARM: dts: at91: introduce the sama5d2 ptc ek board" Cc: stable@vger.kernel.org # 4.19 and later Link: https://lore.kernel.org/r/20200401221504.41196-1-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: rm9200: switch to new clock bindingsAlexandre Belloni1-273/+23
Switch at91rm9200 boards to the new PMC clock bindings. Link: https://lore.kernel.org/r/20200324124154.368335-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: at91sam9g45: switch to new clock bindingsAlexandre Belloni2-302/+40
Switch at91sam9g45 boards to the new PMC clock bindings. Link: https://lore.kernel.org/r/20200117210619.17768-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>