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We are missing alwon ethernet clock for dm814x and this prevents us
from probing the CPSW with device tree only data. Looks like Ethernet
currently only works if it has been enabled in the bootloader.
Looks like relying on the bootloader clocks is not an issue with the
mainline kernel currently, but it will be an issue when configuring
CPSW Ethernet to probe with device tree data only as we will be managing
the clocks.
Fixes: 26ca2e973844 ("clk: ti: dm814: add clkctrl clock data")
Cc: linux-clk@vger.kernel.org
Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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An experimental test with the command below gives
for example this error:
arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000:
'#address-cells', '#size-cells'
do not match any of the regexes: 'pinctrl-[0-9]+'
'#address-cells' and '#size-cells' are not a valid property
for i2s nodes, so remove them.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Current dts files with 'i2s' nodes are manually verified.
In order to automate this process rockchip-i2s.txt
has to be converted to yaml. In the new setup dtbs_check with
rockchip-i2s.yaml expect clocks and clock-names values
in the same order. Fix this for some older Rockchip models.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives for example this error:
arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30160000:
'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'
'clock-names' is not a valid property name for usb_host nodes with
compatible string 'generic-ohci', so remove them.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312171441.21144-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives for example this error:
arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30140000:
'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'
'clock-names' is not a valid property name for usb_host nodes with
compatible string 'generic-ehci', so remove them.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312171441.21144-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Current dts files with 'spdif' nodes are manually verified.
In order to automate this process rockchip-spdif.txt
has to be converted to yaml. In the new setup dtbs_check with
rockchip-spdif.yaml expect clocks and clock-names values
in the same order. Fix this for some older Rockchip models.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312172240.21362-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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IO voltage regulator for the SD card must be kept on all the time,
otherwise when the board reboots the SD card can't be read by the
bootloader.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Link: https://lore.kernel.org/r/20200219204224.34154-1-JPEWhacker@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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An experimental test with the command below gives these errors:
arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: adc@1038c000:
'clock-frequency'
does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/rv1108-evb.dt.yaml: adc@1038c000:
'clock-frequency'
does not match any of the regexes: 'pinctrl-[0-9]+'
'clock-frequency' is not a valid property for a saradc node,
so remove it.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/
rockchip-saradc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200313132646.10317-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives this error:
arch/arm/boot/dts/rk3288-firefly-reload.dt.yaml: saradc@ff100000:
'vref-supply' is a required property
PMIC Channel OUT11 with powername 'vcc_18'
(connected through R155 bridge with 'vccio_wl')
is used for the recovery key and ADC_AVDD_1V8.
Fix error by adding 'vcc_18' as vref for the saradc.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/
rockchip-saradc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200314140755.4877-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch enables to use DMAC for all UARTs that are connected to
dmac_peri core for Rochchip RK3288.
Only uart2 is connected different DMAC (dmac_bus_s) so keep current
settings on this patch.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20200315095115.10106-1-katsuhiro@katsuster.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives for example this error:
arch/arm/boot/dts/rk3066a-bqcurie2.dt.yaml:
l2-cache-controller@10138000: $nodename:0:
'l2-cache-controller@10138000'
does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Fix error by changing nodename to 'cache-controller'.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200316165453.3022-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives this error:
arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: lvds-encoder:
'ports' is a required property
Fix error by adding a ports wrapper for port@0 and port@1
inside the 'lvds-encoder' node for rk3188-bqedison2qc.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/
bridge/lvds-codec.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200316174647.5598-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Pull ARM fixes from Russell King:
- allow use of ARMv8 arch timer in 32-bit VDSO
- rename missed .fixup section
- fix kbuild issue with stack protector GCC plugin
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8961/2: Fix Kbuild issue caused by per-task stack protector GCC plugin
ARM: 8958/1: rename missed uaccess .fixup section
ARM: 8957/1: VDSO: Match ARMv8 timer in cntvct_functional()
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Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.
Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is
common to all channels.
Fixes: 92fa4f4cc2cd ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add USB3 controller nodes for Pro5 SoC and the boards.
Pro5 SoC has 2 controllers. USB0 includes 1 SS-PHY and 1 HS-PHY, and USB1
includes 1 SS-PHY and 2 HS-PHY.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The Atheros AR8035 PHY can be autodetected but can't use interrupt
support provided on this board. Define MDIO bus and the PHY node to make
it work properly.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Atheros AR8035 PHY can be autodetected but can't use interrupt
support provided on this board. Define MDIO bus and the PHY node to make
it work properly.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Set a sound name prefix for the HPA, as otherwise the sound controls
naming will clash with the controls of the DAC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Currently we don't ensure that the LDB is clocked from the video PLL
and relied on the bootloader to do the correct setup. This isn't always
true, in which case we would run with a vastly different video clock
than the desired one. Fix this by assigning the proper parent to the
LDB.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex Vybrid-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex i.MX7-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex iMX6-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files from Toradex.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add IPU CSI ports and capture-subsystem device so the capture subsystem
part of the IPUv3EX can be used with the staging imx-media driver.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add nvmem related property for cpu0, then nvmem API could be used
to read cpu speed grading to avoid directly read OCOTP registers
mapped which could not handle defer probe.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for all the imx6qdl-pico variants.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the imx6ul pico board with dwarf baseboard combination.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the imx7d pico board with nymph baseboard combination.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the imx7d pico board with dwarf baseboard combination.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Olimex Olinuxino board has a user led connected to SSP1_DETECT.
But since this pin is listed in mmc0_pins_fixup, it is already claimed
by MMC driver and this results in this error during boot:
[ 1.390000] imx23-pinctrl 80018000.pinctrl: pin SSP1_DETECT already
requested by 80010000.spi; cannot claim for leds
[ 1.400000] imx23-pinctrl 80018000.pinctrl: pin-65 (leds) status -22
[ 1.410000] imx23-pinctrl 80018000.pinctrl: could not request pin 65
(SSP1_DETECT) from group led_gpio2_1.0 on device 80018000.pinctrl
[ 1.420000] leds-gpio leds: Error applying setting, reverse things back
[ 1.430000] leds-gpio: probe of leds failed with error -22
This fix it, introduce mmc0_sck_cfg and switch the Olinuxino board to it.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
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Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
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Add USB components and according pin groups in aspeed-g6 dtsi.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
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On those boards, as stated in schematics files, the regulator used for IOs
is VDD. It was wrongly set to v3v3.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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On STM32MP1 DK1, DK2, ED1 and EV1 boards, there is only a micro SD socket.
This is also the case on Avenger board.
They don't support the Write Protect pin.
The disable-wp is then added in the SD-cards sdmmc1 nodes.
This avoids executing some code and a warning during driver probe.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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The broken-cd properties are replaced with cd-gpios, with the correct
GPIO to detect the card insertion. The GPIO lines require a pull-up.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Remove unused properties from stpmic node.
The issues have been detected by running dtbs_check.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Rename stmfx joystick pins names according to yaml description.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their
Cortex-A7 cores running at 650 MHz.
Add the clock-frequency property to CPU nodes to avoid warnings about
them missing.
[1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html
[2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html
[3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp157c-ed1 board.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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The L3 interconnect's memory map is from 0x0 to
0xffffffff. Out of this, System memory (SDRAM) can be
accessed from 0x80000000 to 0xffffffff (2GB)
DRA7 does support 4GB of SDRAM but upper 2GB can only be
accessed by the MPU subsystem.
Add the dma-ranges property to reflect the physical address limit
of the L3 bus.
Issues ere observed only with SATA on DRA7-EVM with 4GB RAM
and CONFIG_ARM_LPAE enabled. This is because the controller
supports 64-bit DMA and its driver sets the dma_mask to 64-bit
thus resulting in DMA accesses beyond L3 limit of 2G.
Setting the correct bus_dma_limit fixes the issue.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Cc: stable@kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The Samsung GT-S7710 also known as XCover 2 or Skomer is a
Ux500-based mobile phone. In the source code release from
Samsung's open source site it is referred to as "Skomer".
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200307193627.4092-1-linus.walleij@linaro.org
[Typographic fixups when applying]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes
of the stm32mp157c-ev1 board.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp15xx-dkx.dtsi
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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On DK boards, all I2C4 bus slaves supports I2C Fast Mode hence setting
the bus frequency to 400 KHz.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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On this board, the I2C4 bus has only a single slave (pmic) which
supports I2C Fast Mode hence setting bus frequency to 400 KHz.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were
previously erroneously provided by the clock and reset controller.
clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210.
This patch updates device tree sound node to use clk_out_1 from the PMC
provider as mclk and uses assigned-clock properties to specify clock
parents for clk_out_1 and extern1.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock.
These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.
This patch adds #clock-cells property with 1 clock specifier to the
Tegra PMC node in device tree.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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On Jetson TK1 USB 2-0 port is controlled by phy-tegra-usb driver
rather than padctl driver. Remove the entry for the same.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Define the sdhci pinctrl state as "default" so it gets applied
correctly and to match all other RPis.
Fixes: 2c7c040c73e9 ("ARM: dts: bcm2835: Add Raspberry Pi Zero W")
Signed-off-by: Nick Hudson <skrll@netbsd.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Tony Lindgren
Johan Jonker
Joshua Watt
Katsuhiro Suzuki
Linus Torvalds
Kunihiko Hayashi
Oleksij Rempel
Lucas Stach
Igor Opaniuk
Philipp Zabel
Peng Fan
Fabio Estevam
Michael Heimpold
Tao Ren
Yann Gautier
Benjamin Gaignard
Ahmad Fatoum
Alain Volmat
Roger Quadros
Linus Walleij
Sowjanya Komatineni
Nagarjuna Kristam
Nick Hudson