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2019-10-02ARM: dts: exynos: Add interrupts to DMC controller in Exynos5422Lukasz Luba1-0/+3
Add interrupts to Dynamic Memory Controller in Exynos5422 and Odroid XU3-family boards. It will be used instead of devfreq polling mode governor. The interrupt is connected to performance counters private for DMC, which might track utilisation of the memory channels. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Extend mapped region for DMC on Exynos5422Lukasz Luba1-1/+1
DMC Adaptive Voltage and Frequency Scaling driver in interrupt mode needs to access registers at address offset near 0x10000. These registers are private DMC performance counters, which might be used as interrupt trigger when overflow. Potential usage is to skip polling in devfreq framework and switch to interrupt managed bandwidth control. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Add audio support (WM1811 CODEC boards) to Arndale boardSylwester Nawrocki1-1/+26
Add sound node and the clock configurations for the I2S controller for audio support on the Exynos5250 SoC Arndale boards with WM1811 based audio daughter board. We need to increase drive strength of the I2S bus, otherwise the audio CODEC doesn't work. Likely the CODEC's master clock is the main issue here. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifierKrzysztof Kozlowski4-16/+16
Replace hard-coded number with appropriate define for GIC SPI or PPI specifier in interrupt. This makes code easier to read. No expected functionality change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xxKrzysztof Kozlowski1-21/+12
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid XU (Exynos5410), Odroid HC1 (Exynos5422) and Arndale Octa (Exynos5420). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250Krzysztof Kozlowski1-17/+6
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
2019-10-02ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412Krzysztof Kozlowski1-14/+5
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
2019-10-02ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210Krzysztof Kozlowski1-15/+6
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
2019-10-02ARM: dts: exynos: Rename Multi Core Timer node to "timer"Krzysztof Kozlowski6-6/+6
The device node name should reflect generic class of a device so rename the Multi Core Timer node from "mct" to "timer". This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Split phandle in dmas propertyMaciej Falkowski3-17/+17
Change representation of phandle array as then dt-schema counts number of its items properly. Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Remove obsolete IRQ lines on Exynos3250Maciej Falkowski1-6/+3
In commit 7222e8db2d50 ("iommu/exynos: Fix build errors") Exynos3250 IOMMU driver stopped supporting two IRQ lines. The second IRQ line in DTS is ignored and is not needed. Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Add samsung,asv-bin property to Odroid XU3 LiteSylwester Nawrocki1-0/+4
The Exynos5422 SoC used on Odroid XU3 Lite boards belongs to a special ASV bin but this information cannot be read from the Chip ID block registers. Add samsung,asv-bin property for XU3 Lite to ensure the ASV bin is properly determined. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Add "syscon" compatible string to chipid node on Exynos5Sylwester Nawrocki1-2/+2
The Chip ID block in addition to exact chip revision information contains data and control registers for ASV (Adaptive Supply Voltage) and ABB (Adaptive Body Bias). Add "syscon" compatible so the Chip ID block can be shared by respective drivers. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02ARM: dts: exynos: Add support ARM architected timers on Exynos5Marek Szyprowski3-0/+17
All CortexA7/A15 based Exynos5 SoCs have ARM architected timers, so enable support for them directly in the base dtsi. None of the known firmware properly configures CNTFRQ arch timer register, so force clock frequency to 24MHz, which is the only configuration supported by the remaining clock drivers so far. Stock firmware for Peach Pit and Pi Chromebooks also doesn't reset properly other arch timer registers, so add respective properties indicating that. Other Exynos5-based boards behaves correctly in this area, what finally allows to enable support for KVM-based virtualization. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01ARM: dts: qcom: ipq4019: Add SDHCI controller nodeRobert Marko1-0/+12
IPQ4019 has a built in SD/eMMC controller which is supported by the SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding. So lets add the appropriate node for it. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-02ARM: dts: imx6qdl-udoo: Add Pincfgs for OTGMarkus Kueffner1-0/+14
Add Pincfgs to enable the i.MX6's OTG feature for UDOO Signed-off-by: Markus Kueffner <kueffner.markus@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6ull-colibri: Add general wakeup key used on ColibriPhilippe Schenker1-0/+14
This adds the possibility to wake the module with an external signal as defined in the Colibri standard Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6ull: improve can templatesMax Krummenacher3-4/+28
Add the pinmuxing and a inactive node for flexcan1 on SODIMM 55/63 and move the inactive flexcan nodes to imx6ull-colibri-eval-v3.dtsi where they belong. Note that this commit does not enable flexcan functionality, but rather eases the effort needed to do so. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6ull-colibri: Add watchdogPhilippe Schenker1-0/+12
This patch adds the watchdog to the imx6ull-colibri devicetree Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6ull-colibri: reduce v_batt current in power offMax Krummenacher1-3/+3
Reduce the current drawn from VCC_BATT when the main power on the 3V3 pins to the module are switched off. This switches off SoC internal pull resistors which are provided on the module for TAMPER7 and TAMPER9 SoC pin and switches on a pull down instead of a pullup for the USBC_DET module pin (TAMPER2). Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6ull-colibri: Add sleep mode to fecPhilippe Schenker1-1/+17
Do not change the clock as the power for this phy is switched with that clock. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6-colibri: Add missing pinmuxing to Toradex eval boardPhilippe Schenker1-0/+8
This patch adds some missing pinmuxing that is in the colibri standard to the dts. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6-apalis: Add touchscreens used on Toradex eval boardsPhilippe Schenker4-0/+70
This commit adds the touchscreen from Toradex so one can enable it. It is disabled by default because the pins are also used for PWM<B>, PWM<C>, aka pwm2, pwm3 which is the standard use for colibri boards. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6qdl-apalis: Add sleep state to can interfacesPhilippe Schenker1-6/+21
This patch prepares the devicetree for the new Ixora V1.2 where we are able to turn off the supply of the can transceiver. This implies to use a sleep state on transmission pins in order to prevent backfeeding. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx6qdl-colibri: Add missing pin declaration in iomuxcPhilippe Schenker1-0/+17
This adds the muxing for the optional pins usb-oc (overcurrent) and usb-id. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx7-colibri: Add touch controllersPhilippe Schenker1-0/+24
Add touch controller that is connected over an I2C bus. It is disabled by default because the pins are also used for PWM, which is the standard use for colibri boards. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx7-colibri: fix 1.8V/UHS supportStefan Agner1-1/+22
Add pinmuxing and do not specify voltage restrictions for the usdhc instance available on the modules edge connector. This allows to use SD-cards with higher transfer modes if supported by the carrier board. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx7-colibri: add GPIO wakeup keyStefan Agner2-1/+20
Add wakeup GPIO key which is able to wake the system from sleep modes (e.g. Suspend-to-Memory). Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: imx7ulp: remove mipi pll clock nodeFancy Fang1-13/+4
According to the IMX7ULP reference manual, the mipi pll clock comes from the MIPI PHY PLL output. So it should not be defined as a fixed clock. So remove this clock node and all the references to it. Signed-off-by: Fancy Fang <chen.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: vf610-zii-scu4-aib: Drop "rs485-rts-delay" propertyAndrey Smirnov1-2/+0
LPUART driver does not support specifying "rs485-rts-delay" property. Drop it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-02ARM: dts: opos6ul/opos6uldev: rework device tree to support i.MX6ULLSébastien Szymanski7-565/+547
Rework the device trees of the OPOS6UL and OPOS6ULDev boards to support the OPOS6UL SoM with an i.MX6ULL SoC. The device trees are now as following: - imx6ul-imx6ull-opos6ul.dtsi common for both i.MX6UL and i.MX6ULL OPOS6UL SoM. - imx6ul-opos6ul.dtsi for i.MX6UL OPOS6UL SoM. It includes imx6ul.dtsi and imx6ul-imx6ull-opos6ul.dtsi. - imx6ull-opos6ul.dtsi for i.MX6ULL OPOS6UL SoM. It includes imx6ull.dtsi and imx6ul-imx6ull-opos6ul.dtsi. - imx6ul-imx6ull-opos6uldev.dtsi OPOS6ULDev base device tree. - imx6ul-opos6uldev.dts OPOS6ULDev board with an i.MX6UL OPOS6UL SoM. It includes imx6ul-opos6ul.dtsi and imx6ul-imx6ull-opos6uldevdtsi. - imx6ull-opos6uldev.dts OPOS6ULDev board with an i.MX6ULL OPOS6UL SoM. It includes imx6ull-opos6ul.dtsi and imx6ul-imx6ull-opos6uldevdtsi. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-01ARM: dts: exynos: Add DMC device to Exynos5422 and Odroid XU3-family boardsLukasz Luba2-0/+188
Add description of Dynamic Memory Controller and PPMU counters to Exynos5422 and Odroid XU3/XU4/HC1 boards. They are used by exynos5422-dmc driver. There is a definition of the memory chip, which is then used during calculation of timings for each OPP. The algorithm in the driver needs these two sets to bound the timings. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01ARM: dts: exynos: Add syscon compatible to clock controller on Exynos542xLukasz Luba2-2/+2
In order to get the clock by phandle and use it with regmap it needs to be compatible with syscon. The DMC driver uses two registers from clock register set and needs the regmap of them. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01ARM: dts: ux500: Fix up the CPU thermal zoneLinus Walleij1-3/+8
This fixes up the default ux500 CPU thermal zone: - Set polling delay to 0 and explain why - Set passive polling delay to 250 - Remove restrictions from the CPU cooling device, we should use all cpufreq steps to cool down if needed. Link: https://lore.kernel.org/r/20191001074628.8122-1-linus.walleij@linaro.org Fixes: b786a05f6ce4 ("ARM: dts: ux500: Update thermal zone") Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-10-01ARM: dts: emev2: Add whitespace for GPIO nodesMagnus Damm1-0/+4
It turns out that the GPIO nodes for EMEV2 are missing whitespace, so focus on what is important in life and adjust the coding style to match the rest of the code base. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Link: https://lore.kernel.org/r/156877169225.29395.9771334507494949542.sendpatchset@octo Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01ARM: dts: lager: Replace spaces by TABsGeert Uytterhoeven1-4/+4
Make it easier to compare the file with other similar files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190904120114.1894-3-geert+renesas@glider.be
2019-10-01ARM: dts: gose: Replace spaces by TABsGeert Uytterhoeven1-55/+55
Make it easier to compare the file with other similar files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190904120114.1894-2-geert+renesas@glider.be
2019-09-30ARM: dts: rockchip: Add cpu id to rk3288 efuse nodeDouglas Anderson1-0/+3
This just adds in another field of what's stored in the e-fuse on rk3288. Though I can't personally promise that every rk3288 out there has the CPU ID stored in the eFuse at this location, there is some evidence that it is correct: - This matches what was in the Chrome OS 3.14 branch (see EFUSE_CHIP_UID_OFFSET and EFUSE_CHIP_UID_LEN) for rk3288. - The upstream rk3399 dts file has this same data at the same offset and with the same length, indiciating that this is likely common for several modern Rockchip SoCs. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20190919142611.1.I309434f00a2a9be71e4437991fe08abc12f06e2e@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-09-30Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds3-62/+24
Pull ARM SoC fixes from Olof Johansson: "A few fixes that have trickled in through the merge window: - Video fixes for OMAP due to panel-dpi driver removal - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7 - Fixing arch version on ASpeed ast2500 - Two fixes for reset handling on ARM SCMI" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: aspeed: ast2500 is ARMv6K reset: reset-scmi: add missing handle initialisation firmware: arm_scmi: reset: fix reset_state assignment in scmi_domain_reset bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle() ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux ARM: dts: am3517-evm: Fix missing video ARM: dts: logicpd-torpedo-baseboard: Fix missing video ARM: omap2plus_defconfig: Fix missing video bus: ti-sysc: Fix handling of invalid clocks bus: ti-sysc: Fix clock handling for no-idle quirks
2019-09-30ARM: dts: am4372: Set memory bandwidth limit for DISPCPeter Ujfalusi1-0/+2
Set memory bandwidth limit to filter out resolutions above 720p@60Hz to avoid underflow errors due to the bandwidth needs of higher resolutions. am43xx can not provide enough bandwidth to DISPC to correctly handle 'high' resolutions. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-29Merge tag 'fixes-5.4-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesOlof Johansson3-62/+24
Fixes for omap variants Few fixes for ti-sysc interconnect target module driver for no-idle quirks that caused nfsroot to fail on some dra7 boards. And let's fixes to get LCD working again for logicpd board that got broken a while back with removal of panel-dpi driver. We need to now use generic CONFIG_DRM_PANEL_SIMPLE instead. * tag 'fixes-5.4-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle() ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux ARM: dts: am3517-evm: Fix missing video ARM: dts: logicpd-torpedo-baseboard: Fix missing video ARM: omap2plus_defconfig: Fix missing video bus: ti-sysc: Fix handling of invalid clocks bus: ti-sysc: Fix clock handling for no-idle quirks Link: https://lore.kernel.org/r/pull-1568819401-72461@atomide.com Signed-off-by: Olof Johansson <olof@lixom.net>
2019-09-25ARM: OMAP2+: Add missing LCDC midlemode for am335xTony Lindgren1-1/+3
TRM "Table 13-34. SYSCONFIG Register Field Descriptions" lists both standbymode and idlemode that should be just the sidle and midle registers where midle is currently unconfigured for lcdc_sysc. As the dts data has been generated based on lcdc_sysc, we now have an empty "ti,sysc-midle" property. And so we currently get a warning for lcdc because of a difference with dts provided configuration compared to the legacy platform data. This is because lcdc has SYSC_HAS_MIDLEMODE configured in the platform data without configuring the modes. Let's fix the issue by adding the missing midlemode to lcdc_sysc, and configuring the "ti,sysc-midle" property based on the TRM values. Fixes: f711c575cfec ("ARM: dts: am335x: Add l4 interconnect hierarchy and ti-sysc data") Cc: Jyri Sarha <jsarha@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-24ARM: dts: Fix gpio0 flags for am335x-icev2Tony Lindgren2-2/+2
The ti,no-idle-on-init and ti,no-reset-on-init flags need to be at the interconnect target module level for the modules that have it defined. Otherwise we get the following warnings: dts flag should be at module level for ti,no-idle-on-init dts flag should be at module level for ti,no-reset-on-init Fixes: 87fc89ced3a7 ("ARM: dts: am335x: Move l4 child devices to probe them with ti-sysc") Cc: Lokesh Vutla <lokeshvutla@ti.com> Reported-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-23Merge tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds1-2/+0
Pull PCI updates from Bjorn Helgaas: "Enumeration: - Consolidate _HPP/_HPX stuff in pci-acpi.c and simplify it (Krzysztof Wilczynski) - Fix incorrect PCIe device types and remove dev->has_secondary_link to simplify code that deals with upstream/downstream ports (Mika Westerberg) - After suspend, restore Resizable BAR size bits correctly for 1MB BARs (Sumit Saxena) - Enable PCI_MSI_IRQ_DOMAIN support for RISC-V (Wesley Terpstra) Virtualization: - Add ACS quirks for iProc PAXB (Abhinav Ratna), Amazon Annapurna Labs (Ali Saidi) - Move sysfs SR-IOV functions to iov.c (Kelsey Skunberg) - Remove group write permissions from sysfs sriov_numvfs, sriov_drivers_autoprobe (Kelsey Skunberg) Hotplug: - Simplify pciehp indicator control (Denis Efremov) Peer-to-peer DMA: - Allow P2P DMA between root ports for whitelisted bridges (Logan Gunthorpe) - Whitelist some Intel host bridges for P2P DMA (Logan Gunthorpe) - DMA map P2P DMA requests that traverse host bridge (Logan Gunthorpe) Amazon Annapurna Labs host bridge driver: - Add DT binding and controller driver (Jonathan Chocron) Hyper-V host bridge driver: - Fix hv_pci_dev->pci_slot use-after-free (Dexuan Cui) - Fix PCI domain number collisions (Haiyang Zhang) - Use instance ID bytes 4 & 5 as PCI domain numbers (Haiyang Zhang) - Fix build errors on non-SYSFS config (Randy Dunlap) i.MX6 host bridge driver: - Limit DBI register length (Stefan Agner) Intel VMD host bridge driver: - Fix config addressing issues (Jon Derrick) Layerscape host bridge driver: - Add bar_fixed_64bit property to endpoint driver (Xiaowei Bao) - Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC drivers separately (Xiaowei Bao) Mediatek host bridge driver: - Add MT7629 controller support (Jianjun Wang) Mobiveil host bridge driver: - Fix CPU base address setup (Hou Zhiqiang) - Make "num-lanes" property optional (Hou Zhiqiang) Tegra host bridge driver: - Fix OF node reference leak (Nishka Dasgupta) - Disable MSI for root ports to work around design problem (Vidya Sagar) - Add Tegra194 DT binding and controller support (Vidya Sagar) - Add support for sideband pins and slot regulators (Vidya Sagar) - Add PIPE2UPHY support (Vidya Sagar) Misc: - Remove unused pci_block_cfg_access() et al (Kelsey Skunberg) - Unexport pci_bus_get(), etc (Kelsey Skunberg) - Hide PM, VC, link speed, ATS, ECRC, PTM constants and interfaces in the PCI core (Kelsey Skunberg) - Clean up sysfs DEVICE_ATTR() usage (Kelsey Skunberg) - Mark expected switch fall-through (Gustavo A. R. Silva) - Propagate errors for optional regulators and PHYs (Thierry Reding) - Fix kernel command line resource_alignment parameter issues (Logan Gunthorpe)" * tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (112 commits) PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI arm64: tegra: Add PCIe slot supply information in p2972-0000 platform arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to enable slot regulators PCI: tegra: Add support to configure sideband pins PCI: vmd: Fix shadow offsets to reflect spec changes PCI: vmd: Fix config addressing when using bus offsets PCI: dwc: Add validation that PCIe core is set to correct mode PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port PCI: Add ACS quirk for Amazon Annapurna Labs root ports PCI: Add Amazon's Annapurna Labs vendor ID MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries dt-bindings: PCI: tegra: Add sideband pins configuration entries PCI: tegra: Add Tegra194 PCIe support PCI: Get rid of dev->has_secondary_link flag ...
2019-09-23Merge branch 'fixes-merge-window-pt2' into fixesTony Lindgren10-36/+34
2019-09-23DTS: ARM: gta04: introduce legacy spi-cs-high to make display work againH. Nikolaus Schaller1-0/+1
commit 6953c57ab172 "gpio: of: Handle SPI chipselect legacy bindings" did introduce logic to centrally handle the legacy spi-cs-high property in combination with cs-gpios. This assumes that the polarity of the CS has to be inverted if spi-cs-high is missing, even and especially if non-legacy GPIO_ACTIVE_HIGH is specified. The DTS for the GTA04 was orginally introduced under the assumption that there is no need for spi-cs-high if the gpio is defined with proper polarity GPIO_ACTIVE_HIGH. This was not a problem until gpiolib changed the interpretation of GPIO_ACTIVE_HIGH and missing spi-cs-high. The effect is that the missing spi-cs-high is now interpreted as CS being low (despite GPIO_ACTIVE_HIGH) which turns off the SPI interface when the panel is to be programmed by the panel driver. Therefore, we have to add the redundant and legacy spi-cs-high property to properly activate CS. Cc: stable@vger.kernel.org Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-23ARM: dts: Fix wrong clocks for dra7 mcaspTony Lindgren1-27/+21
The ahclkr clkctrl clock bit 28 only exists for mcasp 1 and 2 on dra7. This causes the following warning on beagle-x15: ti-sysc 48468000.target-module: could not add child clock ahclkr: -19 Also the mcasp clkctrl clock bits are wrong: For mcasp1 and 2 we have four clocks at bits 28, 24, 22 and 0: bit 28 is ahclkr bit 24 is ahclkx bit 22 is auxclk bit 0 is fck For mcasp3 to 8 we have three clocks at bits 24, 22 and 0. bit 24 is ahclkx bit 22 is auxclk bit 0 is fck We do not have currently mapped auxclk at bit 22 for the drivers, that can be added if needed. Fixes: 5241ccbf2819 ("ARM: dts: Add missing ranges for dra7 mcasp l3 ports") Cc: Suman Anna <s-anna@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-22Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds1-1/+13
Pull ARM updates from Russell King: - fix various clang build and cppcheck issues - switch ARM to use new common outgoing-CPU-notification code - add some additional explanation about the boot code - kbuild "make clean" fixes - get rid of another "(____ptrval____)", this time for the VDSO code - avoid treating cache maintenance faults as a write - add a frame pointer unwinder implementation for clang - add EDAC support for Aurora L2 cache - improve robustness of adjust_lowmem_bounds() finding the bounds of lowmem. - add reset control for AMBA primecell devices * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (24 commits) ARM: 8906/1: drivers/amba: add reset control to amba bus probe ARM: 8905/1: Emit __gnu_mcount_nc when using Clang 10.0.0 or newer ARM: 8904/1: skip nomap memblocks while finding the lowmem/highmem boundary ARM: 8903/1: ensure that usable memory in bank 0 starts from a PMD-aligned address ARM: 8891/1: EDAC: armada_xp: Add support for more SoCs ARM: 8888/1: EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC ARM: 8892/1: EDAC: Add missing debugfs_create_x32 wrapper ARM: 8890/1: l2x0: add marvell,ecc-enable property for aurora ARM: 8889/1: dt-bindings: document marvell,ecc-enable binding ARM: 8886/1: l2x0: support parity-enable/disable on aurora ARM: 8885/1: aurora-l2: add defines for parity and ECC registers ARM: 8887/1: aurora-l2: add prefix to MAX_RANGE_SIZE ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardware ARM: 8900/1: UNWINDER_FRAME_POINTER implementation for Clang ARM: 8898/1: mm: Don't treat faults reported from cache maintenance as writes ARM: 8896/1: VDSO: Don't leak kernel addresses ARM: 8895/1: visit mach-* and plat-* directories when cleaning ARM: 8894/1: boot: Replace open-coded nop with macro ARM: 8893/1: boot: Explain the 8 nops ARM: 8876/1: fix O= building with CONFIG_FPE_FASTFPE ...
2019-09-20Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds18-67/+1934
Pull ARM SoC late updates from Arnd Bergmann: "This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: - The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. - After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. - The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. - The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. - The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window" [ This pull request itself wasn't actually sent late at all by Arnd, but I waited on the branches that it used to be pulled first, so it ends up being merged much later than the other ARM SoC pull requests this merge window - Linus ] * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits) ARM: dts: dir685: Drop spi-cpol from the display ARM: dts: aspeed: Add AST2600 pinmux nodes ARM: dts: aspeed: Add AST2600 and EVB ARM: exynos: Enable support for ARM architected timers ARM: samsung: Fix system restart on S3C6410 ARM: dts: mmp2: add OLPC XO 1.75 machine ARM: dts: mmp2: rename the USB PHY node ARM: dts: mmp2: specify reg-shift for the UARTs ARM: dts: mmp2: add camera interfaces ARM: dts: mmp2: fix the SPI nodes ARM: dts: mmp2: trivial whitespace fix arm64: dts: marvell: add DTS for Turris Mox dt-bindings: marvell: document Turris Mox compatible arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address arm64: dts: ti: k3-j721e-main: Add hwspinlock node arm64: dts: ti: k3-am65-main: Add hwspinlock node arm64: dts: k3-j721e: Add gpio-keys on common processor board dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E ...
2019-09-18Merge tag 'usb-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usbLinus Torvalds8-79/+22
Pull USB updates from Greg KH: "Here is the big set of USB patches for 5.4-rc1. Two major chunks of code are moving out of the tree and into the staging directory, uwb and wusb (wireless USB support), because there are no devices that actually use this protocol anymore, and what we have today probably doesn't work at all given that the maintainers left many many years ago. So move it to staging where it will be removed in a few releases if no one screams. Other than that, lots of little things. The usual gadget and xhci and usb serial driver updates, along with a bunch of sysfs file cleanups due to the driver core changes to support that. Nothing really major, just constant forward progress. All of these have been in linux-next for a while with no reported issues" * tag 'usb-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (159 commits) USB: usbcore: Fix slab-out-of-bounds bug during device reset usb: cdns3: Remove redundant dev_err call in cdns3_probe() USB: rio500: Fix lockdep violation USB: rio500: simplify locking usb: mtu3: register a USB Role Switch for dual role mode usb: common: add USB GPIO based connection detection driver usb: common: create Kconfig file usb: roles: get usb-role-switch from parent usb: roles: Add fwnode_usb_role_switch_get() function device connection: Add fwnode_connection_find_match() usb: roles: Introduce stubs for the exiting functions in role.h dt-bindings: usb: mtu3: add properties about USB Role Switch dt-bindings: usb: add binding for USB GPIO based connection detection driver dt-bindings: connector: add optional properties for Type-B dt-binding: usb: add usb-role-switch property usbip: Implement SG support to vhci-hcd and stub driver usb: roles: intel: Enable static DRD mode for role switch xhci-ext-caps.c: Add property to disable Intel SW switch usb: dwc3: remove generic PHY calibrate() calls usb: core: phy: add support for PHY calibration ...
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