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2022-05-19ARM: dts: aspeed: bletchley: Enable mdio0 busPotin Lai1-0/+5
Enable mdio0 bus based on DVT schematic. TODO: Add Marvell 88E6191 Switch Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-4-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smcPotin Lai1-20/+13
Due to DVT schematic has stable spi signal, switch back to aspeed-smc driver for improving performance. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed: bletchley: enable ehci0 device nodePotin Lai1-0/+4
Enable ehci0 node for USB2 host feature Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-2-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed: Add USB2.0 device controller nodeNeal Liu1-0/+10
Add USB2.0 device controller(udc) node to device tree for AST2600. Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Link: https://lore.kernel.org/r/20220518062043.1075360-3-neal_liu@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed-g4: Set spi-max-frequency for all flashesTao Ren1-0/+4
Set "spi-max-frequency" to 50 MHz for all the flashes under the FMC controller to ensure the clock frequency is calculated correctly. Suggested-by: Cédric Le Goater <clg@kaod.org> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-11-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed: Enable Dual SPI RX transfersCédric Le Goater3-0/+21
All these controllers support at least Dual SPI. Update the DTs. Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Tao Ren <rentao.bupt@gmail.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-10-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllersCédric Le Goater3-16/+8
This is compatible with the current driver and addresses issues when running 'make dt_binding_check'. Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Tao Ren <rentao.bupt@gmail.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-2-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1Howard Chiu1-2/+2
Since mac0/1 and mac2/3 are physically located on different die, they have different properties by nature, which is mac0/1 has smaller delay step. The property 'phy-mode' on ast2600 mac0 and mac1 is recommended to set to 'rgmii-rxid' which enables the RX interface delay from the PHY chip. Refer page 45 of SDK User Guide v08.00 https://github.com/AspeedTech-BMC/openbmc/releases/download/v08.00/SDK_User_Guide_v08.00.pdf Fixes: 2ca5646b5c2f ("ARM: dts: aspeed: Add AST2600 and EVB") Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23152A548AAE81140B57DD69E6E09@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-18ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9Josua Mayer1-0/+10
Since SoM revision 1.9 the PHY has been replaced with an ADIN1300, add an entry for it next to the original. As Russell King pointed out, additional phy nodes cause warnings like: mdio_bus 2188000.ethernet-1: MDIO device at address 1 is missing To avoid this the new node has its status set to disabled. U-Boot will be modified to enable the appropriate phy node after probing. The existing ar8035 nodes have to stay enabled by default to avoid breaking existing systems when they update Linux only. Co-developed-by: Alvaro Karsz <alvaro.karsz@solid-run.com> Signed-off-by: Alvaro Karsz <alvaro.karsz@solid-run.com> Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-18ARM: dts: Introduce HPE GXP Device treeNick Hawkins3-0/+155
The HPE SoC is new to linux. A basic device tree layout with minimum required for linux to boot including a timer and watchdog support has been created. The dts file is empty at this point but will be updated in subsequent updates as board specific features are enabled. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-17ARM: dts: at91: sama7g5ek: add node for PDMC0Codrin Ciubotariu1-1/+20
SAMA7G5-EK has 4 PDM microphones connected to PDMC0. PDMC0 pinmux is in conflict with gmac1, gmac1 being enabled by default. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220307122202.2251639-6-codrin.ciubotariu@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-17ARM: dts: at91: sama7g5: add nodes for PDMCCodrin Ciubotariu1-0/+24
Microchip's SAMA7G5 embeds two PDMCs. The PDMCs can be used to connect 2x4 PDM microphones. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220307122202.2251639-5-codrin.ciubotariu@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-17ARM: dts: at91: Use the generic "rtc" node name for the rtt IPsSergiu Moga2-2/+2
As the DT specification recommends, the node names should be of a generic nature. Thus, the most appropriate generic node name for the at91 rtt IPs is the "rtc" node name. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220304161159.147784-3-sergiu.moga@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-17ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' propertySergiu Moga3-0/+12
Add the required 'atmel,rtt-rtc-time-reg' property to the "rtt" nodes of the board files that were missing it. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220304161159.147784-2-sergiu.moga@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13Merge tag 'v5.18-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dtArnd Bergmann2-7/+0
Delete no longer needed properties of MediaTek Larbs for MT2701. * tag 'v5.18-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: dts: mediatek: Get rid of mediatek, larb for MM nodes Link: https://lore.kernel.org/r/b4383f23-0adc-b9de-a1d9-abd1c2f82b27@gmail.com This concludes a cleanup that was started back in 2019, with an incompatible DT binding change. Kernels before 5.18 can no longer use the updated dtb from 5.19, and the drivers no longer parse the old properties, which breaks compatibility with older dtb files. Link: https://lore.kernel.org/lkml/1546318276-18993-2-git-send-email-yong.wu@mediatek.com/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-13Merge tag 'at91-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dtArnd Bergmann15-15/+686
AT91 & LAN966 DT #1 for 5.19: - at91: DT compliance updates to gic and dataflash nodes - lan966: addition to many basic nodes for various peripherals - lan966: Kontron KSwitch D10: support for this new board and its network switch * tag 'at91-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash Link: https://lore.kernel.org/r/20220513162338.87717-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-13Merge tag 'mvebu-dt-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dtArnd Bergmann1-1/+5
mvebu dt for 5.19 (part 1) Add the crypto module atsha204a node for the turis omnia (Armada 385 bases) * tag 'mvebu-dt-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: turris-omnia: Add atsha204a node Link: https://lore.kernel.org/r/87lev5r2rg.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-13ARM: dts: kswitch-d10: enable networkingMichael Walle3-0/+139
Enable all the necessary network related nodes, wire the pinctrl configurations, add the PHYs and connect them to the corresponding network ports. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-14-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add switch nodeMichael Walle1-0/+62
Add the switch node and its 8 children ports. All are disabled by default. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-13-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add serdes nodeMichael Walle1-0/+8
Add the SerDes node. On the LAN966x SoC these SerDes are used to connect network PHYs. By default, that node is disabled. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-12-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add reset switch reset nodeMichael Walle1-0/+17
Add the switch reset node which will later be used by the switch driver. The switch reset also resets the GPIO controller and the SGPIO controller, thus it also has to be connectected to these nodes. This way the reset will only issued once for the first device requesting the reset. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-11-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add MIIM nodesMichael Walle1-0/+31
Add the MDIO controller nodes. The integrated PHYs are connected to the second controller. This controller also takes care of the resets of the integrated PHYs, thus it has two memory regions. The first controller is routed to the external MDIO/MDC pins. By default, they are disabled. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-10-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add hwmon nodeMichael Walle1-0/+8
Add the monitoring node which covers the temperature sensor as well as the PWM controller and the FAN tacho input. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-9-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add basic Kontron KSwitch D10 supportMichael Walle4-1/+187
Add basic support for the Kontron KSwitch D10 MMT. It comes in two variants: "6G-2GS" which features 6 Gigabit copper ports and two SFP cages and "8G" which features 6 Gigbabit copper ports (where two are 2.5G capable). For now the following is supported and working: - Kernel console - SFP cages - SPI - SGPIO - Watchdog Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> [claudiu.beznea: fixed conflict on Makefile] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-8-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add flexcom I2C nodesMichael Walle1-0/+65
Add all I2C nodes of the flexcom IP blocks. The driver supports FIFO, DMA or both combined. But the latter isn't working correctly. Thus, skip the fifo-size property for now. DMA is doing single byte reads in this case. Keep the nodes disabled by default. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-7-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add flexcom SPI nodesMichael Walle1-0/+75
Add all the SPI nodes for the flexcom IP block. Keep them disabled by default. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-6-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add all flexcom usart nodesMichael Walle1-0/+52
Add all the remaining usart nodes for the flexcom block. Although the DMA channels are specified, DMA is not enabled by default because break detection doesn't work with DMA. Keep the nodes disabled by default. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-5-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add missing uart DMA channelMichael Walle1-0/+3
The usart node of the flexcom3 block is missing the DMA channels. Add it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-4-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: add sgpio nodeMichael Walle1-0/+26
Add the device tree node for the SGPIO IP block reused from the SparX-5. Keep the node disabled by default. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-3-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: swap dma channels for crypto nodeMichael Walle1-3/+3
The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order of the channels. Swap them to pass devicetree validation. Fixes: 290deaa10c50 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-2-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: lan966x: rename pinctrl nodesMichael Walle1-1/+1
The pinctrl device tree binding will be converted to YAML format. Rename the pin nodes so they end with "-pins" to match the schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220420194230.3415663-1-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: at91: sama7g5: remove interrupt-parent from gic nodeEugen Hristev1-1/+0
interrupt-parent is not to be used as a boolean property. It is already present in the DT in the proper way it's supposed to be used: interrupt-parent = <&gic>; This is also reported by dtbs_check: arch/arm/boot/dts/at91-sama7g5ek.dtb: interrupt-controller@e8c11000: interrupt-parent: True is not of type 'array' From schema: /.local/lib/python3.8/site-packages/dtschema/schemas/interrupts.yaml Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220503133127.64320-1-eugen.hristev@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: at91: use generic node name for dataflashKrzysztof Kozlowski8-9/+9
The node names should be generic, so use "flash" for dataflash nodes and for cfi-flash. Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220412105013.249793-1-krzysztof.kozlowski@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-13ARM: dts: turris-omnia: Add atsha204a nodePali Rohár1-1/+5
Crypto module atsha204a is available at i2c address 0x64. Module is used for symmetric cryptography and provides also hardware random number generator and OTP storage for device serial number and MAC addresses. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-05-13Merge tag 'v5.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dtArnd Bergmann3-4/+5
Naming and flag corrections. * tag 'v5.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: rename pcfg_pull_default node name on rk3036 ARM: dts: rockchip: use generic node name for dma rk3036/rk322x ARM: dts: rockchip: correct interrupt flags on rk3188 boards Link: https://lore.kernel.org/r/6919636.31r3eYUQgx@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-13Revert "ARM: dts: BCM5301X: Fix DTC warning for NAND node"Arnd Bergmann1-0/+2
This reverts commit 90103611d573, which caused a new DTC warning arch/arm/boot/dts/bcm953012hr.dts:57.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/boot/dts/bcm953012hr.dts:62.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@200000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/boot/dts/bcm953012hr.dts:66.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@600000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/boot/dts/bcm953012hr.dts:70.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@1000000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/boot/dts/bcm953012hr.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm953012hr.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm953012hr.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm953012hr.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-12ARM: dts: socfpga: align SPI NOR node name with dtschemaKrzysztof Kozlowski4-5/+5
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-05-11kbuild: factor out the common installation code into scripts/install.shMasahiro Yamada1-21/+0
Many architectures have similar install.sh scripts. The first half is really generic; it verifies that the kernel image and System.map exist, then executes ~/bin/${INSTALLKERNEL} or /sbin/${INSTALLKERNEL} if available. The second half is kind of arch-specific; it copies the kernel image and System.map to the destination, but the code is slightly different. Factor out the generic part into scripts/install.sh. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Nicolas Schier <n.schier@avm.de>
2022-05-09Merge tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dtArnd Bergmann101-1440/+5920
i.MX ARM device tree update for 5.19: - New board support: PHYTEC phyGATE-Tauri-S, TQ-Systems MBa6UL, LS1021A IoT board, Toradex Iris and Aster carrier, i.MX7D SMEGW01, i.MXRT1050 EVK, Bosch ACC board. - A series from Alexander Stein to update i.MX51 based digi-connectcore board, regarding to DMA of UART devices, PMIC voltages, USB vbus-supply and usbphy. - A series of changes from David Jander and Oleksij Rempel to remove prototype specific deprecated code not used in production from i.MX6Q/DL Vicut1 board, and unify Vicut1 and Victgo variants to reduce maintaining overhead. - Quite some changes from different people to update imx6ull-colibri board on various aspects, touchscreen, device tree overlays, NAND BCH geometry, GPIO line names, FEC phy-supply, etc. - A couple of changes from Fabio Estevam to switch imx6dl-plybas and imx6ul-kontron-n6x1x-s to use standard 'uart-has-rtscts' property. - A couple of patches from Li Yang to update IFC device compatible and node name for LayerScape SoCs. - Disable USB host to work around boot issue on imx6qdl-udoo board. - A series from Max Krummenacher to update Colibri i.MX6DL device trees, drop dedicated v1.1 DT, disable add-on accessories, cleanups, etc. - Various random and small updates on i.MX28 and i.MX6 boards. * tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (77 commits) ARM: dts: imx6ull-colibri: improve pinctrl node names ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsi ARM: dts: imx6ull-colibri: add/update some comments ARM: dts: imx6ull-colibri: fix nand bch geometry ARM: dts: imx6ull-colibri: add support for toradex aster carrier boards ARM: dts: imx6ull-colibri: add support for toradex iris carrier boards ARM: dts: imx6ull-colibri: add gpio-line-names ARM: dts: imx6ull-colibri: update device trees to support overlays ARM: dts: imx6ull-colibri: update usdhc1 pixmux and signaling ARM: dts: imx6ull-colibri: add touchscreen device nodes ARM: dts: imx6ull-colibri: add phy-supply to fec ARM: dts: imx6ull-colibri: change touch i2c parameters ARM: dts: imx6ull-colibri: use pull-down for adc pins ARM: dts: Add bosch acc board ARM: dts: imx: Add i.MXRT1050-EVK support ARM: dts: imx7d-smegw01: Add support for i.MX7D SMEGW01 board ARM: dts: imx6qdl-udoo: Disable USB host to work around boot issues ARM: dts: imx27: use new 'dma-channels' property ARM: dts: imx6qdl-phytec: Add LED labels ARM: dts: ls1021a: reduce the interrupt-map-mask ... Link: https://lore.kernel.org/r/20220508033843.2773685-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09Merge tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dtArnd Bergmann37-4670/+4820
Qualcomm ARM DT updates for v5.19 This contains a long overdue overhaul of the MSM8974 DeviceTrees, aligning the style, structure and naming with what we've learned since the introduction of this platform. On top of this the Sony Rhine platform gained I2C masters, NFC and pstore support and the Fairphone 2 gained touchscreen support. For the new SDX65 platform reserved-memory nodes, rpmpd, SPMI, CPU clocks, SDHCI controller, SMMU and TCSR mutex was added. As was the initial DeviceTree for the related PMX65 PMIC. MSM8226 gained VADC and RTC support and support for the ASUS ZenWatch 2 was added. * tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (62 commits) ARM: dts: qcom: msm8974-FP2: Add supplies for remoteprocs ARM: dts: qcom: msm8974-FP2: Configure charger ARM: dts: qcom: msm8974-FP2: Add support for touchscreen ARM: dts: qcom: sdx55: Remove ipa interconnect node ARM: dts: qcom: msm8974: Add missing license headers ARM: dts: qcom: msm8974-FP2: Add mmc* aliases ARM: dts: qcom: msm8974-FP2: We're msm8974pro ARM: dts: qcom-msm8974*: Remove unnecessary include ARM: dts: qcom-msm8974-rhine: Add pstore node ARM: dts: qcom-msm8974-rhine: Add NFC and enable I2C hosts ARM: dts: qcom-msm8974*: Clean up old GPIO declarations ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI ARM: dts: qcom-msm8974*: Enable IMEM unconditionally ARM: dts: qcom-msm8974: Sort and clean up nodes ARM: dts: qcom-msm8974: Convert ADSP to a MMIO device ARM: dts: qcom-msm8974pro-*: Use the 8974pro name in DT filenames ARM: dts: qcom-msm8974pro: Use &labels ARM: dts: qcom-msm8974-castor: Use &labels ARM: dts: qcom-msm8974-{"hon","am"}ami: Commonize and modernize the DTs ARM: dts: qcom-msm8974-klte: Use &labels ... Link: https://lore.kernel.org/r/20220509172125.313259-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09Merge tag 'sunxi-dt-for-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dtArnd Bergmann1-1/+0
- F1C100 improvements (SPI, MMC, timer, cpu, watchdog) - SPI flash node for licheepi-nano - enabled analogue audio on olinuxino-a64 - GPIO port regulators on teres-i - remove undocumented property from nanopi * tag 'sunxi-dt-for-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sunxi: nanopi: Remove input-name property Link: https://lore.kernel.org/r/Yngton59OacOR2ht@kista.localdomain Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09Merge tag 'ti-keystone-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dtArnd Bergmann5-8/+8
Keystone2 device tree updates for v5.19 * Cleanups for SPI NOR / flash * tag 'ti-keystone-dt-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: ARM: dts: keystone: Fix missing fallback and case in SPI NOR node compatible ARM: dts: keystone: Align SPI NOR node name with dtschema Link: https://lore.kernel.org/r/20220507163435.tcg46cacwqhe7n64@busily Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-08ARM: dts: sunxi: nanopi: Remove input-name propertyDang Huynh1-1/+0
This property doesn't seem to exist in the documentation nor in source code, but for some reason it is defined in a bunch of device trees. Signed-off-by: Dang Huynh <danct12@riseup.net> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220425064231.243482-1-danct12@riseup.net
2022-05-07ARM: dts: imx6ull-colibri: improve pinctrl node namesMarcel Ziswiler1-47/+46
Improve on pinctrl node names. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-07ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsiMarcel Ziswiler2-16/+15
The gpio-keys define module level wake-up pin functionality. Move it from the carrier board dts file to the Som dtsi file. While at it, also re-order the properties in the gpio-keys node alphabetically and rename to sub-node from power to wakeup. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-07ARM: dts: imx6ull-colibri: add/update some commentsMarcel Ziswiler2-10/+30
Add/update some comments. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-07ARM: dts: imx6ull-colibri: fix nand bch geometryMarcel Ziswiler1-0/+1
Fix NAND BCH geometry relevant mainly for U-Boot. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-07ARM: dts: imx6ull-colibri: add support for toradex aster carrier boardsDenys Drozdov5-0/+205
Add support for Toradex Aster, small form-factor Colibri Arm Computer Module family carrier board. Aster Device Trees: - imx6ull-colibri-aster.dtb - imx6ull-colibri-emmc-aster.dtb - imx6ull-colibri-wifi-aster.dtb Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-07ARM: dts: imx6ull-colibri: add support for toradex iris carrier boardsDenys Drozdov16-15/+385
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family carrier boards. Iris Device Trees: - imx6ull-colibri-iris.dtb - imx6ull-colibri-emmc-iris.dtb - imx6ull-colibri-wifi-iris.dtb Iris-V2 Device Trees: - imx6ull-colibri-iris-v2.dtb - imx6ull-colibri-emmc-iris-v2.dtb - imx6ull-colibri-wifi-iris-v2.dtb Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-07ARM: dts: imx6ull-colibri: add gpio-line-namesOleksandr Suvorov2-0/+273
Add GPIO line names on module-level. Those are all GPIOs that a user might use on his custom carrier board. If more meaningful names are available on the carrier board, the user can overwrite the line names in the carrier board-level device tree. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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