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2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 22Thomas Gleixner3-15/+3
Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 4 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154042.707528683@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner2-28/+2
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4Thomas Gleixner75-150/+75
Based on 1 normalized pattern(s): licensed under gplv2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 118 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 3Thomas Gleixner1-4/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 or later as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 9 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.848507137@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1Thomas Gleixner2-28/+2
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin street fifth floor boston ma 02110 1301 usa this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option [no]_[pad]_[ctrl] any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin street fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 176 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.652910950@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21ARM: dts: stm32: enable Vivante GPU support on stm32mp157a-dk1 boardPierre-Yves MORDRET1-0/+15
Enable Vivante GPU driver for stm32mp157a-dk1 and dk2 boards. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-ed1 boardPierre-Yves MORDRET1-0/+16
Enable Vivante GPU driver for stm32mp157c-ed1 board. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: Add Vivante GPU support on STM32MP157cPierre-Yves MORDRET1-0/+10
Append Vivante GPU DT configuration. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add i2s pins muxing on stm32mp157Olivier Moysan1-0/+19
Add I2S pins muxing to stm32mp157. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add i2s support on stm32mp157cOlivier Moysan1-0/+33
This patch adds support of STM32 I2S on stm32mp157c. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add sai pins muxing on stm32mp157Olivier Moysan1-0/+73
Add SAI pins muxing to stm32mp157. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add sai support on stm32mp157cOlivier Moysan1-0/+125
This patch adds support of STM32 SAI on stm32mp157c. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add jedec compatible for nor flash on stm32mp157c-ev1Ludovic Barre1-0/+2
This patch adds jedec compatible for spi-nor flash on stm32mp157c-ev1 (needed with new spi-mem interface). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add pinctrl sleep config for qspi on stm32mp157c-ev1Ludovic Barre2-1/+28
This patch adds pinctrl sleep config for qspi on stm32mp157c-ev1 Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add joystick support on stm32mp157c-ev1Amelie Delaunay1-0/+44
The joystick (B1) on stm32mp157c-ev1 uses gpios on STMFX gpio expander. These gpios need a pin configuration (push-pull and bias-pull-down), described under stmfx_pinctrl node. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add STMFX support on stm32mp157c-ev1Amelie Delaunay1-0/+17
This patch adds support for STMicroelectronics Multi-Function eXpander (STMFX) on stm32mp157c-ev1. It is connected on i2c2. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add orange and blue leds on stm32746g-evalAmelie Delaunay1-0/+6
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on STMFX gpio expander, offset 17 and 19. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add joystick support on stm32746g-evalAmelie Delaunay1-0/+43
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander. These gpios need a pin configuration (push-pull and bias-pull-up), described under stmfx_pinctrl node. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: add STMFX support on stm32746g-evalAmelie Delaunay1-0/+17
This patch adds support for STMicroelectronics Multi-Function eXpander (STMFX) on stm32746g-eval. It is connected on i2c1. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-21ARM: dts: stm32: use dedicated files to manage stm32mp157 packagesAlexandre Torgue7-2/+306
Four packages exist for stm32mp157 die. As ball-out is different between them, this patch covers those differences by creating dedicated pinctrl dtsi files. Each dtsi pinctrl package file describes the package ball-out through gpio-ranges. stm32mp157a-dk1 / dk2 boards embed a STM32MP_PKG_AC (TFBGA361 (12*12)) package. stm32mp157c-ed1 / ev1 boards embed a STM32MP_PKG_AA (LFBGA448 (18*18)) package. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-05-20ARM: dts: meson8b: fix the operating voltage of the Mali GPUMartin Blumenstingl1-5/+5
Amlogic's vendor kernel defines an OPP for the GPU on Meson8b boards with a voltage of 1.15V. It turns out that the vendor kernel relies on the bootloader to set up the voltage. The bootloader however sets a fixed voltage of 1.10V. Amlogic's patched u-boot sources (uboot-2015-01-15-23a3562521) confirm this: $ grep -oiE "VDD(EE|AO)_VOLTAGE[ ]+[0-9]+" board/amlogic/configs/m8b_* board/amlogic/configs/m8b_m100_v1.h:VDDAO_VOLTAGE 1100 board/amlogic/configs/m8b_m101_v1.h:VDDAO_VOLTAGE 1100 board/amlogic/configs/m8b_m102_v1.h:VDDAO_VOLTAGE 1100 board/amlogic/configs/m8b_m200_v1.h:VDDAO_VOLTAGE 1100 board/amlogic/configs/m8b_m201_v1.h:VDDEE_VOLTAGE 1100 board/amlogic/configs/m8b_m201_v1.h:VDDEE_VOLTAGE 1100 board/amlogic/configs/m8b_m202_v1.h:VDDEE_VOLTAGE 1100 Another hint at this is the VDDEE voltage on the EC-100 and Odroid-C1 boards. The VDDEE regulator supplies the Mali GPU. It's basically a copy of the VCCK (CPU supply) which means it's limited to 0.86V to 1.14V. Update the operating voltage of the Mali GPU on Meson8b to 1.10V so it matches with what the vendor u-boot sets. Fixes: c3ea80b6138cae ("ARM: dts: meson8b: add the Mali-450 MP2 GPU") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-20ARM: dts: meson8b: drop undocumented property from the Mali GPU nodeMartin Blumenstingl1-1/+0
Drop the undocumented "switch-delay" which is a left-over from my experiments with an early lima kernel driver when it was still out-of-tree and required this property on Amlogic SoCs. Fixes: c3ea80b6138cae ("ARM: dts: meson8b: add the Mali-450 MP2 GPU") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-20ARM: dts: meson8: fix GPU interrupts and drop an undocumented propertyMartin Blumenstingl1-3/+2
The interrupts in Amlogic's vendor kernel sources are all contiguous. There are two typos leading to pp2 and pp4 as well as ppmmu2 and ppmmu4 incorrectly sharing the same interrupt line. Fix this by using interrupt 170 for pp2 and 171 for ppmmu2. Also drop the undocumented "switch-delay" which is a left-over from my experiments with an early lima kernel driver when it was still out-of-tree and required this property on Amlogic SoCs. Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-20ARM: dts: bcm: Add missing device_type = "memory" propertyFlorian Fainelli20-0/+20
During the removal of the skeleton.dtsi file with commit abe60a3a7afb ("ARM: dts: Kill off skeleton{64}.dtsi") a number of Broadcom SoCs were converted, but a few were left unoticed, now causing boot failures with v5.1 since the kernel cannot find suitable memory. Updating the .dtsi files with the property will be done next, since there are some memory nodes that do not follow the proper naming convention and lack an unit name. Fixes: abe60a3a7afb ("ARM: dts: Kill off skeleton{64}.dtsi") Reported-by: Kevin Hilman <khilman@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20Merge branch 'omap-for-v5.2/ti-sysc' into fixesTony Lindgren2-12/+6
2019-05-20Merge branch 'fixes-dra7' into fixesTony Lindgren361-5212/+11586
2019-05-20ARM: dts: dra71x: Disable usb4_tm target moduleKeerthy1-0/+4
usb4_tm is unsed on dra71 and accessing the module with ti,sysc is causing a boot crash hence disable its target module. Fixes: 549fce068a3112 ("ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data") Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-20ARM: dts: dra71x: Disable rtc target moduleKeerthy2-1/+14
Introduce dra71x.dtsi to include dra71x specific changes. rtc is fused out on dra71 and accessing target module register is causing a boot crash hence disable it. Fixes: 549fce068a3112 ("ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data") Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-20ARM: dts: dra76x: Disable usb4_tm target moduleKeerthy1-0/+4
usb4_tm is unsed on dra76 and accessing the module with ti,sysc is causing a boot crash hence disable its target module. Fixes: 549fce068a3112 ("ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data") Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-20ARM: dts: dra76x: Disable rtc target moduleKeerthy2-1/+5
rtc is fused out on dra76 and accessing target module register is causing a boot crash hence disable it. Fixes: 549fce068a3112 ("ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data") Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-20ARM: dts: vexpress: specify AFS partitionLinus Walleij2-0/+6
This activates the AFS partition parsing on the Versatile Express family. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-20ARM: dts: realview: specify AFS partitionLinus Walleij4-0/+24
This activates the AFS partition parsing on the RealView family. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-20ARM: dts: versatile: specify AFS partitionLinus Walleij1-0/+3
This activates the AFS partition parsing on the Versatile. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-20ARM: dts: integrator: specify AFS partitionLinus Walleij1-0/+3
This activates the code for AFS partition parsing on the Integrator. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-20ARM: dts: rza2mevb: Add USB Host supportChris Brandt1-0/+36
Enable USB Host support for both the Type-C connector on the CPU board and the Type-A plug on the sub board. Both boards are also capable of USB Device operation as well after the appropriate Device Tree modifications. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB Device supportChris Brandt1-0/+24
Add USB Device support for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB Host supportChris Brandt1-0/+66
Add EHCI and OHCI host support for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rskrza1: Add input switchesGeert Uytterhoeven1-0/+38
Add support for input switches SW1-3 on the Renesas RZ/A1 RSK+RZA1 development board. Note that this uses the IRQ interrupts, as the RZ/A1 GPIO controller does not include interrupt support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s72100: Add IRQC device nodeGeert Uytterhoeven1-0/+19
Enable support for the IRQC on RZ/A1H, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r8a779x: Configure PMIC IRQ pinmuxMarek Vasut6-1/+41
The PMIC IRQ line pin multiplexing configuration is missing from the DTs. Since the line is configured correctly by default, the system works fine. However, add the IRQ line pin multiplexing configuration for completeness. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: Add 48MHz USB clockChris Brandt1-0/+5
The RZ/A2M EVB has a 48MHz clock attached to USB_X1. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB clockChris Brandt1-0/+7
Add USB clock node. If present, this clock input must be 48MHz. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: add ethernet aliasesChris Brandt1-0/+2
Add ethernet aliases so u-boot can find the device nodes. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: Add SDHI supportChris Brandt1-0/+24
The RZ/A2M EVB supports 2 SD card slots. A micro SD slot on the CPU board, and a full SD card slot on the sub board. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: Add Ethernet supportChris Brandt1-0/+50
The RZ/A2M EVB sub board has 2 Ethernet jacks on it. Set switch SW6_4 to ON to use Ethernet Ch-0 Set switch SW6_5 to ON to use Ethernet Ch-1 Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add SDHI supportChris Brandt1-0/+24
Add SDHI support for the R7S9210 (RZ/A2) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add RIIC supportChris Brandt1-0/+76
Add I2C support for the R7S9210 (RZ/A2) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add Ethernet supportChris Brandt1-0/+25
Add Ethernet support for the RZ/A2 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add RSPIChris Brandt1-0/+45
Add RSPI support for RZ/A2 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: sun8i-h3: Fix wifi in Beelink X2 DTJernej Skrabec1-0/+4
mmc1 node where wifi module is connected doesn't have properly defined power supplies so wifi module is never powered up. Fix that by specifying additional power supplies. Additionally, this STB may have either Realtek or Broadcom based wifi module. One based on Broadcom module also needs external clock to work properly. Fix that by adding clock property to wifi_pwrseq node. Fixes: e582b47a9252 ("ARM: dts: sun8i-h3: Add dts for the Beelink X2 STB") Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>