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2019-04-11ARM: dts: stm32: add sdmmc1 support on stm32h743i eval boardLudovic Barre2-1/+90
This patch adds sdmmc1 support on stm32h743i eval board. This board has an external driver to control signal direction polarity. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11ARM: dts: stm32: add sdmmc1 support on stm32h743Ludovic Barre1-0/+14
This patch adds support of sdmmc1 on stm32h743. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11ARM: dts: imx6dl-sabreauto: update opp table for auto partAnson Huang1-0/+15
Update i.MX6DL automotive part's opp table according to i.MX6DL automotive datasheet Rev.9, 11/2018, it adds 996MHz set-point support as below: LDO enabled(min value): 996MHz: VDDARM: 1.275V, VDDSOC: 1.175V; 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V; 396MHz: VDDARM: 1.125V, VDDSOC: 1.150V; Adding 25mV to cover board IR drop, for LDO enabled mode of 996MHz, as the max value of LDO output can NOT exceed 1.3V, so 25mV is NOT added for VDDARM. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx: Use generic node names for Zii dtsFabio Estevam6-26/+26
The devicetree specification recommends using generic node names. Some Zii dts files already follow such recommendation, but some don't, so use generic node names for consistency among the Zii dts files. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx: Switch Zii dts to SPDX identifierFabio Estevam6-228/+6
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1Adam Ford1-0/+1
Some USB peripherals draw more power, and the sourcing regulator take a little time to turn on. This patch fixes an issue where some devices occasionally do not get detected, because the power isn't quite ready when communication starts, so we add a bit of a delay. Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD i.MX6QD EVM") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6q-logicpd: Reduce inrush current on startAdam Ford1-0/+1
The main 3.3V regulator sources a series of additional regulators. This patch adds a small delay, so when the 3.3V regulator comes on it delays a bit before the subsequent regulators can come on. This reduces the inrush current a bit on the external DC power supply to help prevent a situation where the sourcing power supply cannot source enough current and overloads and the kit fails to start. Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD i.MX6QD EVM") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6q-logicpd: Shutdown LCD regulator during suspendAdam Ford1-2/+2
The LCD power sequencer is very finicky. The backlight cannot be driven until after the sequencer is done. Until now, the regulators were marked with 'regulator-always-on' to make sure it came up before the backlight. This patch allows the LCD regulators to power down and prevent the backlight from being used again until the sequencer is ready. This reduces standby power consumption by ~100mW. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6q-logicpd: Enable Analog audio captureAdam Ford1-2/+2
The original submission had functional audio out and was based on reviewing other boards using the same wm8962 codec. However, the Logic PD board uses an analog microphone which was being disabled for a digital mic. This patch corrects that and explicitly sets the gpio-cfg pins all to 0x0000 which allows the analog microphone to capture audio. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6sll: add cooling-cells for cpu-freq cooling deviceAnson Huang1-0/+1
Add #cooling-cells for i.MX6SLL cpu-freq cooling device usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx50: Add Kobo Aura DTSJonathan Neuschäfer2-1/+260
The Kobo Aura is an e-book reader released in 2013. With the devicetree in its current state, the kernel will boot and run for about ten seconds. To solve this, the embedded controller needs to be told that the system should stay powered on. This will be done in a later patchset. - The IOMUXC mode bits for the SD interfaces were taken from the vendor's U-Boot fork. - The bus width of the eMMC is 4 bits in the vendor kernel, but I achieved better performance with 8 bits. - The SDIO clock frequency for the WiFi chip is 25MHz in the vendor kernel, but the WiFi chip (BCM43362) supports 50MHz, which works reliably on this board and gives slightly better performance. - The I2C pins' IOMUXC settings come from the vendor's U-Boot fork. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx: Fix the AR803X phy-modeFabio Estevam13-13/+13
Commit 6d4cd041f0af ("net: phy: at803x: disable delay only for RGMII mode") exposed an issue on imx DTS files using AR8031/AR8035 PHYs. The end result is that the boards can no longer obtain an IP address via UDHCP, for example. Quoting Andrew Lunn: "The problem here is, all the DTs were broken since day 0. However, because the PHY driver was also broken, nobody noticed and it worked. Now that the PHY driver has been fixed, all the bugs in the DTs now become an issue" To fix this problem, the phy-mode property needs to be "rgmii-id", which has the following meaning as per Documentation/devicetree/bindings/net/ethernet.txt: "RGMII with internal RX and TX delays provided by the PHY, the MAC should not add the RX or TX delays in this case)" Tested on imx6-sabresd, imx6sx-sdb and imx7d-pico boards with successfully restored networking. Based on the initial submission from Steve Twiss for the imx6qdl-sabresd. Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Soeren Moch <smoch@web.de> Tested-by: Steve Twiss <stwiss.opensource@diasemi.com> Tested-by: Adam Thomson <Adam.Thomson@diasemi.com> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6qdl-var-dart: Use new CODEC reset pin nameAndrew F. Davis1-1/+1
The correct DT property for specifying a GPIO used for reset is "reset-gpios", the driver now accepts this name, use it here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6qdl-gw5903: Use new CODEC reset pin nameAndrew F. Davis1-1/+1
The correct DT property for specifying a GPIO used for reset is "reset-gpios", the driver now accepts this name, use it here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: mx6qdl-zii-rdu2: Use new CODEC reset pin nameAndrew F. Davis1-2/+2
The correct DT property for specifying a GPIO used for reset is "reset-gpios", the driver now accepts this name, use it here. Note the GPIO polarity in the driver was ignored before and always assumed to be active low, when all the DTs are fixed we will start respecting the specified polarity. Switch polarity in DT to the currently assumed one, this way when the driver changes the behavior will not change. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx50: Specify IMX5_CLK_IPG as "ahb" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx51: Specify IMX5_CLK_IPG as "ahb" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx53: Specify IMX5_CLK_IPG as "ahb" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6sx: Specify IMX6SX_CLK_IPG as "ahb" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6SL_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX6SL_CLK_AHB as "ahb" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6sll: Specify IMX6SLL_CLK_IPG as "ipg" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6SLL_CLK_SDMA result in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX6SLL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6ul: Specify IMX6UL_CLK_IPG as "ipg" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6UL_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX6UL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx7d: Specify IMX7D_CLK_IPG as "ipg" clock to SDMAAndrey Smirnov1-2/+2
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX7D_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX7D_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6sx: Specify IMX6SX_CLK_IPG as "ipg" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6SX_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality. Fix the code to specify IMX6SX_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx6qdl: Specify IMX6QDL_CLK_IPG as "ipg" clock to SDMAAndrey Smirnov1-1/+1
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality(this at least breaks RAVE SP serdev driver on RDU2). Fix the code to specify IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx7s-warp: add ov2680 sensor nodeRui Miguel Silva1-0/+45
Warp7 comes with a Omnivision OV2680 sensor, add the node here to make complete the camera data path for this system. Add the needed regulator to the analog voltage supply, the port and endpoints in mipi_csi node and the pinctrl for the reset gpio. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx7s-warp: add csi and mipi_csi nodeRui Miguel Silva1-0/+14
Add and enable csi and mipi_csi nodes. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx7s: Add video mux, csi and mipi_csiRui Miguel Silva1-0/+75
Add device tree nodes for csi, video multiplexer and mipi-csi. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx7s: add multiplexer controlsRui Miguel Silva1-1/+8
The IOMUXC General Purpose Register has bitfield to control video bus multiplexer to control the CSI input between the MIPI-CSI2 and parallel interface. Add that register and mask. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: imx7s: add mipi phy power domainRui Miguel Silva1-1/+7
Add power domain index 0 related with mipi-phy to imx7s. While at it rename pcie power-domain node to remove pgc prefix. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: tq imx7d board supportBruno Thomsen3-0/+131
This adds support for the TQ TQMa7D SoM together with the MBa7 carrier board and it's based on the NXP i.MX7Dual SoC. Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: tq imx7s board supportBruno Thomsen3-0/+30
This adds support for the TQ TQMa7S SoM together with the MBa7 carrier board and it's based on the NXP i.MX7Solo SoC. Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11ARM: dts: tq imx7 common board supportBruno Thomsen2-0/+793
This adds TQMa7 and MBa7 board support. TQMa7 can be mounted with either i.MX7 Solo or Dual. All TQMa7 board variants can be mounted in MBa7 carrier board. Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-10ARM: dts: exynos: Remove console argument from bootargsKrzysztof Kozlowski6-12/+11
Remove the "console=ttySAC..." argument from DTSes having a proper stdout-path property. To make the code functionally equivalent, add the serial port baud rate and parity. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-04-10ARM: dts: exynos: Use stdout-path property instead of console in bootargsKrzysztof Kozlowski5-5/+8
Replacing bootargs with stdout-path property in chosen node allows using early console by adding just 'earlycon' parameter to the kernel command line. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-04-10ARM: dts: sun5i: Add the MBUS controllerMaxime Ripard1-0/+13
The MBUS (and its associated controller) is the bus in the Allwinner SoCs that DMA devices use in the system to access the memory. Among other things (and depending on the SoC generation), it can also enforce priorities or report bandwidth usages on a per-master basis. One of the most notable thing is that instead of having the same mapping for the RAM than the CPU, it maps it at address 0, which means we'll have to do address translation thanks to the dma-ranges property. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09ARM: dts: qcom: ipq4019: enlarge PCIe BAR rangeChristian Lamparter1-2/+2
David Bauer reported that the VDSL modem (attached via PCIe) on his AVM Fritz!Box 7530 was complaining about not having enough space in the BAR. A closer inspection of the old qcom-ipq40xx.dtsi pulled from the GL-iNet repository listed: | qcom,pcie@80000 { | compatible = "qcom,msm_pcie"; | reg = <0x80000 0x2000>, | <0x99000 0x800>, | <0x40000000 0xf1d>, | <0x40000f20 0xa8>, | <0x40100000 0x1000>, | <0x40200000 0x100000>, | <0x40300000 0xd00000>; | reg-names = "parf", "phy", "dm_core", "elbi", | "conf", "io", "bars"; Matching the reg-names with the listed reg leads to <0xd00000> as the size for the "bars". Cc: stable@vger.kernel.org BugLink: https://www.mail-archive.com/openwrt-devel@lists.openwrt.org/msg45212.html Reported-by: David Bauer <mail@david-bauer.net> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09ARM: dts: qcom: pma8084: add gpio-rangesBrian Masney1-0/+1
This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09ARM: dts: qcom: msm8660: add gpio-rangesBrian Masney1-0/+1
This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09ARM: dts: qcom: mdm9615: add gpio-rangesBrian Masney1-0/+1
This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09ARM: dts: qcom: apq8064: add gpio-rangesBrian Masney1-0/+1
This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap5Tony Lindgren3-112/+458
We can now add l4 abe interconnect hierarchy and ti-sysc data with ti-sysc driver supporting external optional clocks needed by mcpdm. This data is generated based on platform data from a booted system and the interconnect acces protection registers for ranges. To avoid regressions, we initially validate the device tree provided data against the existing platform data on boot. Note that mcpdm we now need to enable at module level only for devices that have the external pdmclk wired from the PMIC as the clock is needed for the module to be accessible. Also note that abe seems to be the same as on omap4 except for domains and clocks and we may be able to combine the l4 abe data later on. But let's play it safe and just initially use what we have already defined in the platform data. Cc: devicetree@vger.kernel.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap4Tony Lindgren3-191/+514
We can now add l4 abe interconnect hierarchy and ti-sysc data with ti-sysc driver supporting external optional clocks needed by mcpdm. This data is generated based on platform data from a booted system and the interconnect acces protection registers for ranges. To avoid regressions, we initially validate the device tree provided data against the existing platform data on boot. Note that mcpdm we now need to enable at module level only for devices that have the external pdmclk wired from the PMIC as the clock is needed for the module to be accessible. Cc: devicetree@vger.kernel.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: Add common mcpdm dts file for omap4Tony Lindgren5-80/+42
The mcpdm module found on omap4 and 5 needs pdmclk clock from the pmic that may or may not be wired. Without this clock we cannot read the registers for mcpdm at all. For the external mcpdm clock to work, it needs to be muxed at the module level for ti-sysc driver probe to mux it early enough for probe. Let's set up a common file for it to make things a bit easier to make l4 abe interconnect to probe with ti-sysc driver. Note that this is not needed for omap5 as we can just update mcpdm muxing in omap5-board-common.dtsi in later patches. Cc: devicetree@vger.kernel.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: omap2420-n810: Use new CODEC reset pin nameAndrew F. Davis1-1/+1
The correct DT property for specifying a GPIO used for reset is "reset-gpios", the driver now accepts this name, use it here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: am43xx-epos-evm: Add matrix keypad as wakeup sourceAndrew F. Davis1-0/+1
Mark matrix-keypad as a wakeup source. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: am43xx-epos-evm: Keep DCDC3 regulator on in suspend to memoryMike Erdahl1-0/+6
When going to suspend to ram mode (or rtc-only mode), the DDR regulator must be told to stay on, else this rail will go down when the PMIC_EN signal is deasserted. Signed-off-by: Mike Erdahl <m-erdahl@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: am43xx-epos-evm: Keep DCDC5 and DCDC6 always onKabir Sahane1-0/+4
These regulator outputs are needed even in deep sleep modes to prevent low-voltage detection events. Make these always ON to avoid this. Signed-off-by: Kabir Sahane <x0153567@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: dra7: Add properties to enable PCIe x2 lane modeKishon Vijay Abraham I1-0/+2
ti,syscon-lane-sel and ti,syscon-lane-conf properties specific to enable PCIe x2 lane mode are added here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: sun8i: a83t: Add I2C2 pinmux setting for PE pinsChen-Yu Tsai1-0/+6
I2C2 is available on the PE pingroup, on the same pins as the camera sensor interface (CSI) controller's camera control interface pins. This provides an option to use I2C2 instead of that control interface to configure camera sensors. Add a pinctrl node for it. The property /omit-if-no-ref/ is added to keep the device tree blob size down if it is unused. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09ARM: dts: sun8i: tbs-a711: Add support for volume keys inputOndrej Jirman1-0/+20
TBS A711 tablet has volume up/down keys connected to r_lradc. Add support for these keys. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>