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2011-01-13ARM: gic: irq_data conversion.Lennert Buytenhek1-33/+33
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2010-12-14ARM: GIC: move enablement of PPI interrupts to gic.cRussell King1-0/+10
Avoid adding nasty genirq-specific code to local timers to enable PPI interrupts. Instead, provide a gic function to do this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: move gic_data[] initialization into gic_init()Russell King1-24/+24
This avoids writing unnecessarily to gic_data[] from other CPUs, making this a mostly read-only variable. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King1-0/+5
Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_initRussell King1-1/+6
We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: provide a single initialization function for boot CPURussell King1-2/+9
Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-06ARM: 6524/1: GIC irq desciptor bug fixChao Xie1-1/+7
gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is enabled, there is no irq_desc[]. So we need use irq_to_desc(irq) to get the descriptor for irq. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-30ARM: 6496/1: GIC: Do not try to register more then NR_IRQS interruptsPawel Moll1-15/+17
This change limits number of GIC-originating interrupts to the platform maximum (defined by NR_IRQS) while still initialising all distributor registers. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-12ARM: GIC: don't disable software generated interruptsRussell King1-4/+24
Software generated interrupts (SGI) are used for IPIs by the kernel. While previous revisions of the GIC hardware were specified not to implement enable bits for SGIs, more recent hardware is now permitted to implement these bits in a per-CPU banked register. The priority registers for the PPI and SGIs are also per-CPU banked registers, so ensure that these are also appropriately initialized. Reported-by: Scott Valentine <svalentine@concentris-systems.com> Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-06GIC: Dont disable INT in ack callbackAbhijeet Dharmapurikar1-14/+0
Masking in the ack callback fails to work with handle_percpu_irq and handle_edge_irq. The interrupt stays disabled after the first invocation since percpu and edge irq do not unmask an interrupt after handling it. For handle_level_irq masking in the ack is redundant because ack is always called after mask in the mask_ack function. Masking in the ack function is required only when __do_IRQ was used instead of flow handlers, but using __do_IRQ has been deprecated. Remove the masking of interrupt from the ack callback. Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-06-16ARM: 6150/1: gic: implement set_typeRabin Vincent1-0/+46
Implement set_type() to allow configuration of the trigger type. Cc: Abhijeet Dharmapurikar <adharmap@quicinc.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-19[ARM] 5556/1: Fix the irq_desc.cpu referencesCatalin Marinas1-1/+1
The cpu member of struct irq_desc was recently renamed to node. The patch renames the ARM references to the old member. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-01Merge branch 'linus' into irq/numaIngo Molnar1-2/+2
Conflicts: arch/mips/sibyte/bcm1480/irq.c arch/mips/sibyte/sb1250/irq.c Merge reason: we gathered a few conflicts plus update to latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-17[ARM] smp: fix cpumask usage in ARM SMP codeRussell King1-2/+2
The ARM SMP code wasn't properly updated for the cpumask changes, which results in smp_timer_broadcast() broadcasting ticks to non-online CPUs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-28irq: change ->set_affinity() to return statusYinghai Lu1-1/+3
according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-12-13cpumask: make irq_set_affinity() take a const struct cpumaskRusty Russell1-2/+2
Impact: change existing irq_chip API Not much point with gentle transition here: the struct irq_chip's setaffinity method signature needs to change. Fortunately, not widely used code, but hits a few architectures. Note: In irq_select_affinity() I save a temporary in by mangling irq_desc[irq].affinity directly. Ingo, does this break anything? (Folded in fix from KOSAKI Motohiro) Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Acked-by: Ingo Molnar <mingo@redhat.com> Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: jeremy@xensource.com Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
2008-09-06[ARM] Convert asm/io.h to linux/io.hRussell King1-1/+1
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-20[ARM] spelling fixesSimon Arlott1-1/+1
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-17[ARM] gic: Fix gic cascade irq handlingRussell King1-11/+9
No need for the cascade irq function to have a "fastcall" annotation. Fix the range checking for valid IRQ numbers - comparing the value returned by the GIC with NR_IRQS is meaningless since we translate the GIC irq number to a Linux IRQ number afterwards. Check the GIC returned IRQ number is within limits first, then add the IRQ offset, and only then compare with NR_IRQS. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-02-15[ARM] 4108/2: Allow multiple GIC interrupt controllers in a systemCatalin Marinas1-14/+95
The current implementation only assumes one GIC to be present in the system. However, there are platforms with more than one cascaded interrupt controllers (RealView/EB MPCore for example). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-11-30[ARM] Remove compatibility layer for ARM irqsRussell King1-1/+1
set_irq_chipdata -> set_irq_chip_data get_irq_chipdata -> get_irq_chip_data do_level_IRQ -> handle_level_irq do_edge_IRQ -> handle_edge_irq do_simple_IRQ -> handle_simple_irq irqdesc -> irq_desc irqchip -> irq_chip Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-08-01[ARM] 3739/1: genirq updates: irq_chip, add and use irq_chip.nameDavid Brownell1-1/+2
Patch from David Brownell ARM genirq cleanups/updates: - Start switching platforms to newer APIs * use "irq_chip" name, not "irqchip" * providing irq_chip.name - Show irq_chip.name in /proc/interrupts, like on x86. This update a bit more than half of the ARM code. The irq_chip.name values were chosen to match docs (if I have them) or be otherwise obvious ("FPGA", "CPLD", or matching the code). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-07-01[ARM] 3686/1: ARM: arm/common: convert irq handlingThomas Gleixner1-2/+16
Patch from Thomas Gleixner From: Thomas Gleixner <tglx@linutronix.de> Convert the files in arch/arm/common to use the generic irq handling functions. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-30[ARM] 2942/1: Fix the warning in arch/arm/common/gic.cCatalin Marinas1-0/+2
Patch from Catalin Marinas The warning is caused by the gic_set_cpu() function being defined but not used if CONFIG_SMP is not defined. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-08-31[ARM] 2868/1: Include linux/cpumask.h in arch/arm/common/gic.cCatalin Marinas1-0/+1
Patch from Catalin Marinas Minor compilation error fix. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-08-18[ARM] Add support for ARM GICRussell King1-0/+166
Add support for the ARM Generic Interrupt Controller. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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