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2012-07-11ARM: AT91SAM9G45: add crypto peripheralsNicolas Royer1-0/+2
Signed-off-by: Nicolas Royer <nicolas@eukrea.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Eric Bénard <eric@eukrea.com> Tested-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-04-17ARM: at91: uncompress: autodetect the uart to useJean-Christophe PLAGNIOL-VILLARD1-5/+0
This will now autodetect the first uart enabled by the bootloader and will use it for uncompress. This will still assume that the bootloader configured it (pins and clock). This also allows to include all soc headers together. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/rtc-at91sam9: pass the GPBR to use via resourcesJean-Christophe PLAGNIOL-VILLARD1-3/+2
The GPBR registers are used for storing RTC values. The GPBR registers to use are now provided using standard resource entry. The array is filled in SoC specific code. rtc-at91sam9 RTT as RTC driver is modified to retrieve this information. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: rework resources assignment] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23ARM: at91/PMC: make register base soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23ARM: at91: make sdram/ddr register base soc independentJean-Christophe PLAGNIOL-VILLARD1-2/+2
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: make matrix register base soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-01-20ARM: at91: make rstc soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make rm9200 rtc drivers soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
switch the rtc drivers to resource and pass it via platform_device Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make aic soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+0
on all at91 have the Advanced Interrupt Controller starts at address 0xfffff000 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make DBGU soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
we will select now the DBGU used by the soc at Kconfig level For the DEBUG_LL and early_printk this will allow to select which DBGU to use this will also allow to select them when multiple SOC are enabled Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make watchdog drivers soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
switch the watchdog drivers to resource and pass it via platform_device Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2011-11-28ARM: at91: make shutdown controler soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make smc register base soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
now sam9_smc_configure will take as first parameter is the SMC id Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make pit register base soc independentJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make rtt register base soc independantJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make dma register base soc independantJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make ecc register base soc independantJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make gpio register base soc independantJean-Christophe PLAGNIOL-VILLARD1-5/+6
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2011-08-22ARM: mach-at91: Setup consistent dma size at boot timeJon Medhurst1-2/+0
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Ferre<nicolas.ferre@atmel.com>
2011-07-28at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD1-1/+0
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-05-25at91: drop boot_params and PLAT_PHYS_OFFSETJean-Christophe PLAGNIOL-VILLARD1-2/+0
select ARM_PATCH_PHYS_VIRT as with ARM_PATCH_PHYS_VIRT you can patch boot_params at runtime or any recent bootloader will provide a valid atags pointer in r2 as point out by Russell on AT91 we never use XIP so se do not need PLAT_PHYS_OFFSET Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-25at91: factorize common irq IDJean-Christophe PLAGNIOL-VILLARD1-2/+0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za>
2009-07-25ARM: 5622/1: at91: at91sam9g45 headers: DMA peripheral identifiersNicolas Ferre1-0/+17
It adds DMA peripheral identifiers for hardware handshaking interface. It will be used in platform code. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-27[ARM] 5571/1: at91: Basic support for at91sam9g45 series: header files.Nicolas Ferre1-0/+138
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz. It embedds USB high speed host and device, LCD, DDR2 RAM, and a full set of peripherals. Here is the basic header file support for this product series. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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