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2012-05-02Merge branch 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/newsocArnd Bergmann1-0/+2
From: Linus Walleij <linus.walleij@linaro.org>: Core support for the U9540 after finalized review * 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (2 commits) ARM: ux500: ioremap differences for DB9540 ARM: ux500: core U9540 support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-04-28ARM: at91: Add machine files for AT91SAM9N12 SoCHong Xu1-0/+6
Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-16ARM: at91: Export at91_matrix_baseJoachim Eastwood1-0/+1
at91_matrix_* macro's are used by at91_udc usb gadget driver, which can be built as module, therefore we need to export the variable containing matrix base address. Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-04-16ARM: at91: Export at91_ramc_baseJoachim Eastwood1-0/+1
After commit f363c40 (ARM: at91: make sdram/ddr register base soc independent) building at91_cf as a module fails with: ERROR: "at91_ramc_base" [drivers/pcmcia/at91_cf.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Export at91_ramc_base symbol to allow drivers using at91_ramc_* functions to be built as modules again. Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> [nicolas.ferre@atmel.com: modify slightly commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-30ARM: fix builds due to missing <asm/system_misc.h> includesOlof Johansson1-0/+1
This does a sweeping change fixing up all the missing system_misc.h and system_info.h includes from the system.h split-up change. These were the ones I came across when building all defconfigs in arch/arm/configs, there might be more but they lack adequate build coverage to be easily caught. I'm expecting to get a lot of these piecemeal by each maintainer, so we might just as well do one sweeping change to get them all at once. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-03-15ARM: at91: add Shutdown Controller (SHDWC) DT supportJean-Christophe PLAGNIOL-VILLARD1-0/+77
Use a string to specific the wakeup mode to make it more readable. Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5. Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15ARM: at91: add ram controller DT supportJean-Christophe PLAGNIOL-VILLARD1-3/+37
We can now drop the call to ioremap_registers() as we have the binding for the SDRAM/DDR Controller. Drop ioremap_registers() for sam9x5 too. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15ARM: at91: add RSTC (Reset Controller) dt supportJean-Christophe PLAGNIOL-VILLARD1-0/+30
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15ARM: at91: add pmc DT supportJean-Christophe PLAGNIOL-VILLARD1-2/+1
Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15ARM: at91/dt: add specific DT soc initJean-Christophe PLAGNIOL-VILLARD1-0/+18
This will allow to have static Device mapping and DT probe mapping for the System Controller. Temporary keep the call to ioremap_registers() until we have the binding for the SDRAM/DDR Controller. Temporary keep the main clock hardcoded to 12MHz until we have the binding for the PMC. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: make matrix register base soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+9
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-03ARM: at91: code removal of CAP9 SoCJean-Christophe PLAGNIOL-VILLARD1-17/+0
Following removal announce and addition to feature-removal-schedule.txt, here is the actual source code deletion for Atmel CAP9 family. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: make rstc soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+9
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: fix at91rm9200 soc subtype handlingNicolas Ferre1-2/+5
Currently setting it to PQFP changes subtype to BGA as subtypes are swapped in at91rm9200_set_type(). Wrong subtype causes GPIO bank D not to work at all. After this fix, subtype is still set as unknown. But board code should fill it in with proper value. Another information is thus printed. Bug discovery and first implementation made by Veli-Pekka Peltola. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org>
2011-12-19Merge branch 'picoxcell/cleanup' into next/cleanupOlof Johansson1-18/+0
* picoxcell/cleanup: (4 commits) MAINTAINERS: add maintainer entry for Picochip picoxcell ARM: picoxcell: move io mappings to common.c ARM: picoxcell: don't reserve irq_descs ARM: picoxcell: remove mach/memory.h Conflicts: arch/arm/mach-at91/setup.c
2011-11-28ARM: at91: make DBGU soc independentJean-Christophe PLAGNIOL-VILLARD1-5/+2
we will select now the DBGU used by the soc at Kconfig level For the DEBUG_LL and early_printk this will allow to select which DBGU to use this will also allow to select them when multiple SOC are enabled Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make shutdown controler soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+17
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: add ioremap_registers entry point to soc setupJean-Christophe PLAGNIOL-VILLARD1-0/+2
this will allow to ioremap the register of the PIT, PMC and others and make the code soc independent Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-15ARM: mach-at91: remove arch specific special handling for ioremapNicolas Pitre1-18/+0
A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-28at91: add arch specific ioremap supportJean-Christophe PLAGNIOL-VILLARD1-0/+19
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: factorize sram initJean-Christophe PLAGNIOL-VILLARD1-0/+20
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: move register clocks to soc generic initJean-Christophe PLAGNIOL-VILLARD1-0/+3
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: move clock subsystem init to soc generic initJean-Christophe PLAGNIOL-VILLARD1-1/+4
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: use structure to store the current socJean-Christophe PLAGNIOL-VILLARD1-17/+192
instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: factorize at91 interrupts init to socJean-Christophe PLAGNIOL-VILLARD1-0/+14
they are the same except the default priority Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD1-0/+63
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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