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2014-08-18ARM: imx: correct gpu2d_axi and gpu3d_axi clock settingAnson Huang1-2/+8
On i.MX6Q, gpu2d_axi and gpu3d_axi are either from AXI or AHB clock, but on i.MX6DL, gpu2d_axi and gpu3d_axi are from mmdc_ch0_axi_podf, and they can NOT be gated by mmdc_ch0_axi 's clock gate, the mux option register field(CCM_CBCMR) is marked as "Reserved" now on i.MX6DL RM, so correct these two clks setting. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-08-18ARM: imx: remove unnecessary ARCH_HAS_OPP selectShawn Guo1-2/+0
Since ARCH_MXC already selects ARCH_HAS_OPP, it's really unnecessary for SOC_IMX27 and SOC_IMX5 to select it again. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-08-18ARM: imx: fix TLB missing of IOMUXC base address during suspendShawn Guo1-0/+2
After the suspend routine running in OCRAM puts DDR into self-refresh, it will access IOMUXC block to float DDR IO for power saving. A TLB missing of IOMUXC base address may happen in this case, and triggers an access to DDR, and thus hangs the system. The failure is discovered by running suspend/resume on a Cubox-i board. Though the issue is not Cubox-i specific, it can be hit the on the board quite easily with the 3.15 or 3.16 kernel. Fix the issue with a dummy access to IOMUXC block at the beginning of suspend routine, so that the address translation can be filled into TLB before DDR is put into self-refresh. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Cc: <stable@vger.kernel.org> Acked-by: Anson Huang <Anson.Huang@freescale.com>
2014-08-18ARM: imx6: fix SMP compilation againArnd Bergmann1-0/+2
My earlier patch 1fc593feaf8e ("ARM: imx: build i.MX6 functions only when needed") fixed a problem with building an i.MX5 kernel, but now the problem has returned for the case where we allow ARMv6K SMP builds in multiplatform. With CONFIG_CPU_V7 disabled, but i.MX3 and SMP enabled, we get this build error: arch/arm/mach-imx/built-in.o: In function `v7_secondary_startup': :(.text+0x5124): undefined reference to `v7_invalidate_l1' This puts the code inside of an "ifdef CONFIG_SOC_IMX6" to hopefully do the right thing in all configurations. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-08-08Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds92-4227/+1259
Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and other platform changes for 3.17: - Samsung S5PV210 has been converted to DT and multiplatform - Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms - Kirkwood, one of the popular Marvell platforms, is folded into the mvebu platform code, removing mach-kirkwood - Hwmod data for TI AM43xx and DRA7 platforms - More additions of Renesas shmobile platform support - Removal of plat-samsung contents that can be removed with S5PV210 being multiplatform/DT-enabled and the other two old platforms being removed New platforms (most with only basic support right now): - Hisilicon X5HD2 settop box chipset is introduced - Mediatek MT6589 (mobile chipset) is introduced - Broadcom BCM7xxx settop box chipset is introduced + as usual a lot other pieces all over the platform code" * tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits) ARM: hisi: remove smp from machine descriptor power: reset: move hisilicon reboot code ARM: dts: Add hix5hd2-dkb dts file. ARM: debug: Rename Hi3716 to HIX5HD2 ARM: hisi: enable hix5hd2 SoC ARM: hisi: add ARCH_HISI MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ...
2014-08-06Merge tag 'pm+acpi-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pmLinus Torvalds1-1/+0
Pull ACPI and power management updates from Rafael Wysocki: "Again, ACPICA leads the pack (47 commits), followed by cpufreq (18 commits) and system suspend/hibernation (9 commits). From the new code perspective, the ACPICA update brings ACPI 5.1 to the table, including a new device configuration object called _DSD (Device Specific Data) that will hopefully help us to operate device properties like Device Trees do (at least to some extent) and changes related to supporting ACPI on ARM. Apart from that we have hibernation changes making it use radix trees to store memory bitmaps which should speed up some operations carried out by it quite significantly. We also have some power management changes related to suspend-to-idle (the "freeze" sleep state) support and more preliminary changes needed to support ACPI on ARM (outside of ACPICA). The rest is fixes and cleanups pretty much everywhere. Specifics: - ACPICA update to upstream version 20140724. That includes ACPI 5.1 material (support for the _CCA and _DSD predefined names, changes related to the DMAR and PCCT tables and ARM support among other things) and cleanups related to using ACPICA's header files. A major part of it is related to acpidump and the core code used by that utility. Changes from Bob Moore, David E Box, Lv Zheng, Sascha Wildner, Tomasz Nowicki, Hanjun Guo. - Radix trees for memory bitmaps used by the hibernation core from Joerg Roedel. - Support for waking up the system from suspend-to-idle (also known as the "freeze" sleep state) using ACPI-based PCI wakeup signaling (Rafael J Wysocki). - Fixes for issues related to ACPI button events (Rafael J Wysocki). - New device ID for an ACPI-enumerated device included into the Wildcat Point PCH from Jie Yang. - ACPI video updates related to backlight handling from Hans de Goede and Linus Torvalds. - Preliminary changes needed to support ACPI on ARM from Hanjun Guo and Graeme Gregory. - ACPI PNP core cleanups from Arjun Sreedharan and Zhang Rui. - Cleanups related to ACPI_COMPANION() and ACPI_HANDLE() macros (Rafael J Wysocki). - ACPI-based device hotplug cleanups from Wei Yongjun and Rafael J Wysocki. - Cleanups and improvements related to system suspend from Lan Tianyu, Randy Dunlap and Rafael J Wysocki. - ACPI battery cleanup from Wei Yongjun. - cpufreq core fixes from Viresh Kumar. - Elimination of a deadband effect from the cpufreq ondemand governor and intel_pstate driver cleanups from Stratos Karafotis. - 350MHz CPU support for the powernow-k6 cpufreq driver from Mikulas Patocka. - Fix for the imx6 cpufreq driver from Anson Huang. - cpuidle core and governor cleanups from Daniel Lezcano, Sandeep Tripathy and Mohammad Merajul Islam Molla. - Build fix for the big_little cpuidle driver from Sachin Kamat. - Configuration fix for the Operation Performance Points (OPP) framework from Mark Brown. - APM cleanup from Jean Delvare. - cpupower utility fixes and cleanups from Peter Senna Tschudin, Andrey Utkin, Himangi Saraogi, Rickard Strandqvist, Thomas Renninger" * tag 'pm+acpi-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (118 commits) ACPI / LPSS: add LPSS device for Wildcat Point PCH ACPI / PNP: Replace faulty is_hex_digit() by isxdigit() ACPICA: Update version to 20140724. ACPICA: ACPI 5.1: Update for PCCT table changes. ACPICA/ARM: ACPI 5.1: Update for GTDT table changes. ACPICA/ARM: ACPI 5.1: Update for MADT changes. ACPICA/ARM: ACPI 5.1: Update for FADT changes. ACPICA: ACPI 5.1: Support for the _CCA predifined name. ACPICA: ACPI 5.1: New notify value for System Affinity Update. ACPICA: ACPI 5.1: Support for the _DSD predefined name. ACPICA: Debug object: Add current value of Timer() to debug line prefix. ACPICA: acpihelp: Add UUID support, restructure some existing files. ACPICA: Utilities: Fix local printf issue. ACPICA: Tables: Update for DMAR table changes. ACPICA: Remove some extraneous printf arguments. ACPICA: Update for comments/formatting. No functional changes. ACPICA: Disassembler: Add support for the ToUUID opererator (macro). ACPICA: Remove a redundant cast to acpi_size for ACPI_OFFSET() macro. ACPICA: Work around an ancient GCC bug. ACPI / processor: Make it possible to get local x2apic id via _MAT ...
2014-08-05Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds1-2/+3
Pull ARM updates from Russell King: "Included in this update: - perf updates from Will Deacon: The main changes are callchain stability fixes from Jean Pihet and event mapping and PMU name rework from Mark Rutland The latter is preparatory work for enabling some code re-use with arm64 in the future. - updates for nommu from Uwe Kleine-König: Two different fixes for the same problem making some ARM nommu configurations not boot since 3.6-rc1. The problem is that user_addr_max returned the biggest available RAM address which makes some copy_from_user variants fail to read from XIP memory. - deprecate legacy OMAP DMA API, in preparation for it's removal. The popular drivers have been converted over, leaving a very small number of rarely used drivers, which hopefully can be converted during the next cycle with a bit more visibility (and hopefully people popping out of the woodwork to help test) - more tweaks for BE systems, particularly with the kernel image format. In connection with this, I've cleaned up the way we generate the linker script for the decompressor. - removal of hard-coded assumptions of the kernel stack size, making everywhere depend on the value of THREAD_SIZE_ORDER. - MCPM updates from Nicolas Pitre. - Make it easier for proper CPU part number checks (which should always include the vendor field). - Assembly code optimisation - use the "bx" instruction when returning from a function on ARMv6+ rather than "mov pc, reg". - Save the last kernel misaligned fault location and report it via the procfs alignment file. - Clean up the way we create the initial stack frame, which is a repeated pattern in several different locations. - Support for 8-byte get_user(), needed for some DRM implementations. - mcs locking from Will Deacon. - Save and restore a few more Cortex-A9 registers (for errata workarounds) - Fix various aspects of the SWP emulation, and the ELF hwcap for the SWP instruction. - Update LPAE logic for pte_write and pmd_write to make it more correct. - Support for Broadcom Brahma15 CPU cores. - ARM assembly crypto updates from Ard Biesheuvel" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (53 commits) ARM: add comments to the early page table remap code ARM: 8122/1: smp_scu: enable SCU standby support ARM: 8121/1: smp_scu: use macro for SCU enable bit ARM: 8120/1: crypto: sha512: add ARM NEON implementation ARM: 8119/1: crypto: sha1: add ARM NEON implementation ARM: 8118/1: crypto: sha1/make use of common SHA-1 structures ARM: 8113/1: remove remaining definitions of PLAT_PHYS_OFFSET from <mach/memory.h> ARM: 8111/1: Enable erratum 798181 for Broadcom Brahma-B15 ARM: 8110/1: do CPU-specific init for Broadcom Brahma15 cores ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE ARM: 8108/1: mm: Introduce {pte,pmd}_isset and {pte,pmd}_isclear ARM: hwcap: disable HWCAP_SWP if the CPU advertises it has exclusives ARM: SWP emulation: only initialise on ARMv7 CPUs ARM: SWP emulation: always enable when SMP is enabled ARM: 8103/1: save/restore Cortex-A9 CP15 registers on suspend/resume ARM: 8098/1: mcs lock: implement wfe-based polling for MCS locking ARM: 8091/2: add get_user() support for 8 byte types ARM: 8097/1: unistd.h: relocate comments back to place ARM: 8096/1: Describe required sort order for textofs-y (TEXT_OFFSET) ARM: 8090/1: add revision info for PL310 errata 588369 and 727915 ...
2014-08-01ARM: imx: Remove references to platform_bus in mxc codePawel Moll1-2/+0
The bus devices created to be parents for other peripherals were using platform_bus as a parent, not being platform devices themselves. Remove the references, making them virtual devices instead. Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-23platform: Remove most references to platform_bus devicePawel Moll1-1/+1
A number of board files in arch/arm and arch/unicore32 explicitly reference platform_bus device as a parent for new platform devices. This is unnecessary, as platform device API guarantees that devices with NULL parent are going to by adopted by the mentioned "root" device. This patch removes or replaces with NULL such references. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-23PM / OPP: Remove ARCH_HAS_OPPMark Brown1-1/+0
Since the OPP layer is a kernel library which has been converted to be directly selectable by its callers rather than user selectable and requiring architectures to enable it explicitly the ARCH_HAS_OPP symbol has become redundant and can be removed. Do so. Signed-off-by: Mark Brown <broonie@linaro.org> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-07-19Merge tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/socOlof Johansson1-8/+23
Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim: - add callbacks exynos_suspend() and exynos_powered_up() for support cpuidle through mcpm - skip exynos_cpuidle for exynos5420 because is uses cpuidle-big-liggle generic cpuidle driver - add generic functions to calculate cpu number is used for pmu and this is required for exynos5420 multi-cluster - add of_device_id structure for big.LITTLE cpuidle and add "samsung,exynos5420" compatible string for exynos5420 * tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm ARM: EXYNOS: do not allow cpuidle registration for exynos5420 cpuidle: big.LITTLE: init driver for exynos5420 cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config ARM: EXYNOS: add generic function to calculate cpu number cpuidle: big.LITTLE: add of_device_id structure + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-18Merge tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixesOlof Johansson1-2/+2
Merge "ARM: imx: fixes for 3.16, 2nd take" from Shawn Guo: The i.MX fixes for 3.16, 2nd take: It fixes a hard machine hang regression for boards where only pcie is active but no sata, as the latest imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out. * tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: clk-imx6q: parent lvds_sel input from upstream clock gates Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-18ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+Russell King1-2/+3
ARMv6 and greater introduced a new instruction ("bx") which can be used to return from function calls. Recent CPUs perform better when the "bx lr" instruction is used rather than the "mov pc, lr" instruction, and this sequence is strongly recommended to be used by the ARM architecture manual (section A.4.1.1). We provide a new macro "ret" with all its variants for the condition code which will resolve to the appropriate instruction. Rather than doing this piecemeal, and miss some instances, change all the "mov pc" instances to use the new macro, with the exception of the "movs" instruction and the kprobes code. This allows us to detect the "mov pc, lr" case and fix it up - and also gives us the possibility of deploying this for other registers depending on the CPU selection. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1 Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood Tested-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385 Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-07-18ARM: imx: clk-vf610: fix FlexCAN clock gatingStefan Agner1-2/+4
Extend the clock control for FlexCAN with the second gate which enable the clocks in the Clock Divider (CCM_CSCDR2) register too. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targetsAlexander Shiyan10-25/+12
This patch uses clocksource_of_init() call for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX53: globally disable supervisor protectSteffen Trumtrar1-0/+2
Most peripherals on the i.MX53 have an Off-Platform Peripheral Access Control Register (OPACR) in which the access rights (together with the MPROT registers) can be declared. However, this does not seem to work for example for SSI1+SDMA, because the supervisor bit is not set for the SDMA unit. It does work for SSI2, the QSB for example uses SSI2 for its audio. But SSI2 only works because it does NOT have an OPACR. The right solution would be to fix the access rights for the SDMA, but the unit responsible for this is the Central Security Unit (CSU), which of course is NOT documented. So, until documentation for this is openly available, turn off the supervisor protection because it cripples the hardware. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: allow disabling supervisor protect via DTSteffen Trumtrar2-0/+15
The i.MX SoCs allow to setup fine grained access rights to peripherals on the AIPS bus. This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21 or in later SoC versions the Off-Platform Peripheral Access Control Register (OPACR), e.g. i.MX53. Under certain circumstances this leads to problems in which bus masters are not granted their access rights to peripherals. To be able to disable these restrictions on DT platforms, add a helper function that looks for AIPS nodes in the DT and disables them for every compatible node it finds. The compatible has to be declared in the mach-specific entry file, where this helper function should then be called. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gateAlexander Shiyan1-5/+6
This patch adds missing 26 MHz oscillator circuit clock gate support. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Remove unused definitionsAlexander Shiyan1-25/+0
This patch removes definitions which not used anywhere in the driver. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Introduce DT include for clock providerAlexander Shiyan1-185/+162
Use clock defines in order to make devicetrees more human readable. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove Freescale Logic Product Development i.MX27 Lite-Kit board supportAlexander Shiyan3-93/+0
The board has no insufficient support to be fully functional and seems has no users. This patch removes support for this board. However, the support may be added in the future by using the devicetree. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27Alexander Shiyan2-13/+1
This patch removes excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27. Instead we use SOC_IMX*. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove i.MX1 camera supportAlexander Shiyan7-112/+0
i.MX1 camera driver has been removed by the commit 90b055898e. This patch removes remaining support files for this camera. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: use PTR_ERR_OR_ZEROFabian Frederick5-16/+5
replace IS_ERR/PTR_ERR Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: build cpu_is_imx6sl function conditionallyArnd Bergmann1-0/+7
imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl based machine. However if support for imx6sl is not enabled at compile time, this prevents us from building the kernel and we get this link error instead: arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': :(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk' This makes the cpu_is_imx6sl function conditionally return false if imx6sl is disabled at compile-time, which matches what the older cpu_is_mx* macros did. We have similar inline functions for the other imx6 variants, but so far I have not run into a case where the extra #ifdef is necessary. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: imx6sx uses imx6q cpuidle codeArnd Bergmann1-0/+2
Building a kernel for imx6sx but without imx6q support results in this link error because of the missing cpuidle driver: arch/arm/mach-imx/built-in.o: In function `imx6sx_init_late'::(.init.text+0xc228): undefined reference to `imx6q_cpuidle_init' This patch adds a Makefile entry so we always build support for the imx6q_cpuidle code when at least one of the 6sx or 6q variants are enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: drop PL310 errata 588369 and 727915Shawn Guo1-4/+0
The PL310 integrated on i.MX6 series and VF610 are revision r3p1 and later. Per ARM PL310 errata document, 588369 is fixed in r2p0 and 727915 is fixed in r3p1. Neither is needed for i.MX6 or VF610. So let's drop them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: clk-imx6sx: register SSI/SSI_IPG as shared gate clocksFabio Estevam1-6/+9
SSI and SSI_IPG are clocks controlled by the same clock gating field, so register them with imx_clk_gate2_shared. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: mark .dt_compat as constShawn Guo9-9/+9
Otherwise GCC will mark the .init.rodata section R/W, which causes a compile error once we add other real R/O data. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: mx6: Only check for 1.2GHz for mx6quadFabio Estevam1-1/+1
It is only the mx6quad variant that can run up to 1.2GHz, so add the check accordingly. This avoids getting the following warning on a mx6solo: failed to disable 1.2 GHz OPP Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX25 clk: Use of_clk_init() for DT caseDenis Carikli3-22/+20
Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM i.MX25 clk: Fix gpt timer clock.Denis Carikli1-1/+1
The gpt0 timer clock has been wrong since: 6bbaec5 ARM i.MX25: implement clocks using common clock framework Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX21 clk: Add devicetree supportAlexander Shiyan1-123/+136
This patch adds devicetree support CCM module for i.MX21 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX21 clk: Cleanup driverAlexander Shiyan1-24/+1
This is a cleanup for i.MX21 clk driver. This change includes: - Reduce license text. - Remove unused definitions. - Remove unused #include and sort the rest. - Remove useless comment. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX21 clk: Remove clk_register_clkdev() for unused clocksAlexander Shiyan1-19/+0
This patch removes clk_register_clkdev() for the clocks that do not have any users for boards and drivers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX21 clk: Clock initialization reworkAlexander Shiyan2-45/+75
This patch perform rework i.MX21 clock initialization. This includes adding missing clocks and sort clocks by register address. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: clk-imx51-imx53: Remove clk_register_clkdev()Fabio Estevam1-76/+0
mx51 and mx53 are device tree only platforms, so we no longer need all these calls to clk_register_clkdev(). Only keep cpu0 and gpc_dvfs clk_register_clkdev() calls. Tested on imx51-babbage and imx53-qsb boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: add standby mode support for suspendAnson Huang3-5/+32
Add standby mode support for suspend, to enter standby mode: echo standby > /sys/power/state; Use UART or RTC alarm to wake up system, when system enters standby mode, SOC will enter STOP mode with ARM core kept power on and 24M XTAL on. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: mem bit must be cleared before entering DSM modeAnson Huang3-4/+8
According to hardware design, mem bit must be clear before entering DSM mode, as ARM core will be power gated in DSM mode. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx6qdl: switch to use macro for clock IDShawn Guo1-282/+247
Instead of using enum for clock ID, let's switch imx6qdl clock driver to use macro. In this case, device tree can reuse these macros to improve readability. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: add cpuidle support for i.mx6sxAnson Huang2-1/+10
Add cpuidle support for i.MX6SX, derive from i.MX6Q's cpuidle, two levels supported: 1. WFI; 2. WAIT mode. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: add suspend support for i.mx6sxAnson Huang3-3/+28
Add suspend support for i.MX6SX. To enter suspend, echo mem > /sys/power/state. To exit suspend, using RTC alarm or enable debug UART wakeup. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove Freescale i.MX27 IP Camera board supportAlexander Shiyan3-87/+0
The board has no insufficient support to be fully functional and seems has no users. This patch removes support for this board. However, the support may be added in the future by using the devicetree. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX system: Add a reset fallback if base address of watchdog is not setAlexander Shiyan1-0/+4
This patch adds a reset fallback if base address of watchdog is not set. This is intended for a targets not compatible with imx-21 watchdog, i.MX1 for example. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX system: Simplify handling watchdog clockAlexander Shiyan1-13/+7
This patch simplifies handling watchdog clock a bit. As an additional change, now we properly check WDT clock in a reset function. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX clk: Move clock check function in common locationAlexander Shiyan13-73/+32
This patch moves clock check function in common i.MX location and switch i.MX clk drivers to use this new function. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Use of_clk_init() for DT caseAlexander Shiyan3-35/+29
Replace .init_time() hook with of_clk_init() for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX27 clk: Separate DT and non-DT init procedureAlexander Shiyan1-15/+24
This patch separates DT and non-DT clock initialization procedure, so we can avoid a lot of unneeded clk_register_clkdev() for DT case. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove excess variableAlexander Shiyan1-8/+7
Base address for driver is global, there are no need to use intermediate variable for it. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Use of_clk_get_by_name() for timer clocks for DT case.Alexander Shiyan7-28/+25
Use of_clk_get_by_name() for timer clocks for DT case. This patch eliminates a lot of unneeded clk_register_clkdev() calls for GPT. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>