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2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156Thomas Gleixner1-15/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-12-21ARM: OMAP2+: dra762: Add support for device package identificationLokesh Vutla1-0/+16
dra762 comes in two packages: - ABZ: Pin compatible package with DRA742 and DDR@1333MHz - ACD: High performance(OPP_PLUS) package with new IPs Both the above packages uses the same IDCODE hence needs to differentiate using package information in DIE_ID_2. Add support for the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-02ARM: DRA722: Add support for DRA71x Silicon Rev 2.1Vishal Mahaveer1-0/+1
DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Silicon Rev 2.1 is a minor variant of DRA71x Rev 2.0 with various fixes including the following: - NAND boot fixes - ROM update for secure boot crypto enhancement Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-02ARM: DRA722: remove redundant definition of 1.0 deviceVishal Mahaveer1-1/+0
Remove duplicate definition of Rev 1.0 device. Fixes: 81032e34e184 ("ARM: DRA752: Add ID detect for ES2.0") Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dra762: Add support for device identificationLokesh Vutla1-0/+5
Add ID code detection for dra762 SoC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-18Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-119/+21
Pull ARM SoC platform updates from Arnd Bergmann: "We get support for three new 32-bit SoC platforms this time. The amount of changes in arch/arm for any of them is miniscule, as all the interesting code is in device driver subsystems (irqchip, clk, pinctrl, ...) these days. I'm listing them here, as the addition of the Kconfig statement is the main relevant milestone for a new platform. In each case, some drivers are are shared with existing platforms, while other drivers are added for v4.7 as well, or come in a later release. - The Aspeed platform is probably the most interesting one, this is what most whitebox servers use as their baseboard management controller. We get support for the very common ast2400 and ast2500 SoCs. The OpenBMC project focuses on this chip, and the LWN article about their ELC 2016 presentation at https://lwn.net/Articles/683320/ triggered the submission, but the code comes from IBM's OpenPOWER team rather than the team at Facebook. There are still a lot more drivers that need to get added over time, and I hope both teams can work together on that. - OXNAS is an old platform for Network Attached Storage devices from Oxford Semiconductor. There are models with ARM10 (!) and ARM11MPCore cores, but for now, we only support the original ARM9 based versions. The product lineup was subsequently part of PLX, Avago and now the new Broadcom Ltd. https://wiki.openwrt.org/doc/hardware/soc/soc.oxnas has some more information. - V2M-MPS2 is a prototyping platform from ARM for their Cortex-M cores and is related to the existing Realview / Versatile Express lineup, but without MMU. We now support various NOMMU platforms, so adding a new one is fairly straightforward. http://infocenter.arm.com/help/topic/com.arm.doc.100112_0100_03_en/ has detailed information about the platform. Other noteworthy updates: - Work on LPC32xx has resumed, and Vladimir Zapolskiy and Sylvain Lemieux are now maintaining the platform. This is an older ARM9 based platform from NXP (not Freescale), but it remains in use in embedded markets. - Kevin Hilman is now co-maintaining the Amlogic Meson platform for both 32-bit and 64-bit ARM, and started contributing some patches. - As is often the case, work on the OMAP platforms makes up the bulk of the actual SoC code changes in arch/arm, but there isn't a lot of that either" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) MAINTAINERS: ARM/Amlogic: add co-maintainer, misc. updates MAINTAINERS: add ARM/NXP LPC32XX SoC specific drivers to the section MAINTAINERS: add new maintainers of NXP LPC32xx SoC MAINTAINERS: move ARM/NXP LPC32xx record to ARM section arm: Add Aspeed machine ARM: lpc32xx: remove duplicate const on lpc32xx_auxdata_lookup ARM: lpc32xx: remove leftovers of legacy clock source and provider drivers ARM: lpc32xx: remove reboot header file ARM: dove: Remove CLK_IS_ROOT ARM: orion5x: Remove CLK_IS_ROOT ARM: mv78xx0: Remove CLK_IS_ROOT ARM: davinci: da850: use clk->set_parent for async3 ARM: davinci: Move clock init after ioremap. MAINTAINERS: Update ARM Versatile Express platform entry ARM: vexpress/mps2: introduce MPS2 platform MAINTAINERS: add maintainer entry for ARM/OXNAS platform ARM: Add new mach-oxnas irqchip: versatile-fpga: add new compatible for OX810SE SoC ARM: uniphier: correct the call order of of_node_put() MAINTAINERS: fix stale TI DaVinci entries ...
2016-04-13ARM: OMAP2+: remove redundant multiplatform checksJonas Rabenstein1-119/+21
The directory arch/arm/mach-omap2 is only selected for compilation if CONFIG_ARCH_OMAP2PLUS is selected. CONFIG_ARCH_OMAP2PLUS itself is a silent option and all machines selecting this option are multiplatform devices. As a consequence checks for CONFIG_ARCH_MULTIPLATFORM as well as CONFIG_ARCH_OMAP2PLUS within that directory are superfluous and can be removed. Signed-off-by: Jonas Rabenstein <jonas.rabenstein@studium.uni-erlangen.de> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-03-30ARM: DRA722: Add ID detect for Silicon Rev 2.0Vishal Mahaveer1-0/+1
Silicon Rev 2.0 is a minor variant of Rev 1.0. Rev 2.0 is an incremental revision with various fixes including the following: - Reset logic fixes - Few asymmetric aging logic fixes - Ethernet speed fixes - EDMA fixes for McASP Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-19ARM: OMAP: DRA7: Make use of omap_revision information for soc_is* callsKeerthy1-3/+20
Currently of_machine_is_compatible is used to detect the soc which employs string comparison operations. We already have all the required information in the omap_revision. Hence make use of the same like the previous OMAPs and avoid costly string comparisons. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-10-16ARM: OMAP2+: Rename cpu_is macros to soc_isTony Lindgren1-89/+106
The naming for the cpu_is macros is confusing as the CPU is separate and within the SoC. Let's rename all the macros to soc_is, and let's define cpu_is also for the ones still in use. Then we can just remove the cpu_is macros once the users are fixed up. To keep the chances of breaking anything, the changes were generated with the following regular expressions: s/cpu_is/soc_is/g s/CPU/SoC/g Then the list of existing cpu_is users was generated with: $ $ grep -o -e 'cpu_is_.\+()' arch/arm/mach-omap2/*.[chS] | \ cut -d: -f2 | sort | uniq And added to the end of the soc.h. I decided to rework the earlier patches by Keerthy <j-keerthy@ti.com> to keep changes down to minimum to avoid potential errors and stick to just search and replace. Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-09-01ARM: DRA752: Add ID detect for ES2.0Vishal Mahaveer1-0/+2
ES2.0 is a minor variant of ES1.1. ES2.0 is an incremental revision with various fixes including the following: - reset logic fixes - few assymetric aging logic fixes - MMC clock rate fixes - Ethernet speed fixes - edma fixes for mcasp NOTE: even though we use a compatible of dra742 and dra752, the usage in the Linux kernel is more or less interchangable - we use dra752 more often in the linux kernel compared to dra742 and 4.2-rc6 Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-14ARM: OMAP2+: Fix ti81xx class typeTony Lindgren1-2/+2
Otherwise it will return true for cpu_is_omap34xx() which we don't want for the clocks and hwmod. It's closer to am33xx for the clocks and hwmod than to the omap34xx. We also want to be able to detect 814x and 816x separately as at least the clocks are different with 814x using a apll and 816x using a fapll for the source clocks. Note that we can also remove omap3xxx_clk_init() call as it's wrong and ti81xx are booting in device tree only mode. Cc: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-12-10ARM: OMAP2+: AM43x: Add ID for ES1.2Lokesh Vutla1-0/+1
ES1.2 is a minor variant of ES1.1. Major changes since ES1.1 are updating ROM for fixing the following boot modes: - NAND boot - UART boot - Ethernet boot - USB HOST/Client boot This patch adds ID support for AM437x ES1.2 silicon. There are no additional kernel fixes required for ES1.2 silicon. Latest Technical Documentation can be found here: http://www.ti.com/lsds/ti/arm/sitara_arm_cortex_a_processor/arm_cortex_a9_core/am437x_arm_cortex_a9/tech_docs.page Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-27ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variantsRajendra Nayak1-0/+6
Use the corresponding compatibles to identify the devices. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-06-16ARM: DRA722: add detection of SoC informationNishanth Menon1-0/+1
Add support for DRA72x device DIEID. Currently these devices are reported as DRA75/74 family of processors. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-19ARM: DRA752: add detection of SoC informationNishanth Menon1-0/+5
Currently the files in /sys/devices/soc0/ show no information about DRA7. Few userspace programs do depend on this information to make SoC specific support. So update logic to detect the relevant information and provide to userspace. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-28ARM: OMAP2+: AM43x: Add ID for ES1.1Lokesh Vutla1-1/+2
Adding ID for AM437x ES1.1 silicon. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-08ARM: OMAP5: id: Remove ES1.0 supportNishanth Menon1-2/+0
OMAP5 ES1.0 was intended as a test chip and has major register level differences w.r.t ES2.0 revision of the chip. All register defines, dts support has been solely added for ES2.0 version of the chip. Further, all ES1.0 chips and platforms are supposed to have been removed from circulation. Hence, there is no need to further retain any resemblence of ES1.0 support in id detection code. Remove the omap_revision handling and BUG() instead to prevent folks who mistakenly try an older unsupported chip and report bogus errors. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-13ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs'R Sricharan1-0/+17
The DRA7xx is a high-performance, infotainment application device, based on enhanced OMAP architecture integrated on a 28-nm technology. Since DRA7 is a platform supported only using DT, the cpu detection is based on the compatibles passed from DT blobs as suggested here http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html Suggested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
2013-06-18ARM: OMAP3+: am33xx id: Add new am33xx specific function to check dev_featureVaibhav Hiremath1-0/+1
Layout of DEV_FEATURE register (offset = 0x604) is different between TI81xx and AM33xx device, so create separate function which will check for features available on specific AM33xx SoC and set the flags accordingly. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-06-18ARM: OMAP2: TI81XX: id: Add cpu id for TI816x ES2.0 and ES2.1Aida Mynzhasova1-0/+2
Currently omap3xxx_check_revision() detects ES1.0 and ES1.1 only, this patch extends it by adding ES2.0 and ES2.1 versions support. Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-06-12ARM: OMAP2+: AM43x: soc_is supportAfzal Mohammed1-0/+23
soc_is support for AM43x family of SoC's. Only variant now is AM437x, it is made as a subclass of AM43x. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP2: AM33XX: id: Add support for new AM335x PG2.1 SiVaibhav Hiremath1-0/+1
Add support for chip id detection of AM335x PG2.1 Silicon. Currently omap3xxx_check_revision() detects PG1.0 and PG2.0 only, this patch extends it by adding PG2.1 Si support. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08ARM: OMAP2+: omap_device: use late_initcall_syncKevin Hilman1-0/+1
If DEBUG_LL and earlyprintk are enabled, and omap-serial.c is compiled as a module, the kernel boot hangs early as the clocks for serial port are cut while earlyprintk still uses the port. The problem is a race between the late_initcall for omap_device (which idles devices that have no drivers) and the late_initcall in kernel/printk.c which turns off the earlyconsole. Any printks that happen between this omap_device late initcall and the earlyconsole late initcall will crash when accessing the UART. The fix is to ensure the omap_device initcall happens after the earlyconsole initcall. Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-19ARM: OMAP5: Update SOC id detection code for ES2Santosh Shilimkar1-0/+2
Update OMAP5 ES2 idcode and make ES2 as default detection. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-02-28Merge tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-0/+1
Pull ARM SoC late OMAP changes from Olof Johansson: "This branch contains changes for OMAP that came in late during the release staging, close to when the merge window opened. It contains, among other things: - OMAP PM fixes and some patches for audio device integration - OMAP clock fixes related to common clock conversion - A set of patches cleaning up WFI entry and blocking. - A set of fixes and IP block support for PM on TI AM33xx SoCs (Beaglebone, etc) - A set of smaller fixes and cleanups around AM33xx restart and revision detection, as well as removal of some dead code (CONFIG_32K_TIMER_HZ)" * tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits) ARM: omap2: include linux/errno.h in hwmod_reset ARM: OMAP2+: fix some omap_device_build() calls that aren't compiled by default ARM: OMAP4: hwmod data: Enable AESS hwmod device ARM: OMAP4: hwmod data: Update AESS data with memory bank area ARM: OMAP4+: AESS: enable internal auto-gating during initial setup ASoC: TI AESS: add autogating-enable function, callable from architecture code ARM: OMAP2+: hwmod: add enable_preprogram hook ARM: OMAP4: clock data: Add missing clkdm association for dpll_usb ARM: OMAP2+: PM: Fix the dt return condition in pm_late_init() ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug ARM: OMAP2+: AM33xx: hwmod: add missing HWMOD_NO_IDLEST flags ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem ARM: OMAP: AM33xx hwmod: Corrects PWM subsystem HWMOD entries ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3 ARM: OMAP2+: AM33XX: Update the hardreset API ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files ...
2013-02-01ARM: OMAP2: AM33XX: id: Add support for AM335x PG2.0AnilKumar Ch1-0/+1
Add support for chip id recognition of AM335x PG2.0 silicon. By default omap3xxx_check_revision() recognizes PG1.0, which is extended by adding PG2.0 support Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-01-11ARM: OMAP2+: Limit omap initcalls to omap only on multiplatform kernelsTony Lindgren1-0/+29
We need to make sure that multiplatform kernels don't run omap initcalls when booted on other SoCs. Do this by adding wrapper macros for the initcalls that return early if soc_is_omap() test fails. This allows us to easily change the defines later if we have SoC specific init sections available. Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-11-14ARM: OMAP4: ID: Improve features detection and checkIvan Khoronzhuk1-6/+2
Replaces several flags bearing the same meaning. There is no need to set flags due to different omap types here, it can be checked in appropriate places as well. Cc: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-18ARM: OMAP: Split plat/cpu.h into local soc.h for mach-omap1 and mach-omap2Tony Lindgren1-1/+467
We want to remove plat/cpu.h. To do this, let's first split it to private soc.h to mach-omap1 and mach-omap2. We have to keep plat/cpu.h around until the remaining drivers are fixed, so let's include the local soc.h in plat/cpu.h and for drivers still including plat/cpu.h. Once the drivers are fixed not to include plat/cpu.h, we can remove the file. This is needed for the ARM common zImage support. [tony@atomide.com: updated to not print a warning] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-12ARM: OMAP2+ Move SoC specific headers to be local to mach-omap2Tony Lindgren1-6/+6
These can now be moved to be local headers in mach-omap2. Note that this patch removes arch/arm/plat-omap/devices.c as it will get removed anyways with Paul Walmsley's patch "ARM: OMAP: split OMAP1, OMAP2+ RNG device registration". Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-12ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+Tony Lindgren1-0/+6
As the plat and mach includes need to disappear for single zImage work, we need to remove plat/hardware.h. Do this by splitting plat/hardware.h into omap1 and omap2+ specific files. The old plat/hardware.h already has omap1 only defines, so it gets moved to mach/hardware.h for omap1. For omap2+, we use the local soc.h that for now just includes the related SoC headers to keep this patch more readable. Note that the local soc.h still includes plat/cpu.h that can be dealt with in later patches. Let's also include plat/serial.h from common.h for all the board-*.c files. This allows making the include files local later on without patching these files again. Note that only minimal changes are done in this patch for the drivers/watchdog/omap_wdt.c driver to keep things compiling. Further patches are needed to eventually remove cpu_is_omap usage in the drivers. Also only minimal changes are done to sound/soc/omap/* to remove the unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's no need to include omap44xx.h. While at it, also sort some of the includes in the standard way. Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-12ARM: OMAP2+: Prepare for irqs.h removalTony Lindgren1-0/+1
As the interrupts should only be defined in the platform_data, and eventually coming from device tree, there's no need to define them in header files. Let's remove the hardcoded references to irqs.h and fix up the includes so we don't rely on headers included in irqs.h. Note that we're defining OMAP_INTC_START as 0 to the interrupts. This will be needed when we enable SPARSE_IRQ. For some drivers we need to add #include <plat/cpu.h> for now until these drivers are fixed to remove cpu_is_omapxxxx() usage. While at it, sort som of the includes the standard way, and add the trailing commas where they are missing in the related data structures. Note that for drivers/staging/tidspbridge we just define things locally. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>