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2013-06-04ARM: ux500: avoid warning in ux500_read_asicidArnd Bergmann1-3/+3
phys_addr_t may be 64 bit, which causes this harmless warning in ux500_read_asicid: arch/arm/mach-ux500/id.c: In function 'ux500_read_asicid': arch/arm/include/asm/io.h:159:19: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define IOMEM(x) ((void __force __iomem *)(x)) ^ arch/arm/mach-ux500/id.c:40:9: note: in expansion of macro 'readl' return readl(IOMEM(UX500_VIRT_ROM + (addr & 0xfff))); We can solve this in a nicer way by making UX500_VIRT_ROM have a proper type to start with and calculating the address using pointer arithmetic. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-08ARM: ux500: make remaining headers localArnd Bergmann1-1/+1
mach/setup.h and mach/devices.h are only needed from inside of mach-ux500 now, so we can simply move them out of the include/mach directory. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-08ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>Linus Walleij1-1/+1
This removes <mach/hardware.h> and <mach/db8500-regs.h> from the Ux500, merging them into the local include "db8500-regs.h" in mach-ux500. There is some impact outside the ux500 machine, but most of it is dealt with in earlier patches. Contains portions of a clean-up patch from Arnd Bergmann. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-29ARM: ux500: de-globalize <mach/id.h>Linus Walleij1-0/+2
This removes the file <mach/id.h> from the global kernel include scope, making it a pure mach-ux500 detail. All ASIC specifics needed by drivers shall henceforth be passed from either platform data or the device tree. Cc: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02ARM: ux500: core U9540 supportLinus Walleij1-2/+7
This adds support for the U9540 variant of the U8500 series. This is an application processor without internal modem. This is the most basic part with ASIC ID, CPU-related fixes, IRQ list, register ranges, timer, UART, and L2 cache setup. This is based on a patch by Michel Jaouen which was rewritten to fit with the latest 3.3 kernel. ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to migrate to using Device Tree for getting the IRQs to devices. ChangeLog v2->v3: introduced a fixed virtual offset for the ROM as suggested by Arnd Bergmann. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-12-19ARM: ux500: support DB8520Rabin Vincent1-2/+4
Extend the ux500 ID table to cover the DB8520 variant. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-01-10ux500: dynamic SOC detectionRabin Vincent1-0/+107
Dynamically detect the DBx500 SOC an revision based on the ASIC ID. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>