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2015-12-11ARM64: dts: ls2080a: fix eSDHC endiannessyangbo lu1-0/+1
Add the "little-endian" property to fix the issue that eSDHC is not working and dumping out "mmc0: Controller never released inhibit bit(s)." error messages constantly. Fixes: 5461597f6ce0 ("dts/ls2080a: Update DTSI to add support of various peripherals") Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-12-12Merge tag 'arm-soc/for-4.5/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64Arnd Bergmann2-9/+217
Merge "Broadcom devicetree-arm64 changes for v4.5" from Florian Fainelli: This pull request contains Broadcom ARM64-based Device Tree changes: - Anup Patel adds L2 cache, SMMU, syscon-based reboot, PMU v3, iProc RNG200 (HWRNG) and NAND flash controller support to the Northstar 2 SoCs - Ray Jui adds the I2C Device Tree nodes to the Norsthar 2 SoCs - Jon Mason enables the clock providers on the Norsthar 2 SoCs * tag 'arm-soc/for-4.5/devicetree-arm64' of http://github.com/Broadcom/stblinux: ARM64: dts: enable clock support for Broadcom NS2 arm64: dts: Add BRCM IPROC NAND DT node for NS2 arm64: dts: Add I2C nodes for NS2 arm64: dts: Add IPROC RNG200 DT node for NS2 arm64: dts: Add ARM PMUv3 DT node in NS2 DT arm64: dts: Add syscon based reboot in DT for NS2 arm64: dts: Add SMMU DT node for NS2 arm64: dts: Add L2-cache DT node for NS2
2015-12-12Merge tag 'berlin64-dt-for-4.5-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt64Arnd Bergmann1-1/+62
Merge "Marvell Berlin64 DT changes (round 1)" from Sebastian Hesselbarth: - add pinctrl nodes and uart0 pinmux - add watchdog nodes - add PSCI-1.0 support - add cpuidle support * tag 'berlin64-dt-for-4.5-1' of git://git.infradead.org/users/hesselba/linux-berlin: arm64: dts: berlin4ct: support cpuidle-dt arm64: dts: berlin: PSCI-1.0 support arm64: dts: berlin4ct: add watchdog nodes arm64: dts: berlin4ct: add default pinmux for uart0 arm64: dts: berlin4ct: add the pinctrl node
2015-12-12Merge tag 'v4.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64Arnd Bergmann6-0/+673
Merge "rockchip dts64 changes for 4.5" from Heiko Stuebner: First round of 64bit devicetree changes for Rockchip socs. This includes support for the evaluation board of the rk3368 as well as the dts-part for the newly added thermal management support, rk3368 pwm nodes and an alias. * tag 'v4.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add rk3368 evaluation board arm64: dts: rockchip: add the pwm node info for RK3368 SoCs arm64: dts: rockchip: Enable the Thermal on R88 board arm64: dts: rockchip: Add main thermal info to rk3368.dtsi arm64: dts: rockchip: Add the thermal data found on RK3368 arm64: dts: rockchip: Setup rk3368 ethernet0 alias for u-boot
2015-12-12Merge tag 'xgene-dts-for-v4.5-v1' of https://github.com/AppliedMicro/xgene-next into next/dt64Arnd Bergmann4-0/+543
Merge "DTS changes for X-Gene platforms queued for v4.5" from Duc Dang This patch set adds DTS entries to support various IPs for X-Gene v1 and X-Gene v2 SoC: - X-Gene v1: Enable support for MMC, USB, GPIO controllers, I2C controller, L2 Cache topology - X-Gene v2: Enable support for MMC, USB, GPIO controller, I2C controller (with RTC), PCIe controller with GICv2m MSI, EDAC, L2 Cache topology, TRNG * tag 'xgene-dts-for-v4.5-v1' of https://github.com/AppliedMicro/xgene-next: arm64: dts: Add L2 cache topology for APM X-Gene SoC arm64: dts: Add RTC DTS entry for X-Gene v2 SoC platform arm64: dts: Add Designware I2C controller DTS entries for X-Gene v2 SoC platform arm64: dts: Add Designware I2C controller DTS entries for X-Gene v1 SoC arm64: dts: Add APM X-Gene v2 SoC EDAC DTS entries arm64: dts: Add APM X-Gene v2 SoC Designware GPIO controller DTS entry arm64: dts: Add Designware GPIO dts binding for APM X-Gene v1 platform arm64: dts: Add APM X-Gene v2 SoC GFC GPIO controller DTS entry arm64: dts: Add APM X-Gene v1 SoC GFC GPIO controller DTS entries arm64: dts: Add USB nodes for APM X-Gene v2 platforms arm64: dts: Add USB nodes for APM X-Gene v1 platforms arm64: dts: Add PCIe node for APM X-Gene v2 platforms arm64: dts: Add v2m MSI frame nodes for APM X-Gene v2 platforms arm64: dts: Add RNG device tree nodes for APM X-Gene v2 platform arm64: dts: X-Gene: Do not reset or enable/disable clock for AHB block arm64: dts: Add the arasan mmc DTS entries for APm X-Gene v2 SoC arm64: dts: Add the arasan mmc DTS entries for APM X-Gene v1 SoC
2015-12-11arm64: dts: rockchip: Fix typo in rk3368 sdmmc card detect pin nameMatthias Brugger1-1/+1
The card detect pin is currently called sdmcc-cd. This patch fixes the typo and renames the pin to sdmmc-cd. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-11arm64: dts: rockchip: correct voltage range for rk3368-evb-act8846 boardCaesar Wang1-3/+3
In general, the logic voltage is affected by ddr frequency factors. We should fix the correct voltage range since assuemd that we have the ddr frequency driver in mainline. AFAIK, the 1.8v voltage is used by the SD3.0 card. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-08arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TXIvan T. Ivanov1-0/+4
Add DMA channels definitions for UART1 and UART2 controllers. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurationsIvan T. Ivanov1-4/+9
Add devicetree bindings for UART1 CTS_N and RTS_N pins. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-06arm64: dts: berlin4ct: support cpuidle-dtJisheng Zhang1-0/+16
This patch adds an idle-states node to describe the berlin4ct idle states and also adds references to the idle-states node in all CPU nodes. After this patch cpuidle is enabled. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-12-02arm64: dts: rockchip: add rk3368 evaluation boardCaesar Wang3-0/+458
This board is similar with the rk3288 evb board but the rk3368 top board. There exist the act8846 as the pmic. Moment, add the balight/thermal/emmc/usb.. stuff, Let the board can happy work. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-02arm64: dts: rockchip: add the pwm node info for RK3368 SoCsCaesar Wang1-0/+60
The pulse-width modulator (PWM) feature is very common in embedded systems. On the rk3368 there exist 4 built-in PWM channels. In general, the pwm pins can via the pinctrl to configure iomux mode except the pwm2 since the pwm2 iomux mode from the SoC control register. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-01arm64: dts: mediatek: add xHCI & usb phy for mt8173Chunfeng Yun2-0/+58
add xHCI and phy drivers for MT8173-EVB Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-01arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_BKuninori Morimoto1-0/+38
CS2000 needs AUDIO_CLKOUT as master clock which is generated by Renesas sound, and Renesas sound needs CS2000 as ADUIO_CLK_B. Because of this relationship, it will be dead-lock when driver probe. cs2000: clk_multiplier@4f { ... clocks = <&rcar_sound 0>, <&x12_clk>; ... }; &rcar_sound { ... assigned-clocks = <&cs2000>; ... }; This patch is using dummy audio_clkout to avoid this issue. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-30arm64: renesas: salvator-x: set ak4613 In/Out pin as single-endKuninori Morimoto1-0/+9
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-28arm64: dts: berlin: PSCI-1.0 supportJisheng Zhang1-1/+1
The firmware can support PSCI-1.0 in fact. This change also enables suspend to ram on Marvell berlin arm64 SoC. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-11-28arm64: dts: berlin4ct: add watchdog nodesJisheng Zhang1-0/+23
The Marvell Berlin BG4CT has 3 watchdogs which are compatible with the snps,dw-wdt driver sit in the sysmgr domain. This patch adds the corresponding device tree nodes. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-11-26arm64: renesas: salvator-x: Sound DVC supportKuninori Morimoto1-2/+25
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SRC supportKuninori Morimoto1-2/+2
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SSI DMA support via BUSIFKuninori Morimoto1-5/+0
DMA transfer to/from SSIU DMA [MEM] -> [SSIU] -> [SSI] DMA [MEM] <- [SSIU] <- [SSI] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SSI DMA supportKuninori Morimoto1-2/+2
DMA transfer to/from SSI DMA [MEM] -> [SSI] DMA [MEM] <- [SSI] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SSI PIO supportKuninori Morimoto1-0/+76
This patch adds PIO sound support for Salvator-X board. It can use 44.1kHz base sound only at this point, since 48kHz base sound needs CS2000, but it is not yet upstreamed. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound DVC supportKuninori Morimoto1-0/+13
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SRC supportKuninori Morimoto1-0/+61
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SSI DMA supportKuninori Morimoto1-0/+20
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SSI PIO supportKuninori Morimoto1-0/+95
This patch adds SSI for PIO sound support Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: add AUDIO_DMAC supportKuninori Morimoto1-0/+64
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-24ARM: mediatek: DT: Move reset controller constants into common locationPhilipp Zabel1-1/+1
By popular vote, the DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the mediatek reset constants in there, too, to avoid confusion. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-11-24arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit supportThierry Reding2-0/+10
The Jetson TX1 Development Kit is the successor of the Jetson TK1. The Jetson TX1 is composed of the Jetson TX1 module (P2180) that connects to the P2597 I/O board. It comes with a 1200x1920 MIPI DSI panel connected via the P2597's display connector. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA P2597 I/O board supportThierry Reding1-0/+1270
The NVIDIA P2597 I/O board is a carrier board for the Jetson TX1 module and together they are also known as the Jetson TX1 Developer Kit. The I/O board provides an RJ45 connector routed to the network adapter that is part of the Jetson TX1 module. It exposes many other connectors such as SATA, USB 3.0, HDMI, JTAG and PCIe, among others, as well. Dedicated connectors allow display and camera modules to be attached. A full-size SD slot is provided to extend storage beyond the 32 GiB of eMMC found on the Jetson TX1 module. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA Jetson TX1 supportThierry Reding1-0/+45
The NVIDIA Jetson TX1 is a processor module that features a Tegra210 SoC with 4 GiB of LPDDR4 RAM attached, a 32 GiB eMMC and other essentials. It is typically connected to some I/O board (such as the P2597) that has the connectors needed to hook it up to the outside world. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA P2571 board supportThierry Reding2-0/+1303
The NVIDIA P2571 is an internal reference design that's very similar to the P2371, but targetting different use-cases. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA P2371 board supportThierry Reding2-0/+10
The NVIDIA P2371 is an internal reference design that uses a P2530 processor module hooked up to a P2595 I/O board and an optional display module for a 1200x1920 MIPI DSI panel. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA P2595 I/O board supportThierry Reding1-0/+1272
The NVIDIA P2595 I/O board is used in several reference designs and has the connectors to connect the P2530 compute module to the outside world. It features a USB 3.0 network adapter, a USB 3.0 port, an HDMI port, a SATA port, an audio codec, a microSD card slot and a display connector, among others. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA P2530 main board supportThierry Reding1-0/+50
The NVIDIA P2530 is a processor module used in several reference designs that features a Tegra210 SoC, 4 GiB of LPDDR4 RAM, 16 GiB eMMC and other essentials. It is typically connected to some I/O board that provides the connectors needed to hook it up to the outside world. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add Tegra210 supportThierry Reding1-0/+805
Also known as Tegra X1, the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 cores in a switched configuration. It features a GPU using the Maxwell architecture with support for DX11, SM4, OpenGL 4.5, OpenGL ES 3.1 and providing 256 CUDA cores. It supports hardware accelerated en- and decoding of various video standards including H.265, H.264 and VP8 at 4K resolutions and up to 60 fps. Besides the multimedia features it also comes with a variety of I/O controllers such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to name only a few. Add a SoC-level device tree file that describes most of the hardware available on the SoC. This includes only hardware for which a device tree binding already exists or which is trivial to describe. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA Tegra132 Norrin supportThierry Reding2-0/+1132
Norrin is a Tegra132-based FFD used as reference platform within NVIDIA. Based on work by Allen Martin <amartin@nvidia.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Allen Martin <amartin@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add Tegra132 supportThierry Reding3-0/+993
NVIDIA Tegra132 (also known as Tegra K1 64-bit) is a variant of Tegra124 but with 2 Denver CPUs instead of the 4+1 Cortex-A15. This adds the DTSI file for the SoC, which is mostly similar to the one for Tegra124. Based on work by Allen Martin <amartin@nvidia.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Allen Martin <amartin@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: renesas: r8a7795 dtsi: Add all HSCIF nodesGeert Uytterhoeven1-0/+60
Add the device nodes for all HSCIF serial ports, incl. clocks, clock domain, and dma properties. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-21arm64: dts: rockchip: Enable the Thermal on R88 boardCaesar Wang1-0/+6
This patch enable the TS-ADC. When a thermal temperature is invoked use the CRU to reset the chip on R88 board. TSHUT is low active on this board. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-21arm64: dts: rockchip: Add main thermal info to rk3368.dtsiCaesar Wang1-0/+36
This patch add the thermal needed info on RK3368. Meanwhile, support the trips to throttle for thermal. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-21arm64: dts: rockchip: Add the thermal data found on RK3368Caesar Wang1-0/+112
This patchset add the thermal for RK3368 dts, Since the two CPU clusters, with four CPU core for each cluster, one cluster is optimized for high-performance(big cluster) and the othe is optimized for low power(little cluster). This patch adds the second order for thermal throttle, and the critical temperature for thermal over-tempeature protection on Software. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-20ARM64: dts: enable clock support for Broadcom NS2Jon Mason1-1/+79
Add device tree entries for clock support for Broadcom Northstar 2 SoC Signed-off-by: Jon Mason <jonmason@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-20arm64: renesas: salvator-x: enable I2CKuninori Morimoto1-0/+12
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-20arm64: renesas: r8a7795: add I2C supportKuninori Morimoto1-0/+87
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [geert: aAdd clock-output-names properties] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-20arm64: renesas: salvator-x: Setup ethernet0 alias for U-BootGeert Uytterhoeven1-0/+1
Add an ethernet0 alias for the wired network card so that U-Boot can find the device-node and add an appropriate "local-mac-address" property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-20arm64: dts: r8a7795: enable nfs root on Salvator-X boardSimon Horman1-1/+1
As has been the practice for boards for 32bit ARM Renesas SoCs Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-20arm64: dts: r8a7795: enable EthernetAVB on Salvator-XKazuya Mizuguchi1-0/+31
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-20arm64: dts: r8a7795: add EthernetAVB device nodeKazuya Mizuguchi1-0/+42
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-20arm64: dts: Add reset dts config for Hisilicon Hi6220 SoCChen Feng1-0/+1
Add reset controller for hi6220 hikey-board. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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