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2017-06-17arm64: dts: marvell: armada-3720-db: Add information about the V2 boardGregory CLEMENT1-4/+13
The initial device tree file was for the board V1.4. Now the V2.0 board is also available. The same dtb will work for both, but the CON number have changed, so update the comment in the dts to reflect this. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: armada-3720-db: Sort the dts node alphabeticallyGregory CLEMENT1-42/+41
Sort the reference nodes in alphabetical order to ease the merge of future nodes. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: disable the mdio nodes by defaultAntoine Tenart2-0/+2
Disable the mdio nodes by default in the cp110 slave and master dtsi as they're not wired on every board. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: explicitly enable the mdio nodes for 7k/8k DBAntoine Tenart2-0/+6
Explicitly enable the MDIO nodes in the Marvell Armada 7k DB and Marvell Armada 8k DB. This is needed as the MDIO nodes will be disabled in the CP 110 slave and master dtsi by a following up patch. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8kAntoine Tenart2-0/+2
The EIP197 cryptographic engine supports 64 bits address width but is limited to 40 bits on 7k/8k. Add a dma-mask property in the cryptographic engine nodes to reflect this. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: 8040-mcbin: Enable 1GB EthernetMarc Zyngier1-0/+17
Enable the 1GB Ethernet interface that lives on the slave CP110, with its corresponding phy (that oddly lives on the master CP110). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: cp110: add required clocks for mdio interfaceRussell King2-0/+2
Add the three required clocks for the MDIO interface to be functional on Armada 8k platforms. Without this, the CPU hangs, causing RCU stalls or the system to become unresponsive. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [Thomas: - remove mg_core_clock, since it's a parent of mg_clock - also add clock references to the slave CP mdio instance] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: use new binding for the system controller on ap806Gregory CLEMENT1-8/+11
The new binding for the system controller on ap806 moved the clock into a subnode. This preliminary step will allow to add gpio and pinctrl subnodes Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: remove clock-output-names on ap806Gregory CLEMENT1-4/+0
The clock-output-names of the ap806-system-controller node are not used anymore, so remove them. Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: add second 1G port on the Armada 8040 DBMarcin Wojtas1-0/+16
Armada 8040 DB is equipped with 4 (2x 10G SFI + 2x 1G RGMII) ethernet ports of which only one was hitherto enabled. Because currently mvpp2 driver is capable of supporting only 1G RGMII/SGMII, enable second port from CP slave HW block. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: mcbin: add sdhciRussell King1-0/+23
Add sdhci support for MACCHIATOBin boards. This uses the AP806 SDHCI for eMMC and CP110 master for the SD card slot. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17arm64: dts: marvell: add clocks for Armada AP806 XOR enginesThomas Petazzoni1-0/+4
The XORv2 engines in the AP side of the Armada 7K/8K SoCs are using the AP MS core clock as input, so this commit adds the appropriate clocks properties. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-16ARM64: dts: meson-gx: Add SPICC nodesNeil Armstrong3-0/+23
Add nodes for the SPICC controller on GX common dtsi, GXBB and GXL dtsi files. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16arm64: dts: hi6220: Add k3-dma and i2s/hdmi audio supportJohn Stultz2-3/+57
Add entry for k3-dma driver and i2s/hdmi audio devices. This enables HDMI audio output. Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Green <andy@warmcat.com> Cc: Dave Long <dave.long@linaro.org> Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Antonio Borneo <borneo.antonio@gmail.com> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: John Stultz <john.stultz@linaro.org> v2: * Split core i2s entry into dtsi and hdmi specific bits into hikey dts v4: * Rework simple-card to use many-dai-links method, as there may be other links in the future v5: * Rework audio description to use the audio-card-graph method as requested by Mark. Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-16arm64: dts: hi3660-hikey960: add nodes for WiFiGuodong Xu1-0/+33
Add nodes for WiFi. HiKey960 is using TI WL1837MOD module. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-16arm64: dts: hi3660: add sd/sdio device nodesLi Wei2-0/+66
Add sd/sdio device nodes for hi3660 soc Signed-off-by: Li Wei <liwei213@huawei.com> Signed-off-by: Chen Jun <chenjun14@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-16arm64: dts: hikey960: add device node for pmic and regulatorsWang Xiaoyin1-0/+46
add device node for hi6421 pmic core and hi6421v530 voltage regulator,include LDO(1,3,9,11,15,16) Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-16arm64: dts: hisi: add kirin pcie nodeXiaowei Song1-0/+36
Add PCIe node for hi3660 Cc: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Changes in v5: * fix interrupt-map, to conform to gic's #address-cells = <0> * remove redundant status = "ok" Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2-4/+2
The conflicts were two cases of overlapping changes in batman-adv and the qed driver. Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-15arm64: dts: hi3660: add sp804 timer nodeLeo Yan1-0/+11
The Hi3660 SoC comes with the sp804 timer in addition to the architecture timers. These ones are shutdown when reaching a deep idle states and a backup timer is needed. The sp804 belongs to another power domain and can fulfill the purpose of replacing temporarily an architecture timer when the CPU is idle. Describe it in the device tree, so it can be enabled at boot time. Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hi3660: add spi device nodesWang Xiaoyin2-0/+42
Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960. On HiKey960: - SPI2 is wired out through low speed expansion connector. - SPI3 is wired out through high speed expansion connector. Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hikey960: add LED nodesGuodong Xu1-0/+48
HiKey960 has four user LEDs, and two special purpose LEDs: WiFi and BT respectively. All of them are implemented as GPIO. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hi3660: add power key dts nodeChen Jun1-0/+15
We use gpio_034 as power key on hikey960, and set gpio with pull-up state, when key press the voltage on the gpio will come to lower, and power key event will be reported. Signed-off-by: Chen Jun <chenjun14@huawei.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hi3660: Add pl031 rtc nodeChen Feng1-0/+8
Add dts node to enable pl031 rtc. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hikey960: add WL1837 Bluetooth device nodeGuodong Xu1-0/+11
This adds the serial slave device for the WL1837 Bluetooth interface. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hi3660: Add uarts nodesChen Feng2-3/+91
Add nodes uart0 to uart4 and uart6 for hi3660 SoC. Enable uart3 and uart6, disable uart5, in hikey960 board dts. On HiKey960: - UART6 is used as default console, and is wired out through low speed expansion connector. - UART3 has RTS/CTS hardware handshake, and is wired out through low speed expansion connector. - UART5 is not used in commercial launched boards. So disable it. - UART4 is connected to Bluetooth, WL1837. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Reviewed-by: Zhangfei Gao <zhangfei.gao@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOCWang Xiaoyin1-0/+380
This patch adds pl061 device nodes for Hi3660 SoC. Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: Add I2C nodes for Hi3660Zhangfei Gao2-0/+78
Add I2C nodes for Hi3660-hikey960. On HiKey960, I2C0, I2C7 are connected to Low Speed Expansion Connector. I2C1 is connected to ADV7535. I2C3 is connected to USB5734. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hi3660: add resources for clock and resetZhangfei Gao1-7/+46
Add some resource nodes for clock and reset Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hikey960: pinctrl: add more pinmux and pinconfigWang Xiaoyin1-38/+690
This commit adds more pinmux and pinctrl information for devices on HiKey960, including i2c, spi, cam, uart, ufs, pcie, csi, pwr_key, isp, sd/sdio, i2s, and usb. Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Chen Jun <chenjun14@huawei.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15arm64: dts: hisilicon: update compatible string for hikey960Guodong Xu1-1/+1
Update compatible string for hikey960. HiKey960 is a develpment board built with SoC Hi3660. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-14arm64: dts: ls1088a: update sata nodeYuantian Tang1-2/+2
1. Remove ls1043a compatible string from node 2. Fix the sata ecc register address error Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14arm64: dts: r8a7796: Add reset control properties for audioGeert Uytterhoeven1-0/+10
Note that the audio module has resets for the Serial Sound Interfaces only. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-14arm64: dts: r8a7795: Add reset control properties for audioGeert Uytterhoeven1-0/+10
Note that the audio module has resets for the Serial Sound Interfaces only. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-13Merge tag 'bcm2835-dt-64-next-2017-06-08' into devicetree-arm64/nextFlorian Fainelli2-0/+21
This pull request brings in the switch to sdhost for MMC on RPi3 (improving storage performance and leaving sdhci for wireless), and the correct CPU thermal coefficients. The thermal changes required a merge from bcm2835-dt-next, where the nodes were added. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-13arm64: dts: nvidia: fix PCI bus dtc warningsRob Herring3-3/+7
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186Mikko Perttunen1-0/+7
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped registers that initiate CPU frequency/voltage transitions. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 supportJagan Teki2-0/+93
Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Zero Plus 2 has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG+power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-13arm64: allwinner: a64: Add initial Orangepi Win/WinPlus supportJagan Teki2-0/+96
Orangepi Win/WinPlus is an open-source single-board computer using the Allwinner A64 SOC. A64 Orangepi Win/WinPlus has - A64 Quad-core Cortex-A53 64bit - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM - Debug TTL UART - Four USB 2.0 - HDMI - LCD - Audio and MIC - Wifi + BT - IR receiver - 5V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-13arm64: dts: uniphier: add support for LD20 Global boardKunihiko Hayashi2-0/+53
Add initial device tree support for LD20 Global board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-13arm64: dts: uniphier: add support for LD11 Global boardKunihiko Hayashi2-0/+71
Add initial device tree support for LD11 Global board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-12arm64: dts: renesas: Add support for Salvator-XS with R-Car H3 ES2.0Geert Uytterhoeven2-0/+110
Add initial support for the Renesas Salvator-XS (Salvator-X 2nd version) development board equipped with an R-Car H3 ES2.0 SiP. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: renesas: Add common Salvator-XS board supportGeert Uytterhoeven1-0/+20
The Renesas Salvator-XS (Salvator-X 2nd version) development board can be equipped with either an R-Car H3 ES2.0 or M3-W ES1.x SiP, which are pin-compatible. Add initial support for the common parts of the Salvator-XS board into its own .dtsi file, to be included by the DTSes for the H3/M3-W versions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: renesas: Extract common Salvator-X/XS board supportGeert Uytterhoeven2-615/+630
The Renesas Salvator-X and Salvator-XS (Salvator-X 2nd version) boards are very similar. To avoid duplication, prepare for the advent of the latter by extracting the common board parts into its own .dtsi file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: salvator-x: Add missing index to PWM pinctrl subnode nameGeert Uytterhoeven1-1/+1
R-Car Gen3 SoCs contain multiple PWM modules. Hence to avoid conflicts, pinctrl subnodes for PWM should include indices referring to their instances. Fixes: b33be33670217533 ("arm64: dts: salvator-x: Add panel backlight support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: r8a7795: h3ulcb: Add support for R-Car H3 ES2.0Geert Uytterhoeven3-3/+45
Split off support for H3ULCB boards with the ES1.x revision of the R-Car H3 SoC into a separate file. The main r8a7795-h3ulcb.dts file now corresponds to H3ULCB with R-Car H3 ES2.0 or later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: r8a7796: add DMA for IIC_DVFSWolfram Sang1-0/+2
Tested with a Salvator-X. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: r8a7795: add DMA for IIC_DVFSWolfram Sang1-0/+2
Tested with a Salvator-X. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: ulcb: add 12288000 for sound ADGKuninori Morimoto1-1/+1
Current rcar_sound only has 11289600 (= for 44.1kHz) clock-frequency, but it needs 12288000 for 48kHz too. Otherwise, 48kHz based sound can't handle correctly. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12arm64: dts: salvator-x: add 12288000 for sound ADGKuninori Morimoto1-1/+1
Current rcar_sound only has 11289600 (= for 44.1kHz) clock-frequency, but it needs 12288000 for 48kHz too. Otherwise, 48kHz based sound can't handle correctly. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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