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2021-12-16arm64: dts: imx8mp-evk: configure multiple queues on eqosXiaoliang Yang1-0/+68
Eqos ethernet support five queues on hardware, enable these queues and configure the priority of each queue. Uses Strict Priority as scheduling algorithms to ensure that the TSN function works. The priority of each queue is a bitmask value that maps VLAN tag priority to the queue. Since the hardware only supports five queues, this patch maps priority 0-4 to queues one by one, and priority 5-7 to queue 4. The total fifo size of 5 queues is 8192 bytes, if enable 5 queues with store-and-forward mode, it's not enough for large packets, which would trigger fifo overflow frequently. This patch set DMA to thresh mode to enable all 5 queues. Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com> Reviewed-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a-qds: add overlays for various serdes protocolsAlex Marginean9-6/+595
Add overlays for various serdes protocols on LS1028A QDS board using different PHY cards. These should be applied at boot, based on serdes configuration. If no overlay is applied, only the RGMII interface on the QDS is available in Linux. Building device tree fragments requires passing the "-@" argument to dtc, which increases the base dtb size and might cause some platforms to fail to store the new binary. To avoid that, it would be nice to only pass "-@" for the platforms where fragments will be used, aka LS1028A-QDS. One approach suggested by Rob Herring is used here: https://lore.kernel.org/patchwork/patch/821645/ Also moved the enet* override nodes in dts file to be in alphabetic order. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Jason Liu <jason.hui.liu@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a-qds: enable lpuart1Vabhav Sharma1-0/+4
LPUART nodes by default are disabled in LS1028A device tree, Enabling LPUART1 node. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a-qds: move rtc node to the correct i2c busBiwen Li1-5/+9
The i2c rtc is on i2c2 bus not i2c1 bus, so fix it in dts. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.lil@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a-rdb: enable pwm0Biwen Li1-0/+4
Enable pwm0 on ls1028a-rdb board which uses flextimer1. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a: add flextimer based pwm nodesBiwen Li1-0/+95
Add pwm nodes using flextimer controller. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup sourceBiwen Li3-2/+19
Add flextimer2 based ftm_alarm1 node and enable it to be the default rtc wakeup source for rdb and qds boards instead of the original flextimer1 which is used by PWM. The ftm_alarm0 node hence is disabled by default. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a: Add PCIe EP nodesXiaowei Bao1-0/+24
Add PCIe EP nodes for ls1028a to support EP mode. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2162a-qds: add interrupt line for RTC nodeBiwen Li1-0/+2
Add interrupt line for RTC node on lx2162a-qds Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modesYangbo Lu1-0/+7
The default NXP SDHC adapter cards for LX2162AQDS are SD 2.0/3.0 adapter card for eSDHC1, and eMMC 5.1 adapter card for eSDHC2. Add speed modes properties supported by the two adapters in device tree node. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodesRan Wang1-0/+2
Enable USB3 HW LPM feature for lx2160a. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2160a-qds: Add mdio mux nodesPankaj Bansal1-0/+145
The two external MDIO buses used to communicate with phy devices that are external to SOC are muxed in LX2160AQDS board. These buses can be routed to any one of the eight IO slots on LX2160AQDS board depending on value in fpga register 0x54. Additionally the external MDIO1 is used to communicate to the onboard RGMII phy devices. The mdio1 is controlled by bits 4-7 of fpga register and mdio2 is controlled by bits 4-7 of fpga register. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2160a: add optee-tz nodePankaj Gupta4-0/+20
Disabled by default in SoC dtsi and enables in board dts files. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2160a-rdb: Add Inphi PHY nodeIoana Radulescu1-0/+17
DPMAC5 and DPMAC6 are connected to 25G Inphi PHY Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com> Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: lx2160a: fix scl-gpios property nameZhang Ying-224551-2/+2
Fix the typo in the property name. Fixes: d548c217c6a3c ("arm64: dts: add QorIQ LX2160A SoC support") Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: imx8mm: don't assign PLL2 in SoC dtsiLucas Stach1-4/+2
The base i.MX8MM dtsi changes the audio PLL2 rate, which gets in the way if it should be used for anything else than audio. As this PLL doesn't seem to be used by any upstream supported board, just remove the rate configuration to allow boards to set it up as they wish. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: allwinner: h6: Add Hantro G2 nodeJernej Skrabec1-0/+9
H6 SoC has a second VPU, dedicated to VP9 decoding. It's a slightly older design, though. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211129182633.480021-10-jernej.skrabec@gmail.com
2021-12-16arm64: dts: nitrogen8-som: correct i2c1 pad-ctrlLucas Stach1-2/+2
The slew rate and drive-strength of the i2c1 pads were much too high. Bring them down to avoid signal quality issues. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: nitrogen8-som: correct network PHY resetLucas Stach1-4/+7
Add the missing reset-gpios property to allow Linux to fully reset the network PHY and fix the pinmux to add the neccessary pull-ups for the PHY strap configuration. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-15arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodesDmitry Baryshkov1-0/+52
Add device tree nodes for two i2c blocks: i2c13 and i2c14. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-12-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add cpufreq supportVladimir Zapolskiy1-0/+23
The change adds a description of a SM8450 cpufreq-epss controller and references to it from CPU nodes. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-11-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: Add rpmhpd nodeDmitry Baryshkov1-0/+51
This adds RPMH power domain found in SM8450 SoC Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-10-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450-qrd: enable ufs nodesVinod Koul1-0/+20
Enable the UFS and phy node and add the regulators used by them. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-9-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add ufs nodesVinod Koul1-0/+72
Add the UFS and QMP PHY node for SM8450 SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-8-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodesVinod Koul1-0/+322
Add the RPMH regulators found in QRD-SM8450 platform Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-7-vkoul@kernel.org
2021-12-15arm64: dts: qcom: Add base SM8450 QRD DTSVinod Koul2-0/+34
Add DTS for Qualcomm QRD platform which uses SM8450 SoC and mark the reserved nodes. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-6-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add smmu nodesVinod Koul1-0/+103
Add the apps smmu node as found in the SM8450 SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-5-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: Add reserved memory nodesVinod Koul1-0/+221
Add the reserved memory nodes for SM8450. This is based on the downstream documentation. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-4-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: Add tlmm nodesVinod Koul1-0/+28
Add tlmm node found in SM8450 SoC and uart pin configuration Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-3-vkoul@kernel.org
2021-12-15arm64: dts: qcom: Add base SM8450 DTSIVinod Koul1-0/+476
This add based DTSI for SM8450 SoC and includes base description of CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to shell with console on boards with this SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-2-vkoul@kernel.org
2021-12-15arm64: dts: qcom: ipq6018: Fix gpio-ranges propertyBaruch Siach1-1/+1
There must be three parameters in gpio-ranges property. Fixes this not very helpful error message: OF: /soc/pinctrl@1000000: (null) = 3 found 3 Fixes: 1e8277854b49 ("arm64: dts: Add ipq6018 SoC and CP01 board support") Cc: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/8a744cfd96aff5754bfdcf7298d208ddca5b319a.1638862030.git.baruch@tkos.co.il
2021-12-15arm64: dts: qcom: sdm845: add QFPROM chipset specific compatibleDavid Heidelberg1-1/+1
Use correct compatible according to dt-binding. Fixes + few other lines of `make qcom/sdm845-oneplus-fajita.dtb`: arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: qfprom@784000: compatible: ['qcom,qfprom'] is too short From schema: Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213190228.106924-1-david@ixit.cz
2021-12-15arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zonesBjorn Andersson1-0/+140
Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org
2021-12-15arm64: dts: qcom: pm8998: Add ADC Thermal Monitor nodeBjorn Andersson1-0/+10
Add a node for the ADC Thermal Monitor found in the PM8998 PMIC. This is used to connect thermal zones with ADC channels. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-4-bjorn.andersson@linaro.org
2021-12-15arm64: qcom: dts: drop legacy property #stream-id-cellsDavid Heidelberg8-8/+0
Property #stream-id-cells is legacy leftover and isn't currently documented nor used. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208184707.100716-1-david@ixit.cz
2021-12-15Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"Konrad Dybcio1-1/+0
This reverts commit ed9500c1df59437856d43e657f185fb1eb5d817d. The clock-frequency property was meant to aid platforms with broken firmwares that don't set up the timer properly on their own. Don't include it where it is not the case. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211202004328.459899-1-konrad.dybcio@somainline.org
2021-12-15arm64: dts: qcom: c630: add headset jack and button detection supportSrinivas Kandagatla1-0/+3
Add MBHC support available in WCD934X codec. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209175342.20386-3-srinivas.kandagatla@linaro.org
2021-12-15arm64: dts: qcom: c630: Fix soundcard setupSrinivas Kandagatla1-0/+27
Currently Soundcard has 1 rx device for headset and SoundWire Speaker Playback. This setup has issues, ex if we try to play on headset the audio stream is also sent to SoundWire Speakers and we will hear sound in both headsets and speakers. Make a separate device for Speakers and Headset so that the streams are different and handled properly. Fixes: 45021d35fcb2 ("arm64: dts: qcom: c630: Enable audio support") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209175342.20386-2-srinivas.kandagatla@linaro.org
2021-12-15arm64: dts: mediatek: add pinctrl support for mt7986bSam Shih3-0/+42
Add mt7986b pinctrl node Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20211122123552.8218-3-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15arm64: dts: mediatek: add pinctrl support for mt7986aSam Shih2-0/+41
Add mt7986a pinctrl node, and update pinmux setting for mt7986a Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20211122123552.8218-2-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15arm64: dts: mt8183: kukui: Add Type C nodePrashant Malani1-0/+14
Add a node describing the USB Type C connector, in order to utilize the Chromium OS USB Type-C driver that enumerates Type-C ports and connected cables/peripherals and makes them visible to userspace. Cc: Alexandru M Stan <amstan@chromium.org> Cc: Benson Leung <bleung@chromium.org> Signed-off-by: Prashant Malani <pmalani@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Link: https://lore.kernel.org/r/20211209195112.366176-1-pmalani@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15arm64: dts: mediatek: add basic mt7986 supportSam Shih3-0/+186
Add basic chip support for Mediatek mt7986, include basic uart nodes, rng node and watchdog node. Add cpu node, timer node, gic node, psci and reserved-memory node for ARM Trusted Firmware. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20211122123222.8016-3-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15Merge tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux into arm/dtArnd Bergmann2-40/+47
Apple SoC DT updates for 5.17, round 2: - Various cleanups (removing useless props, sorting nodes, renaming things) - Add PMGR min-state binding & props (see PMGR pull for driver change) - Initial compatibles for t600x machines (M1 Pro/Max). This covers the bindings that just need compatible bumps & minor tweaks, no driver changes. - Add watchdog node (driver not merged yet, hopefully will be; binding went in the previous pull) - Add missing power-domains property to the mailbox binding * tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux: dt-bindings: mailbox: apple,mailbox: Add power-domains property arm64: dts: apple: t8103: Sort nodes by address arm64: dts: apple: t8103: Rename clk24 to clkref arm64: dts: apple: t8103: Add watchdog node dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatible dt-bindings: pci: apple,pcie: Add t6000 support dt-bindings: i2c: apple,i2c: Add apple,t6000-i2c compatible dt-bindings: arm: apple: Add t6000/t6001 MacBook Pro 14/16" compatibles arm64: dts: apple: t8103: Add apple,min-state to DCP PMGR nodes dt-bindings: power: apple,pmgr-pwrstate: Add apple,min-state prop arm64: dts: apple: t8103: Remove PCIe max-link-speed properties Link: https://lore.kernel.org/r/a24faafd-f2ae-c3a7-5327-b27da7d9e34b@marcan.st Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15arm64: dts: apple: t8103: Sort nodes by addressHector Martin1-28/+28
We decided to keep SoC nodes sorted by address for sanity; fix a couple that slipped into the wrong place. Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15arm64: dts: apple: t8103: Rename clk24 to clkrefHector Martin1-10/+10
We now know that this frequency comes from the external reference oscillator and is used for various SoC blocks, and isn't just a random 24MHz clock, so let's call it something more appropriate. Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15Merge branch 'for-v5.17/dt-usi' into next/dt64Krzysztof Kozlowski2-8/+32
2021-12-14arm64: dts: qcom: add minimal DTS for Microsoft Surface Duo 2Katherine Perez2-0/+370
This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 Chipset Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209183246.842880-2-kaperez@linux.microsoft.com
2021-12-14arm64: dts: qcom: sdm845-oneplus-*: add msm-id and board-idCaleb Connolly2-0/+4
The msm-id and board-id can be used to select the correct dtb when multiple are provided to the bootloader. Multiple DTBs can be provided on sdm845 devices using boot image header v1 by appending them all to the kernel image before creating the boot image. The bootloader then selects them like this: Best match DTB tags 321/00000008/0x00000000/20001/20014/20115/20018/0/(offset)0x79998E27/(size)0x000173CD Using pmic info 0x20014/0x20115/0x20018/0x0 for device 0x20014/0x20115/0x20018/0x0 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209225938.2427342-1-caleb.connolly@linaro.org
2021-12-14arm64: dts: renesas: r9a07g044: Create thermal zone to support IPABiju Das1-0/+16
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on the work done by Dien Pham <dien.pham.ry@renesas.com> and others for r8a77990 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211208142729.2456-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-14arm64: dts: renesas: r9a07g044: Add TSU nodeBiju Das1-0/+26
Add TSU node to RZ/G2L SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211208142729.2456-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>