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2021-09-27arm64: dts: qcom: sm6350: Add SDHCI1/2 nodesKonrad Dybcio1-0/+81
Add SDHCI1/2 nodes for eMMC and uSD card respectively. Do note that most SM6350 devices seem to come with UFS. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Replaced SM6350_CX with its constant value] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-14-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add RPMHPD and BCM voterKonrad Dybcio1-0/+54
Add RPMHPD node, its OPP table and BCM voter to prepare for performance level voting. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-13-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add PRNG nodeKonrad Dybcio1-0/+7
Add a node for the PRNG to enable hw-accelerated pseudo-random number generation. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-12-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add SPMI busKonrad Dybcio1-0/+18
Add a node for SPMI to allow for communication with on-board PMICs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-11-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add AOSS_QMPKonrad Dybcio1-0/+11
Add a node for AOSS_QMP in preparation for remote processor enablement. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-10-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add TSENS nodesKonrad Dybcio1-0/+22
Add nodes required for TSENS block using the common qcom,tsens-v2 binding. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-9-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add cpufreq-hw supportKonrad Dybcio1-0/+18
Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable CPU clock scaling. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-8-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add USB1 nodesKonrad Dybcio1-0/+101
Add nodes required for USB1 to function. SM6350 (thankfully) resuses SDM845 and SC7180 IP, so no additional code porting is required. Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Renamed dwc3 node "usb"] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-7-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add TLMM block nodeKonrad Dybcio1-0/+19
Add TLMM pinctrl node to enable referencing the SoC pins in other nodes. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-6-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add GCC nodeKonrad Dybcio1-0/+16
Add and configure GCC node to allow for referencing GCC-controlled clocks in other nodes. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-5-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add RPMHCC nodeKonrad Dybcio1-0/+7
Add RPMHCC node to allow for referencing RPMH-controlled clocks in other nodes. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-4-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: sm6350: Add LLCC nodeKonrad Dybcio1-0/+6
Add a node for LLCC with SM6350-specific compatible. Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-3-konrad.dybcio@somainline.org
2021-09-27arm64: dts: qcom: Add SM6350 device treeKonrad Dybcio1-0/+485
Add a base DT for SM6350 SoC Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-2-konrad.dybcio@somainline.org
2021-09-27arm64: dts: rockchip: add pwm nodes for rk3568Liang Chen1-0/+176
Add the pwm controller nodes to the core rk3568 dtsi. Signed-off-by: Liang Chen <cl@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210726090355.1548483-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-27arm64: dts: qcom: sm8350: Use QMP property to control load stateSibi Sankar1-14/+16
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8350 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-11-git-send-email-sibis@codeaurora.org
2021-09-27arm64: dts: qcom: sm8250: Use QMP property to control load stateSibi Sankar1-11/+11
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8250 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-10-git-send-email-sibis@codeaurora.org
2021-09-27arm64: dts: qcom: sm8150: Use QMP property to control load stateSibi Sankar1-14/+14
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8150 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-9-git-send-email-sibis@codeaurora.org
2021-09-27arm64: dts: qcom: sdm845: Use QMP property to control load stateSibi Sankar1-4/+8
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SDM845 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-8-git-send-email-sibis@codeaurora.org
2021-09-27arm64: dts: qcom: sc7280: Use QMP property to control load stateSibi Sankar1-2/+0
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7280 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-7-git-send-email-sibis@codeaurora.org
2021-09-27arm64: dts: qcom: sc7180: Use QMP property to control load stateSibi Sankar1-5/+4
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7180 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-6-git-send-email-sibis@codeaurora.org
2021-09-26arm: dts: vexpress: Fix motherboard bus 'interrupt-map'Rob Herring1-45/+0
Commit 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress boards. The problem is #address-cells size changed, but interrupt-map was not updated. This results in the timer interrupt (and all the other motherboard interrupts) not getting mapped. As the 'interrupt-map' properties are all just duplicates across boards, just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi. Strictly speaking, 'interrupt-map' is dependent on the parent interrupt controller, but it's not likely we'll ever have a different parent than GICv2 on these old platforms. If there was one, 'interrupt-map' can still be overridden. Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org Fixes: 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") Cc: Guillaume Tucker <guillaume.tucker@collabora.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-arm-kernel@lists.infradead.org Reported-by: Reported-by: "kernelci.org bot" <bot@kernelci.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-09-24arm64: dts: qcom: sc7180: Base homestar's power coefficients in realityDouglas Anderson1-1/+1
The commit 82ea7d411d43 ("arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality") and the commit be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar") passed each other in the tubes that make up the Internet. Despite the fact the patches didn't cause a merge conflict, they need to account for each other. Do that. Fixes: 82ea7d411d43 ("arm64: dts: qcom: sc7180: Base dynamic CPU power coefficients in reality") Fixes: be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923081352.1.I2a2ee0ac428a63927324d65022929565aa7d8361@changeid
2021-09-24arm64: dts: qcom: msm8998-xperia: Add audio clock and its pinAngeloGioacchino Del Regno1-0/+19
All smartphones of this platform are equipped with a WCD9335 audio codec, getting its MCLK from PM8998 gpio13: add this clock to DT. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-7-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: msm8998-xperia: Add camera regulatorsAngeloGioacchino Del Regno1-0/+56
All of the machines of the Sony Yoshino platform are equipped with two cameras, sharing the same regulators configuration. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-6-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: msm8998-xperia: Configure display boost regulatorsAngeloGioacchino Del Regno4-0/+58
Add configuration for the LAB and IBB regulators (in boost mode): this platform has smartphones with three different display sizes, hence different displays requiring different voltage. The common configuration parameters have been put in the common device-tree, while specific voltage specs and soft-start-us are variant specific, so they have been put into the machine specific dts file. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-5-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: msm8998-xperia: Add support for gpio vibratorAngeloGioacchino Del Regno1-0/+19
All smartphones in the Sony Yoshino platforms have got a simple vibrator hooked to a GPIO: add support for that and add its own pin configuration. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-4-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: msm8998-xperia: Add support for wcn3990 BluetoothAngeloGioacchino Del Regno1-0/+16
This platform uses the WCN3990 Bluetooth chip, reachable on UART-3. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-3-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: msm8998-xperia: Add RMI4 touchscreen supportAngeloGioacchino Del Regno1-0/+60
All of the devices in the Sony Yoshino platform are using a Synaptics RMI4-compatible touch IC with identical pins and supplies: enable the I2C-5 bus and add the rmi4-i2c node along with the required pin configurations. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-2-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: msm8998: Introduce support for Sony Yoshino platformAngeloGioacchino Del Regno5-0/+564
This commit introduces support for the Sony Yoshino platform, using the MSM8998 SoC, including: - Sony Xperia XZ1 (codename Poplar), - Sony Xperia XZ1 Compact (codename Lilac), - Sony Xperia XZ Premium (codename Maple). All of the three aforementioned smartphones are sharing a 99% equal board configuration, with very small differences between each other, which is the reason for the introduction of a common msm8998-sony-xperia-yoshino DT. This base configuration includes regulators and project-wide pin configurations and it's made to boot to a serial console. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123733.367248-1-angelogioacchino.delregno@somainline.org
2021-09-24arm64: dts: qcom: pm660: Add reboot mode supportShawn Guo1-2/+3
It turns out that the pm660 PON is a GEN2 device. Update the compatible to "qcom,pm8998-pon" and add reboot mode support, so that devices can be rebooted into bootloader and recovery mode. Tested on Xiaomi Redmi Note 7 phone. While at it, drop the unnecessary newline between 'compatible' and 'reg' property. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210824021918.17271-1-shawn.guo@linaro.org
2021-09-24arm64: dts: qcom: sc7280: Add aliases for I2C and SPIRajesh Patil1-0/+32
Add aliases for i2c and spi for sc7280 soc. Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-9-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sc7280: Add QUPv3 wrapper_1 nodesRoja Rani Yarubandi2-0/+753
Add QUPv3 wrapper_1 DT nodes for SC7280 SoC. Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-8-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sc7280: Configure uart7 to support bluetooth on sc7280-idpRajesh Patil1-0/+85
Add bluetooth uart pin configuration for sc7280-idp. Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-7-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT nodeRoja Rani Yarubandi2-16/+33
Uart5 is treated as dedicated debug uart.Change the compatible as "qcom,geni-uart" in SoC DT to make it generic and later update it as "qcom,geni-debug-uart" in sc7280-idp Add interconnects and power-domains. Split the pinctrl functions and correct the gpio pins. Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-6-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sc7280: Add QUPv3 wrapper_0 nodesRoja Rani Yarubandi1-2/+722
Add QUPv3 wrapper_0 DT nodes for SC7280 SoC. Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-5-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sc7280: Configure SPI-NOR FLASH for sc7280-idpRajesh Patil1-0/+27
Add spi-nor flash node and pinctrl configurations for the SC7280 IDP. Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-4-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sc7280: Add QSPI nodeRoja Rani Yarubandi1-0/+61
Add QSPI DT node and qspi_opp_table for SC7280 SoC. Move qspi_opp_table to / because SPI nodes assume any child node is a spi device and so we can't put the table underneath the spi controller. Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632399378-12229-3-git-send-email-rajpat@codeaurora.org
2021-09-24arm64: dts: qcom: sdm630: Add missing a2noc qos clocksShawn Guo1-2/+13
It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Fixes: 045547a02252 ("arm64: dts: qcom: sdm630: Add interconnect provider nodes") Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210824043435.23190-4-shawn.guo@linaro.org
2021-09-24arm64: tegra: Update HDA card name on Jetson TX2 NXSameer Pujar1-1/+1
Inspired by commit b8928c2b5dba ("arm64: tegra: Consolidate audio card names"). Based on this update HDA card name on Jetson TX2 NX platform. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-09-24arm64: tegra: Audio graph sound card for Jetson TX2 NXSameer Pujar1-0/+504
Enable support for audio-graph based sound card on Jetson TX2 NX. Following I/O interfaces are enabled. * I2S1 and I2S3 * DMIC1 and DMIC2 Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-09-24arm64: dts: qcom: qrb5165-rb5: enabled pwrkey and resin nodesDmitry Baryshkov1-0/+10
Enable powerkey and resin nodes to let the board handle POWER and Volume- keys properly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210916151341.1797512-3-dmitry.baryshkov@linaro.org
2021-09-24arm64: dts: qcom: pm8150: specify reboot mode magicsDmitry Baryshkov1-0/+2
Specify recovery and bootloader magic values to be programmed by the qcom-pon driver. This allows the bootloader to handle reboot-to-bootloader functionality. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210916151341.1797512-2-dmitry.baryshkov@linaro.org
2021-09-24arm64: dts: qcom: pm8150: use qcom,pm8998-pon bindingDmitry Baryshkov1-1/+1
Change pm8150 to use the qcom,pm8998-pon compatible string for the pon in order to pass reboot mode properly. Fixes: 5101f22a5c37 ("arm64: dts: qcom: pm8150: Add base dts file") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210916151341.1797512-1-dmitry.baryshkov@linaro.org
2021-09-24arm64: tegra: Add additional GPIO interrupt entries on Tegra194pshete1-2/+47
Tegra194 supports 8 entries per GPIO controller. This change adds the missing interrupt entires for all GPIO controllers. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-09-24arm64: dts: renesas: rzg2l-smarc: Enable CANFDLad Prabhakar1-0/+40
Enable CANFD on RZ/G2L SMARC platform. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210924102338.11595-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-24arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platformLad Prabhakar1-0/+17
Enable the ADC which is present on RZ/G2L SMARC SOM. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210922212049.19851-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-24arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSILad Prabhakar3-10/+19
Move extal and memory nodes to SOM DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210922212049.19851-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-24arm64: dts: renesas: r8a779a0: falcon-cpu: Add SW47-SW49 supportKieran Bingham1-0/+37
Add support for SW47, SW48 and SW49 via "gpio-keys" on the R-Car V3U Falcon board. Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Link: https://lore.kernel.org/r/20210922201314.3205674-1-kieran.bingham@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-24arm64: dts: renesas: rzg2l-smarc: Add Mic routingBiju Das1-0/+6
Add audio routing for Mic with bias to reduce noise when doing audio capture. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210921084605.16250-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-24arm64: dts: renesas: rzg2l-smarc: Enable audioBiju Das1-0/+66
Enable audio on RZ/G2L SMARC EVK by linking SSI0 with WM8978 audio CODEC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210921084605.16250-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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