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2021-09-17arm64: dts: meson-axg: add support for JetHub D1Vyacheslav Bocharov2-0/+363
JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features: - DIN Rail Mounting - Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz - no video out - 512Mb/1GB LPDDR4 - 8/16GB eMMC flash - 1 x USB 2.0 - 1 x 10/100Mbps ethernet - WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2. - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. - 2 x gpio LEDS - GPIO user Button - 1 x 1-Wire - 2 x RS-485 - 4 x dry contact digital GPIO inputs - 3 x relay GPIO outputs - DC source with a voltage of 9 to 56 V / Passive POE Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: added missing newline in DT and removed changelog from commit msg] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210915085715.1134940-5-adeep@lexina.in
2021-09-17arm64: dts: meson-gxl: add support for JetHub H1Vyacheslav Bocharov2-0/+242
JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features: - square plastic case - Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz - no video out - 1GB LPDDR4 - 8/16GB eMMC flash - 2 x USB 2.0 - 1 x 10/100Mbps ethernet - WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0. - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. - MicroSD 2.x/3.x/4.x DS/HS cards. - 1 x gpio LED - ADC user Button - DC source 5V microUSB Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210915085715.1134940-4-adeep@lexina.in
2021-09-16arm64: dts: allwinner: pinetab: Add HDMI supportDang Huynh1-0/+26
This patch enables HDMI display on PINE64 PineTab. The PineTab has a HDMI Type C (mini) port. Signed-off-by: Dang Huynh <danct12@disroot.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210914193732.3047668-1-danct12@disroot.org
2021-09-15arm64: dts: qcom: sdm845: Remove cpufreq cooling devices for CPU thermal zonesThara Gopinath1-136/+0
Now that Limits h/w is enabled to monitor thermal events around cpus and throttle the cpu frequencies, remove cpufreq cooling device for the CPU thermal zones which does software throttling of cpu frequencies. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210809191605.3742979-6-thara.gopinath@linaro.org
2021-09-15arm64: dts: qcom: sdm845: Add support for LMh nodeThara Gopinath1-0/+26
Add LMh nodes for CPU cluster0 and CPU cluster1. Also add interrupt support in cpufreq node to capture the LMh interrupt and let the scheduler know of the max frequency throttling. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210809191605.3742979-5-thara.gopinath@linaro.org
2021-09-15arm64: dts: qcom: sc7280-idp: Add vcc-supply for qfpromRajendra Nayak1-0/+4
Add vcc-supply for the IDP boards that was missed when the qfprom device tree properties were added for the sc7280 SoC. Fixes: c1b2189a19cf ("arm64: dts: qcom: sc7280: Add qfprom node") Reported-by: satya priya <skakit@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631530735-19811-1-git-send-email-rnayak@codeaurora.org
2021-09-15arm64: dts: qcom: msm8998: Provide missing "xo" and "sleep_clk" to GCCMarijn Suijten1-1/+4
In a future patch the GCC driver will stop requesting this xo clock by its global "xo" name, in favour of having an explicit phandle here in the DT. Aside from that this clock in addition to the mandatory "sleep_clk" were never passed despite being required by the relevant dt-bindings. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210911120101.248476-1-marijn.suijten@somainline.org
2021-09-15arm64: dts: rockchip: add saradc to rk3568-evb1-v10Michael Riesch1-0/+5
Add the SARADC to the device tree of the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210823110716.10038-1-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Fix GPU register width for RK3328Alex Bee1-1/+1
As can be seen in RK3328's TRM the register range for the GPU is 0xff300000 to 0xff330000. It would (and does in vendor kernel) overlap with the registers of the HEVC encoder (node/driver do not exist yet in upstream kernel). See already existing h265e_mmu node. Fixes: 752fbc0c8da7 ("arm64: dts: rockchip: add rk3328 mali gpu node") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210623115926.164861-1-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Re-add interrupt-names for RK3399's vpuAlex Bee1-0/+1
Commit 53a05c8f6e8e ("arm64: dts: rockchip: remove interrupt-names from iommu nodes") intended to remove the interrupt-names property for mmu nodes, but it also removed it for the vpu node in rk3399.dtsi. That makes the driver fail probing currently. Fix this by re-adding the property for this node. Fixes: 53a05c8f6e8e ("arm64: dts: rockchip: remove interrupt-names from iommu nodes") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210822115755.3171937-1-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add missing rockchip,grf property to rk356xMichael Riesch1-0/+1
This commit fixes the error messages rockchip_clk_register_muxgrf: regmap not available rockchip_clk_register_branches: failed to register clock clk_ddr1x: -524 during boot by providing the missing rockchip,grf property. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Tested-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210823123911.12095-2-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add RK3399 Gru gpio-line-namesBrian Norris2-0/+356
It's convenient to get nice names for GPIOs. In particular, Chrome OS tooling looks for "AP_FLASH_WP" and "AP_FLASH_WP_L". The rest are provided for convenience. Gru-Bob and Gru-Kevin share the gru-chromebook.dtsi, and for the most part they share pin meanings. I omitted a few areas where components were available only on one or the other. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210820133829.1.Ica46f428de8c3beb600760dbcd63cf879ec24baf@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Enable SFC for Odroid Go AdvanceChris Morgan1-0/+16
This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx bus width is set to 2 for this reason, and tx bus width is set to 1 for compatibility reasons. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134639.31586-2-jon.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Add SFC to RK3308Chris Morgan1-0/+37
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134639.31586-1-jon.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Add SFC to PX30Chris Morgan1-0/+38
Add a devicetree entry for the Rockchip SFC for the PX30 SOC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134546.31340-4-jon.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add thermal support to Quartz64 Model APeter Geis1-0/+33
Add the thermal nodes for the Quartz64 Model A. The Model A supports a single speed gpio fan. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-9-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add rk3568 tsadc nodesPeter Geis2-0/+79
Add the thermal and tsadc nodes to the rk3568 device tree. There are two sensors, one for the cpu, one for the gpu. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-6-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add rk356x gpio debounce clocksPeter Geis1-5/+5
The rk356x added a debounce clock to the gpio devices. This clock is necessary for the new v2 gpio driver to bind. Add the clocks to the rk356x device tree. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-4-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add pinctrl and alias to emmc node to rk3568-evb1-v10Michael Riesch1-0/+3
Since the EMMC pins can be used for other functions as well, we need to configure the pinctrl. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-8-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add node for sd card to rk3568-evb1-v10Michael Riesch1-0/+14
Add the SD card reader to the device tree of the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-7-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add regulators of rk809 pmic to rk3568-evb1-v10Michael Riesch1-0/+221
Add the regulators of the RK809 PMIC to the device tree of the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-6-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: enable io domains on rk3568-evb1-v10Michael Riesch1-0/+13
Enable the PMU IO domains in the device tree for the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-5-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add core io domains node for rk356xMichael Riesch1-0/+5
Enable the PMU IO domains for the RK3566 and the RK3568. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-4-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add thermal fan control to rockpro64Peter Geis1-0/+29
The rockpro64 had a fan node since commit 5882d65c1691 ("arm64: dts: rockchip: Add PWM fan for RockPro64") however it was never tied into the thermal driver for automatic control. Add the links to the thermal node to permit the kernel to handle this automatically. Borrowed from the (rk3399-khadas-edge.dtsi). Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210730151727.729822-1-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Setup USB typec port as datarole on for Pinebook ProDan Johansen1-1/+1
Some chargers try to put the charged device into device data role. Before this commit this condition caused the tcpm state machine to issue a hard reset due to a capability missmatch. Signed-off-by: Dan Johansen <strit@manjaro.org> Link: https://lore.kernel.org/r/20210805220426.2693062-1-strit@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Add gru-scarlet-dumo boardChen-Yu Tsai2-0/+42
Dumo is another variant of Scarlet, also known as the ASUS Chromebook Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a board-specific calibration variant for the WiFi module. Add a new device tree for it. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210812094753.2359087-3-wenst@chromium.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: rk3568-evb1-v10: add ethernet supportMichael Riesch1-0/+57
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210729093913.8917-3-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add gmac0 node to rk3568Michael Riesch1-0/+49
While both RK3566 and RK3568 feature the gmac1 node, the gmac0 node is exclusive to the RK3568. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210729093913.8917-2-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: enable gmac node on quartz64-aPeter Geis1-0/+38
Enable the gmac controller on the Pine64 Quartz64 Model A. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-8-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: adjust rk3568 pll clocksPeter Geis1-0/+2
The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz. These are set incorrectly by the bootloader, so fix them here. gpll boots at 1188mhz, but to get most accurate dividers for all gpll_dividers it needs to run at 1200mhz, otherwise everyone downstream isn't quite right. ppll feeds the combophys, which has a divide by 2 clock, so 200mhz is required to reach a 100mhz clock input for them. The vendor-kernel also makes this fix. Signed-off-by: Peter Geis <pgwipeout@gmail.com> [pulled deeper explanation from discussion into commit message] Link: https://lore.kernel.org/r/20210728180034.717953-7-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add rk356x gmac1 nodePeter Geis1-0/+47
Add the gmac1 controller to the rk356x device tree. This is the controller common to both the rk3568 and rk3566. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-5-pgwipeout@gmail.com [adjusted sorting a bit] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: fix rk3568 mbi-aliasPeter Geis1-1/+1
The mbi-alias incorrectly points to 0xfd100000 when it should point to 0xfd410000. This fixes MSIs on rk3568. Fixes: a3adc0b9071d ("arm64: dts: rockchip: add core dtsi for RK3568 SoC") Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-2-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Add VPU support for the PX30Paul Kocialkowski1-0/+22
The PX30 has a VPU (both decoder and encoder) with a dedicated IOMMU. Describe these two entities in device-tree. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20210728230040.17368-1-ezequiel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add watchdog to rk3568Liang Chen1-0/+8
Add the watchdog node to rk3568. Signed-off-by: Liang Chen <cl@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210622102907.99242-2-heiko@sntech.de
2021-09-15arm64: dts: rockchip: add isp1 node on rk3399Heiko Stuebner1-0/+26
ISP1 is supplied by the tx1rx1 dphy, that is controlled from inside the dsi1 controller, so include the necessary phy-link for it. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net> Acked-by: Helen Koike <helen.koike@collabora.com> Link: https://lore.kernel.org/r/20210210111020.2476369-7-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add cif clk-control pinctrl for rk3399Heiko Stuebner1-0/+12
This enables variant a of the clkout signal for camera applications and also the cifclkin pinctrl setting. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net> Acked-by: Helen Koike <helen.koike@collabora.com> Link: https://lore.kernel.org/r/20210210111020.2476369-6-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add #phy-cells to mipi-dsi1 on rk3399Heiko Stuebner1-0/+1
The dsi controller includes access to the dphy which might be used not only for dsi output but also for csi input on dsi1, so add the necessary #phy-cells to allow it to be used as phy. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net> Acked-by: Helen Koike <helen.koike@collabora.com> Link: https://lore.kernel.org/r/20210210111020.2476369-5-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add basic dts for Pine64 Quartz64-APeter Geis2-0/+427
Add a basic dts for the Pine64 Quartz64 Model A Single Board Computer. This board outputs on uart2 for debug. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210710151034.32857-5-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add rk3566 dtsiPeter Geis1-0/+20
Add the rk3566 dtsi which includes the soc specific changes for this chip. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210710151034.32857-4-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: split rk3568 device treePeter Geis2-36/+48
In preparation for the rk3566 inclusion, split apart the rk3568 specific nodes into a separate device tree. This allows us to create the rk3566 device tree without deleting nodes. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210710151034.32857-3-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: move rk3568 dtsi to rk356x dtsiPeter Geis1-0/+0
In preparation for separating the rk3568 and rk3566 device trees, move the base rk3568 dtsi to rk356x dtsi. This will allow us to strip out the rk3568 specific nodes. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210710151034.32857-2-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add csi-dphy to px30Heiko Stuebner1-0/+13
Add the CSI dphy node to the core px30 devicetree for later use with the rkisp. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210722073955.1192168-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add SPDIF node for ROCK Pi 4Alex Bee1-0/+26
Add a SPDIF audio-graph-card to ROCK Pi 4 device tree. It's not enabled by default since all dma channels are used by the (already) enabled i2s0/1/2 and the pin is muxed with GPIO4_C5 which might be in use already. If enabled SPDIF_TX will be available at pin #15. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210618181256.27992-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add ES8316 codec for ROCK Pi 4Alex Bee1-0/+28
ROCK Pi 4 boards have the codec connected to i2s0 and it is accessible via i2c1 address 0x11. Add an audio-graph-card for it. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210618181256.27992-5-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Add RK3399 ROCK Pi 4B+ boardAlex Bee2-0/+48
ROCK Pi 4B+ board is the successor of ROCK Pi 4B board. Differences to the original version are - has RK3399 OP1 SoC revision - has eMMC (16 or 32 GB) soldered on board (no changes required, since it is enabled in rk3399-rock-pi-4.dtsi) - dev boards have SPI flash soldered, but as per manufacturer response, this won't be the case for mass production boards Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210618181256.27992-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Add RK3399 ROCK Pi 4A+ boardAlex Bee2-0/+15
ROCK Pi 4A+ board is the successor of ROCK Pi 4A board. Differences to the original version are - has RK3399 OP1 SoC revision - has eMMC (16 or 32 GB) soldered on board (no changes required, since it is enabled in rk3399-rock-pi-4.dtsi) - dev boards have SPI flash soldered, but as per manufacturer response, this won't be the case for mass production boards Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210618181256.27992-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: Disable CDN DP on Pinebook ProMatthias Brugger1-4/+0
The CDN DP needs a PHY and a extcon to work correctly. But no extcon is provided by the device-tree, which leads to an error: cdn-dp fec00000.dp: [drm:cdn_dp_probe [rockchipdrm]] *ERROR* missing extcon or phy cdn-dp: probe of fec00000.dp failed with error -22 Disable the CDN DP to make graphic work on the Pinebook Pro. Reported-by: Guillaume Gardet <guillaume.gardet@arm.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com> Link: https://lore.kernel.org/r/20210715164101.11486-1-matthias.bgg@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add saradc node for rk3568Simon Xue1-0/+12
Add the core dt-node for the rk3568's saradc. Signed-off-by: Simon Xue <xxm@rock-chips.com> Link: https://lore.kernel.org/r/20210705012610.3831-1-xxm@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: enable tsadc on helios64Dennis Gilmore1-0/+8
Enable the tsadc thermal controller on the helios64 Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Link: https://lore.kernel.org/r/20210715025635.70452-4-dgilmore@redhat.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-15arm64: dts: rockchip: add SPI support to helios64Dennis Gilmore1-0/+24
add SPI support for the helios64, u-boot can live in spi1, spi2 is user accessible, spi5 is for the sata controller rom. https://wiki.kobol.io/helios64/spi/ Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Link: https://lore.kernel.org/r/20210715025635.70452-3-dgilmore@redhat.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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