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2015-10-07arm64: introduce VA_START macro - the first kernel virtual address.Andrey Ryabinin1-1/+1
2015-10-01arm64: Fix THP protection change logicSteve Capper1-2/+2
2015-09-14arm64: pgtable: use a single bit for PTE_WRITE regardless of DBMWill Deacon1-5/+1
2015-09-14arm64: Fix pte_modify() to preserve the hardware dirty informationCatalin Marinas1-1/+1
2015-09-14arm64: Fix the pte_hw_dirty() check when AF/DBM is enabledCatalin Marinas1-2/+2
2015-08-08arm64/mm: Add PROT_DEVICE_nGnRnE and PROT_NORMAL_WTJonathan (Zhixiong) Zhang1-0/+2
2015-07-28arm64: pgtable: fix definition of pte_validWill Deacon1-1/+1
2015-07-27arm64: force CONFIG_SMP=y and remove redundant #ifdefsWill Deacon1-5/+0
2015-07-27arm64: Add support for hardware updates of the access and dirty pte bitsCatalin Marinas1-2/+145
2015-07-27arm64: move update_mmu_cache() into asm/pgtable.hWill Deacon1-0/+15
2015-04-14arm64: expose number of page table levels on Kconfig levelKirill A. Shutemov1-4/+4
2015-02-26arm64: enable PTE type bit in the mask for pte_modifyFeng Kan1-1/+1
2015-02-11mm: make FIRST_USER_ADDRESS unsigned long on all archsKirill A. Shutemov1-1/+1
2015-02-10arm64: drop PTE_FILE and pte_file()-related helpersKirill A. Shutemov1-18/+4
2015-01-28arm64:mm: free the useless initial page tablezhichang.yuan1-0/+3
2015-01-12arm64/mm: add create_pgd_mapping() to create private page tablesArd Biesheuvel1-0/+5
2014-12-23arm64: mm: Add pgd_page to support RCU fast_gupJungseok Lee1-2/+3
2014-12-10mm: fix huge zero page accounting in smaps reportKirill A. Shutemov1-0/+1
2014-10-10arm64: kvm: define PAGE_S2_DEVICE as read-only by defaultArd Biesheuvel1-1/+1
2014-10-09arm64: mm: enable RCU fast_gupSteve Capper1-1/+20
2014-09-30arm64: Add architectural support for PCILiviu Dudau1-0/+2
2014-09-08arm64: Introduce {set,clear}_pte_bitLaura Abbott1-14/+19
2014-07-24arm64: Fix barriers used for page table modificationsCatalin Marinas1-0/+13
2014-07-23arm64: asm/pgtable.h pmd/pud definitions clean-upCatalin Marinas1-29/+28
2014-07-23arm64: Determine the vmalloc/vmemmap space at build time based on VA_BITSCatalin Marinas1-5/+8
2014-07-23arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELSCatalin Marinas1-9/+9
2014-07-23arm64: mm: Implement 4 levels of translation tablesJungseok Lee1-0/+40
2014-07-23arm64: Introduce VA_BITS and translation level optionsJungseok Lee1-4/+4
2014-07-17arm64: Remove duplicate (SWAPPER|IDMAP)_DIR_SIZE definitionsCatalin Marinas1-3/+0
2014-07-04arm64: mm: Fix horrendous config typoSteve Capper1-1/+1
2014-06-18arm64: mm: remove broken &= operator from pmd_mknotpresentWill Deacon1-1/+1
2014-05-29arm64: mm: fix pmd_write CoW brokennessWill Deacon1-1/+1
2014-05-16Revert "arm64: Introduce execute-only page access permissions"Catalin Marinas1-6/+5
2014-05-09arm64: barriers: make use of barrier options with explicit barriersWill Deacon1-2/+2
2014-05-09arm64: mm: Create gigabyte kernel logical mappings where possibleSteve Capper1-0/+7
2014-05-09arm64: Clean up the default pgprot settingCatalin Marinas1-51/+47
2014-05-09arm64: Introduce execute-only page access permissionsCatalin Marinas1-5/+6
2014-05-05arm64: mm: Remove superfluous "the" in commentGeert Uytterhoeven1-1/+1
2014-03-24arm64: Remove pgprot_dmacoherent()Catalin Marinas1-2/+0
2014-03-14arm64: mm: Route pmd thp functions through pte equivalentsSteve Capper1-28/+24
2014-03-13arm64: Do not synchronise I and D caches for special ptesCatalin Marinas1-1/+1
2014-03-13arm64: Make DMA coherent and strongly ordered mappings not executableCatalin Marinas1-3/+3
2014-02-28arm64: mm: Add double logical invert to pte accessorsSteve Capper1-5/+5
2014-01-31arm64: mm: Introduce PTE_WRITESteve Capper1-23/+25
2014-01-31arm64: mm: Remove PTE_BIT_FUNC macroSteve Capper1-10/+41
2013-11-29arm64: Move PTE_PROT_NONE higher upCatalin Marinas1-14/+17
2013-11-29arm64: Use Normal NonCacheable memory for writecombineCatalin Marinas1-1/+1
2013-11-05arm64: Use 42-bit address space with 64K pagesCatalin Marinas1-1/+1
2013-06-29consolidate io_remap_pfn_range definitionsAl Viro1-7/+0
2013-06-14ARM64: mm: THP support.Steve Capper1-0/+55