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2013-06-11arm64: device: add iommu pointer to device archdataWill Deacon1-0/+3
When using an IOMMU for device mappings, it is necessary to keep a pointer between the device and the IOMMU to which it is attached in order to obtain the correct IOMMU when attaching the device to a domain. This patch adds an iommu pointer to the dev_archdata structure, in a similar manner to other architectures (ARM, PowerPC, x86, ...). Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-06-11arm64: pgtable: use pte_index instead of __pte_indexWill Deacon1-2/+2
pte_index is a useful helper outside of arch/arm64, for things like the ARM SMMU driver, so rename __pte_index to pte_index to be consistent with both arch/arm/ and also the definitions of pmd_index and pgd_index. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-06-10arm64: kernel: compiling issue, need delete read_current_timer()Chen Gang2-9/+3
Under arm64, we will calibrate the delay loop statically using a known timer frequency, so delete read_current_timer(), or it will cause compiling issue with allmodconfig. The related error: ERROR: "read_current_timer" [lib/rbtree_test.ko] undefined! ERROR: "read_current_timer" [lib/interval_tree_test.ko] undefined! ERROR: "read_current_timer" [fs/ext4/ext4.ko] undefined! ERROR: "read_current_timer" [crypto/tcrypt.ko] undefined! Signed-off-by: Chen Gang <gang.chen@asianux.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-06-07arm64: mm: don't bother invalidating the icache in switch_mmWill Deacon1-6/+0
We don't support software broadcast of cache maintenance operations, so this flush is not required (__sync_icache_dcache will always affect all CPUs). Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-06-07arm64: spinlock: retry trylock operation if strex fails on free lockCatalin Marinas1-1/+2
An exclusive store instruction may fail for reasons other than lock contention (e.g. a cache eviction during the critical section) so, in line with other architectures using similar exclusive instructions (alpha, mips, powerpc), retry the trylock operation if the lock appears to be free but the strex reported failure. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Tony Thompson <anthony.thompson@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
2013-06-07arm64: Remove __flush_dcache_page()Catalin Marinas3-10/+1
This function is only used in __sync_icache_dcache(), so remove it and call __flush_dcache_area() directly. The flush_icache_user_range() function is not used in the arm64 kernel. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Will Deacon <will.deacon@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
2013-06-07arm64: Do not flush the D-cache for anonymous pagesCatalin Marinas2-6/+3
The D-cache on AArch64 is VIPT non-aliasing, so there is no need to flush it for anonymous pages. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Will Deacon <will.deacon@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
2013-06-07arm64: Avoid cache flushing in flush_dcache_page()Catalin Marinas1-18/+4
The flush_dcache_page() function is called when the kernel modified a page cache page. Since the D-cache on AArch64 does not have aliases this function can simply mark the page as dirty for later flushing via set_pte_at()/__sync_icache_dcache() if the page is executable (to ensure the I-D cache coherency). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Will Deacon <will.deacon@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
2013-06-07arm64: Provide default implementation for dma_{alloc,free}_attrsDamian Hobson-Garcia1-6/+11
Most architectures that define CONFIG_HAS_DMA, have implementations for both dma_alloc_attrs() and dma_free_attrs(). All achitectures that do not define CONFIG_HAS_DMA also have both of these definitions provided by dma-mapping-broken.h. Add default implementations for these functions on arm64. Signed-off-by: Damian Hobson-Garcia <dhobsong@igel.co.jp> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-06-07arm64: KVM: hypervisor initialization codeMarc Zyngier2-0/+120
Provide EL2 with page tables and stack, and set the vectors to point to the full blown world-switch code. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: guest one-reg interfaceMarc Zyngier1-0/+259
Let userspace play with the guest registers. Reviewed-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: MMIO access backendMarc Zyngier1-0/+59
Define the necessary structures to perform an MMIO access. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: kvm_arch and kvm_vcpu_arch definitionsMarc Zyngier1-0/+186
Provide the architecture dependent structures for VM and vcpu abstractions. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: virtual CPU resetMarc Zyngier1-0/+76
Provide the reset code for a virtual CPU booted in 64bit mode. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: CPU specific system registers handlingMarc Zyngier1-0/+85
Add the support code for CPU specific system registers. Not much here yet. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: system register handlingMarc Zyngier4-0/+1101
Provide 64bit system register handling, modeled after the cp15 handling for ARM. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: user space interfaceMarc Zyngier1-0/+117
Provide the kvm.h file that defines the user space visible interface. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: architecture specific MMU backendMarc Zyngier1-0/+135
Define the arm64 specific MMU backend: - HYP/kernel VA offset - S2 4/64kB definitions - S2 page table populating and flushing - icache cleaning Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: fault injection into a guestMarc Zyngier1-0/+126
Implement the injection of a fault (undefined, data abort or prefetch abort) into a 64bit guest. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: Basic ESR_EL2 helpers and vcpu register accessMarc Zyngier1-0/+158
Implements helpers for dealing with the EL2 syndrome register as well as accessing the vcpu registers. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: system register definitions for 64bit guestsMarc Zyngier1-0/+68
Define the saved/restored registers for 64bit guests. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: EL2 register definitionsMarc Zyngier1-0/+245
Define all the useful bitfields for EL2 registers. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: HYP mode idmap supportMarc Zyngier1-0/+20
Add the necessary infrastructure for identity-mapped HYP page tables. Idmap-ed code must be in the ".hyp.idmap.text" linker section. The rest of the HYP ends up in ".hyp.text". Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: define HYP and Stage-2 translation page flagsMarc Zyngier3-0/+37
Add HYP and S2 page flags, for both normal and device memory. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64/xen: introduce CONFIG_XEN and hypercall.S on ARM64Stefano Stabellini4-0/+105
Introduce CONFIG_XEN and the implementation of hypercall.S (that is the only ARMv8 specific code in Xen support for ARM). Compile enlighten.c and grant_table.c from arch/arm. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-06-07arm64/xen: implement ioremap_cached on arm64Stefano Stabellini1-0/+2
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-06-07arm64/xen: introduce asm/xen header files on arm64Stefano Stabellini7-0/+57
asm/xen/hypercall.h, asm/xen/hypervisor.h, asm/xen/interface.h and asm/xen/page.h are identical so to avoid code duplication we are just including the original arm header files here. asm/xen/events.h is slightly different, so introduce a different file here (use xchg to implement xchg_xen_ulong and pass regs->pstate to raw_irqs_disabled_flags). Also introduce asm/hypervisor.h and asm/sync_bitops.h. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-06-07clocksource: arch_timer: use virtual countersMark Rutland1-10/+0
Switching between reading the virtual or physical counters is problematic, as some core code wants a view of time before we're fully set up. Using a function pointer and switching the source after the first read can make time appear to go backwards, and having a check in the read function is an unfortunate block on what we want to be a fast path. Instead, this patch makes us always use the virtual counters. If we're a guest, or don't have hyp mode, we'll use the virtual timers, and as such don't care about CNTVOFF as long as it doesn't change in such a way as to make time appear to travel backwards. As the guest will use the virtual timers, a (potential) KVM host must use the physical timers (which can wake up the host even if they fire while a guest is executing), and hence a host must have CNTVOFF set to zero so as to have a consistent view of time between the physical timers and virtual counters. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rob Herring <rob.herring@calxeda.com>
2013-05-31arm64: don't kill the kernel on a bad esr from el0Mark Rutland1-3/+9
Rather than completely killing the kernel if we receive an esr value we can't deal with in the el0 handlers, send the process a SIGILL and log the esr value in the hope that we can debug it. If we receive a bad esr from el1, we'll die() as before. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: stable@vger.kernel.org
2013-05-31arm64: treat unhandled compat el0 traps as undefMark Rutland1-0/+10
Currently, if a compat process reads or writes from/to a disabled cp15/cp14 register, the trap is not handled by the el0_sync_compat handler, and the kernel will head to bad_mode, where it will die(), and oops(). For 64 bit processes, disabled system register accesses are currently treated as unhandled instructions. This patch modifies entry.S to treat these unhandled traps as undefined instructions, sending a SIGILL to userspace. This gives processes a chance to handle this and stop using inaccessible registers, and prevents further issues in the kernel as a result of the die(). Reported-by: Johannes Jensen <Johannes.Jensen@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-28arm64: uaccess s/might_sleep/might_fault/Michael S. Tsirkin1-2/+2
The only reason uaccess routines might sleep is if they fault. Make this explicit. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1369577426-26721-2-git-send-email-mst@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-05-24arm64: Do not report user faults for handled signalsCatalin Marinas2-3/+5
Currently user faults (page, undefined instruction) are always reported even though the user may have a signal handler for them. This patch adds unhandled_signal() check together with printk_ratelimit() for these cases. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-24arm64: kernel: compiling issue, need 'EXPORT_SYMBOL(clear_page)'Chen Gang1-0/+1
Need 'EXPORT_SYMBOL(clear_page)' if building with allmodconfig. The related errors: ERROR: "clear_page" [fs/ocfs2/dlm/ocfs2_dlm.ko] undefined! ERROR: "clear_page" [fs/ntfs/ntfs.ko] undefined! ERROR: "clear_page" [fs/gfs2/gfs2.ko] undefined! ERROR: "clear_page" [fs/fuse/fuse.ko] undefined! ERROR: "clear_page" [fs/ext3/ext3.ko] undefined! ERROR: "clear_page" [fs/ext2/ext2.ko] undefined! ERROR: "clear_page" [fs/exofs/libore.ko] undefined! ERROR: "clear_page" [fs/exofs/exofs.ko] undefined! ERROR: "clear_page" [drivers/block/brd.ko] undefined! Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-17arm64: debug: fix mdscr.ss check when enabling debug exceptionsWill Deacon1-1/+1
When we take an exception at EL1, we only want to enable debug exceptions if we're not currently stepping, otherwise we can easily get stuck in a loop stepping into interrupt handlers. Unfortunately, the current code tests the wrong bit in the mdscr, so fix that. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-14arm64: Do not source kernel/time/Kconfig explicitlyCatalin Marinas1-2/+0
As per commit 764e0da1 (timers: Fixup the Kconfig consolidation fallout), init/Kconfig already includes kernel/time/Kconfig, so no need to do it explicitly for arm64. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-14arm64: mm: Fix operands of clz in __flush_dcache_allSukanto Ghosh1-1/+1
The format of the lower 32-bits of the 64-bit operand to 'dc cisw' is unchanged from ARMv7 architecture and the upper bits are RES0. This implies that the 'way' field of the operand of 'dc cisw' occupies the bit-positions [31 .. (32-A)]. Due to the use of 64-bit extended operands to 'clz', the existing implementation of __flush_dcache_all is incorrectly placing the 'way' field in the bit-positions [63 .. (64-A)]. Signed-off-by: Sukanto Ghosh <sghosh@apm.com> Tested-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: stable@vger.kernel.org
2013-05-14arm64: Invoke the of_platform_populate() at arch_initcall() levelCatalin Marinas1-9/+3
The of_platform_populate() is currently invoked at device_initcall() level. There are however drivers that use platform_driver_probe() directly and they need the devices to be populated. This patch makes the of_platform_populate() and arch_initcall(). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Benoit Lecardonnel <Benoit.Lecardonnel@synopsys.com> Tested-by: Benoit Lecardonnel <Benoit.Lecardonnel@synopsys.com>
2013-05-13arm64: debug: clear mdscr_el1 instead of taking the OS lockWill Deacon2-4/+1
During boot, we take the debug OS lock before interrupts are enabled. This is required to prevent clearing of PSTATE.D on the interrupt entry path, which could result in spurious debug exceptions before we've got round to resetting things like the hardware breakpoints registers to a sane state. A problem with this approach is that taking the OS lock prevents an external JTAG debugger from debugging the system, which is especially irritating during boot, where JTAG debugging can be most useful. This patch clears mdscr_el1 rather than taking the lock, clearing the MDE and KDE bits and preventing self-hosted hardware debug exceptions from occurring. Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: stable@vger.kernel.org
2013-05-13arm64: Fix duplicate definition of early_consoleChen Gang1-2/+3
When compiling with allmodconfig. early_console is already defined as an extern global pointer. Need let it point to the object which we intend to (like arm32 done). Signed-off-by: Chen Gang <gang.chen@asianux.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-10Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signalLinus Torvalds2-8/+1
Pull stray syscall bits from Al Viro: "Several syscall-related commits that were missing from the original" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: switch compat_sys_sysctl to COMPAT_SYSCALL_DEFINE unicore32: just use mmap_pgoff()... unify compat fanotify_mark(2), switch to COMPAT_SYSCALL_DEFINE x86, vm86: fix VM86 syscalls: use SYSCALL_DEFINEx(...)
2013-05-09unify compat fanotify_mark(2), switch to COMPAT_SYSCALL_DEFINEAl Viro2-8/+1
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-05-09Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds1-3/+0
Pull removal of GENERIC_GPIO from Grant Likely: "GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: gpio: update gpio Chinese documentation Remove GENERIC_GPIO config option Convert selectors of GENERIC_GPIO to GPIOLIB blackfin: force use of gpiolib m68k: coldfire: use gpiolib mips: pnx833x: remove requirement for GENERIC_GPIO openrisc: default GENERIC_GPIO to false avr32: default GENERIC_GPIO to false xtensa: remove explicit selection of GENERIC_GPIO sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB powerpc: remove redundant GENERIC_GPIO selection unicore32: default GENERIC_GPIO to false unicore32: remove unneeded select GENERIC_GPIO arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB arm: remove redundant GENERIC_GPIO selection mips: alchemy: require gpiolib mips: txx9: change GENERIC_GPIO to GPIOLIB mips: loongson: use GPIO driver on CONFIG_GPIOLIB mips: remove redundant GENERIC_GPIO select
2013-05-08Merge tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64Linus Torvalds6-12/+17
Pull arm64 update from Catalin Marinas: - Since drivers/irqchip/irq-gic.c no longer has dependencies on arm32 specifics (the 'gic' branch merged), it can be enabled on arm64. - Enable arm64 support for poweroff/restart (for code under drivers/power/reset/). - Fixes (dts file, exception handling, bitops) * tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: arm64: Treat the bitops index argument as an 'int' arm64: Ignore the 'write' ESR flag on cache maintenance faults arm64: dts: fix #address-cells for foundation-v8 arm64: vexpress: Add support for poweroff/restart arm64: Enable support for the ARM GIC interrupt controller
2013-05-08arm64: Treat the bitops index argument as an 'int'Catalin Marinas1-5/+5
The bitops prototype use an 'int' as the bit index type but the asm implementation assume it to be a 'long'. Since the compiler does not guarantee zeroing the upper 32-bits in a register when used as 'int', change the bitops implementation accordingly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08arm64: Ignore the 'write' ESR flag on cache maintenance faultsCatalin Marinas1-1/+2
ESR.WnR bit is always set on data cache maintenance faults even though the page is not required to have write permission. If a translation fault (page not yet mapped) happens for read-only user address range, Linux incorrectly assumes a permission fault. This patch adds the check of the ESR.CM bit during the page fault handling to ignore the 'write' flag. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Tim Northover <Tim.Northover@arm.com> Cc: stable@vger.kernel.org
2013-05-08arm64: dts: fix #address-cells for foundation-v8Mark Rutland1-1/+1
Commit 90556ca1 ("arm64: vexpress: Add dts files for the ARMv8 RTSM models") added foundation-v8.dts, but erroneously set /cpus/#address-cells = <1> while providing two cells in each cpus/cpu@N node's reg property. As of commit ea393a2e ("arm64: smp: honour #address-size when parsing CPU reg property") we read in as many address cells as specified rather than always reading two. This means that for foundation-v8.dts, we only read the first reg cell (zero) for each cpu node, and receive a lot of warnings at boot of the form "/cpus/cpu@1: duplicate cpu reg properties in the DT". This patch corrects foundation-v8.dts to have the correct value for /cpus/#address-cells. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Will Deacon <will.deacon@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08arm64: vexpress: Add support for poweroff/restartCatalin Marinas3-5/+8
This patch adds the arm_pm_poweroff definition expected by the vexpress-poweroff.c driver and enables the latter for arm64. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
2013-05-08arm64: Enable support for the ARM GIC interrupt controllerCatalin Marinas1-0/+1
This patch enables ARM_GIC on the arm64 kernel. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-07Merge tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2-2/+9
Pull ARM SoC late cleanups from Arnd Bergmann: "These are cleanups and smaller changes that either depend on earlier feature branches or came in late during the development cycle. We normally try to get all cleanups early, so these are the exceptions: - A follow-up on the clocksource reworks, hopefully the last time we need to merge clocksource subsystem changes through arm-soc. A first set of patches was part of the original 3.10 arm-soc cleanup series because of interdependencies with timer drivers now moved out of arch/arm. - Migrating the SPEAr13xx platform away from using auxdata for DMA channel descriptions towards using information in device tree, based on the earlier SPEAr multiplatform series - A few follow-ups on the Atmel SAMA5 support and other changes for Atmel at91 based on the larger at91 reworks. - Moving the armada irqchip implementation to drivers/irqchip - Several OMAP cleanups following up on the larger series already merged in 3.10." * tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) ARM: OMAP4: change the device names in usb_bind_phy ARM: OMAP2+: Fix mismerge for timer.c between ff931c82 and da4a686a ARM: SPEAr: conditionalize SMP code ARM: arch_timer: Silence debug preempt warnings ARM: OMAP: remove unused variable serial: amba-pl011: fix !CONFIG_DMA_ENGINE case ata: arasan: remove the need for platform_data ARM: at91/sama5d34ek.dts: remove not needed compatibility string ARM: at91: dts: add MCI DMA support ARM: at91: dts: add i2c dma support ARM: at91: dts: set #dma-cells to the correct value ARM: at91: suspend both memory controllers on at91sam9263 irqchip: armada-370-xp: slightly cleanup irq controller driver irqchip: armada-370-xp: move IRQ handler to avoid forward declaration irqchip: move IRQ driver for Armada 370/XP ARM: mvebu: move L2 cache initialization in init_early() devtree: add binding documentation for sp804 ARM: integrator-cp: convert use CLKSRC_OF for timer init ARM: versatile: use OF init for sp804 timer ARM: versatile: add versatile dtbs to dtbs target ...
2013-05-01Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signalLinus Torvalds1-7/+0
Pull compat cleanup from Al Viro: "Mostly about syscall wrappers this time; there will be another pile with patches in the same general area from various people, but I'd rather push those after both that and vfs.git pile are in." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: syscalls.h: slightly reduce the jungles of macros get rid of union semop in sys_semctl(2) arguments make do_mremap() static sparc: no need to sign-extend in sync_file_range() wrapper ppc compat wrappers for add_key(2) and request_key(2) are pointless x86: trim sys_ia32.h x86: sys32_kill and sys32_mprotect are pointless get rid of compat_sys_semctl() and friends in case of ARCH_WANT_OLD_COMPAT_IPC merge compat sys_ipc instances consolidate compat lookup_dcookie() convert vmsplice to COMPAT_SYSCALL_DEFINE switch getrusage() to COMPAT_SYSCALL_DEFINE switch epoll_pwait to COMPAT_SYSCALL_DEFINE convert sendfile{,64} to COMPAT_SYSCALL_DEFINE switch signalfd{,4}() to COMPAT_SYSCALL_DEFINE make SYSCALL_DEFINE<n>-generated wrappers do asmlinkage_protect make HAVE_SYSCALL_WRAPPERS unconditional consolidate cond_syscall and SYSCALL_ALIAS declarations teach SYSCALL_DEFINE<n> how to deal with long long/unsigned long long get rid of duplicate logics in __SC_....[1-6] definitions
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