| Age | Commit message (Collapse) | Author | Files | Lines |
|
This wires up the pidfd_getfd syscall for all architectures.
Signed-off-by: Sargun Dhillon <sargun@sargun.me>
Acked-by: Christian Brauner <christian.brauner@ubuntu.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200107175927.4558-4-sargun@sargun.me
Signed-off-by: Christian Brauner <christian.brauner@ubuntu.com>
|
|
We want to specify per-device firmware-name, so move the zap node into
the .dts file for individual boards/devices. This lets us get rid of
the /delete-node/ for cheza, which does not use zap.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20200112195405.1132288-5-robdclark@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
I missed the fact that these constants was not yet available, so hard
code their values in the dts to make the branch compile on its own.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Commit 582f95835a8fc812c ("arm64: entry: convert el0_sync to C") caused
the ENDPROC() annotating the end of el0_sync to be placed after the code
for el0_sync_compat. This replaced the previous annotation where it was
located after all the cases that are now converted to C, including after
the currently unannotated el0_irq_compat and el0_error_compat. Move the
annotation to the end of the function and add separate annotations for
the _compat ones.
Fixes: 582f95835a8fc812c (arm64: entry: convert el0_sync to C)
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
|
|
Create the necessary display nodes to activate the Xingpeng XPP055C272
dsi display that can be found on the px30-evb.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20191209145301.5307-2-heiko@sntech.de
|
|
Include mt8183-reset.h and add reset-cells in infracfg
in dtsi file
Signed-off-by: yong.liang <yong.liang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
|
|
The mezzanine board carries an E key type M.2 slot. This is
connected to USB, SDIO and UART0. Enable sdio and uart0 for use
with wlan and/or bt M.2 cards.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/20200109154211.1530-1-m.reichl@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
An experimental test with the command below gives this error:
rk3399-firefly.dt.yaml: dwmmc@fe310000: wifi@1:
'reg' is a required property
rk3399-orangepi.dt.yaml: dwmmc@fe310000: wifi@1:
'reg' is a required property
rk3399-khadas-edge.dt.yaml: dwmmc@fe310000: wifi@1:
'reg' is a required property
rk3399-khadas-edge-captain.dt.yaml: dwmmc@fe310000: wifi@1:
'reg' is a required property
rk3399-khadas-edge-v.dt.yaml: dwmmc@fe310000: wifi@1:
'reg' is a required property
So fix this by adding a reg property to the brcmf sub node.
Also add #address-cells and #size-cells to prevent more warnings.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200110142128.13522-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
An experimental test with the command below gives this error:
rk3308-evb.dt.yaml: dwmmc@ff480000: clock-names:2:
'ciu-drive' was expected
'ciu-drv' is not a valid dwmmc clock name,
so fix this by changing it to 'ciu-drive'.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200110161200.22755-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
An experimental test with the command below gives this error:
px30-evb.dt.yaml: dwmmc@ff390000: clock-names:2:
'ciu-drive' was expected
'ciu-drv' is not a valid dwmmc clock name,
so fix this by changing it to 'ciu-drive'.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200110161200.22755-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Add CPU regulator and operating points for all the A64-based boards
that are currently supported to enable DVFS.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
Add operating points for A64. These are taken from FEX file from BSP
for A64.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
Add cooling maps and thermal tripping points to prevent CPU overheating when
running at the highest frequency. Tripping points are taken from A33 dts since
A64 user manual doesn't mention when we should start throttling.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
Add CPU clock to the CPU nodes since it is a prerequisite for enabling
DVFS.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
[wens@csie.org: Replace CLK_CPUX macro with raw number]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
Select CONFIG_CLK_IMX8MP by default to support i.MX8MP clock driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Pull thread fixes from Christian Brauner:
"This contains a series of patches to fix CLONE_SETTLS when used with
clone3().
The clone3() syscall passes the tls argument through struct clone_args
instead of a register. This means, all architectures that do not
implement copy_thread_tls() but still support CLONE_SETTLS via
copy_thread() expecting the tls to be located in a register argument
based on clone() are currently unfortunately broken. Their tls value
will be garbage.
The patch series fixes this on all architectures that currently define
__ARCH_WANT_SYS_CLONE3. It also adds a compile-time check to ensure
that any architecture that enables clone3() in the future is forced to
also implement copy_thread_tls().
My ultimate goal is to get rid of the copy_thread()/copy_thread_tls()
split and just have copy_thread_tls() at some point in the not too
distant future (Maybe even renaming copy_thread_tls() back to simply
copy_thread() once the old function is ripped from all arches). This
is dependent now on all arches supporting clone3().
While all relevant arches do that now there are still four missing:
ia64, m68k, sh and sparc. They have the system call reserved, but not
implemented. Once they all implement clone3() we can get rid of
ARCH_WANT_SYS_CLONE3 and HAVE_COPY_THREAD_TLS.
This series also includes a minor fix for the arm64 uapi headers which
caused __NR_clone3 to be missing from the exported user headers.
Unfortunately the series came in a little late especially given that
it touches a range of architectures. Due to the holidays not all arch
maintainers responded in time probably due to their backlog. Will and
Arnd have thankfully acked the arm specific changes.
Given that the changes are straightforward and rather minimal combined
with the fact the that clone3() with CLONE_SETTLS is broken I decided
to send them post rc3 nonetheless"
* tag 'clone3-tls-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brauner/linux:
um: Implement copy_thread_tls
clone3: ensure copy_thread_tls is implemented
xtensa: Implement copy_thread_tls
riscv: Implement copy_thread_tls
parisc: Implement copy_thread_tls
arm: Implement copy_thread_tls
arm64: Implement copy_thread_tls
arm64: Move __ARCH_WANT_SYS_CLONE3 definition to uapi headers
|
|
New boards are the Radxa Rock Pi N10 using the VMARC SOM and Dalang
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.
The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.
Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.
* tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (37 commits)
arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
arm64: dts: rockchip: Add PX30 LVDS
arm64: dts: rockchip: add dsi controller for px30
arm64: dts: rockchip: Add PX30 DSI DPHY
arm64: dts: rockchip: Add RK3328 idle state
arm64: dts: rockchip: remove identical &uart0 node from rk3368-lion-haikou
arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
ARM: dts: rockchip: Add Radxa Dalang Carrier board
arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
dt-bindings: arm: rockchip: Add Rock Pi N10 binding
arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
arm64: dts: rockchip: enable the gpu on px30-evb
arm64: dts: rockchip: add the gpu for px30
dt-bindings: gpu: mali-bifrost: Add Rockchip PX30
arm64: dts: rockchip: Add GPU cooling device for RK3399
arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
...
Link: https://lore.kernel.org/r/5115625.yBEeHQkg2z@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
ARM64: DT: Hisilicon SoCs DT updates for 5.6
- Add remote control map name of the IR device for the hi3798cv200 poplar board
- Correct the PCIe bus range setting for the hi3798cv200
* tag 'hisi-arm64-dt-for-5.6' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi3798cv200: correct PCIe 'bus-range' setting
arm64: dts: hi3798cv200-poplar: add linux,rc-map-name for IR
Link: https://lore.kernel.org/r/5E169EDE.8020809@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
A fix for the Beelink A1 IR receiver setting the correct polarity.
* tag 'v5.5-rockchip-dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Fix IR on Beelink A1
Link: https://lore.kernel.org/r/2054603.JKFSmqfO19@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
A couple of fixes for GPIO polarity and regulators on the A64
olinuxino.
* tag 'sunxi-fixes-for-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity
arm64: dts: allwinner: a64: olinuxino: Fix SDIO supply regulator
arm64: dts: allwinner: a64: olinuxino: Fix eMMC supply regulator
Link: https://lore.kernel.org/r/582f4fda-38af-43e8-af58-957aee5b9dd8.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
i.MX fixes for 5.5, round 2:
- Fix i.MX8MM SDMA1 AHB clock setting to remove a "Timeout waiting for CH0"
error seen with UART1.
- Correct compatible of RV3029 RTC device on imx6q-dhcom board.
- Correct interrupt trigger type for magnetometer on board
imx8mq-librem5-devkit.
- A series from Anson Huang to fix vdd3p0 power supplier for a few NXP
development board.
- Fix imx6q-icore-mipi board to use 1.5 version of i.Core MX6DL, so
that Ethernet interface on the board works properly.
- Fix Toradex Colibri board to get NAND flash support back.
- Fix SGTL5000 VDDIO regulator connection for imx6q-dhcom, which
is connected to PMIC SW2 output rather than a fixed 3V3 rail.
- Fix 'reg' of CPU node on imx7ulp to get rid of a warning given by
kernel.
- Fix endian setting for DCFG on LS1028A SoC, so that register access
of DCFG becomes correct.
* tag 'imx-fixes-5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support
ARM: dts: imx6sll-evk: Remove incorrect power supply assignment
ARM: dts: imx6sl-evk: Remove incorrect power supply assignment
ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment
ARM: dts: imx6qdl-sabresd: Remove incorrect power supply assignment
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
arm64: dts: imx8mq-librem5-devkit: use correct interrupt for the magnetometer
ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection
ARM: dts: imx7ulp: fix reg of cpu node
arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm
arm64: dts: ls1028a: fix endian setting for dcfg
ARM: dts: imx6q-dhcom: fix rtc compatible
Link: https://lore.kernel.org/r/20200110011836.GW4456@T480
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
arm-soc: Amlogic fixes for v5.5-rc
* tag 'amlogic-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt
dt-bindings: reset: meson8b: fix duplicate reset IDs
soc: amlogic: meson-ee-pwrc: propagate errors from pm_genpd_init()
soc: amlogic: meson-ee-pwrc: propagate PD provider registration errors
ARM: dts: meson8: fix the size of the PMU registers
arm64: dts: meson-sm1-sei610: gpio-keys: switch to IRQs
Link: https://lore.kernel.org/r/7hmuaweavi.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Signed-off-by: Ingo Molnar <mingo@kernel.org>
|
|
Signed-off-by: Ingo Molnar <mingo@kernel.org>
|
|
Enable Nvidia XUSB device mode controller driver and USB GPIO Based
Connection Detection Driver as module.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add an ethernet alias so that a stable MAC address is added to the
device tree for the wired ethernet interface.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Adding crash dump support to 'kexec_file' is going to extend 'struct
kimage_arch' with more 'kexec_file'-specific members. The cleanup here
then starts to get in the way, so revert it.
This reverts commit 621516789ee6e285cb2088fe4706eedd030d38bf.
Reported-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
|
|
The current BTN_1 code associated with the force-recovery key is not a
valid code for EV_KEY type input devices. This causes errors in the
libinput debug-events command.
There is no system level action that maps to the force-recovery key on
Jetson AGX Xavier, so assign it the KEY_SLEEP action, which at least
makes it do something marginally useful.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Enable SDMMC3 and set it up for SDIO devices.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Enable PWM fan and extend CPU thermal zones for monitoring and fan control.
This will trigger the PWM fan on J15 and cool down the system if necessary.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The ungrafting from PRIO bug fixes in net, when merged into net-next,
merge cleanly but create a build failure. The resolution used here is
from Petr Machata.
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
This commit adds Tegra194 fuse and apbmisc device nodes.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The ordering of properties in the XUSB node is inconsistent with the
ordering of the properties in other nodes. Resort them to make the node
more consistent. Also get rid of some unnecessary whitespace.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The memory subsystem on Tegra194 encompasses both the memory and
external memory controllers. The EMC is represented as a subnode of the
MC and a ranges property is used to describe the register ranges.
A dma-ranges property is also added to describe that all memory clients
can address up to 39 bits using the memory controller client interface
(MCCIF), unless otherwise limited by the DMA engines of the hardware. A
memory client can technically use 40 bits of addresses, but the memory
controller on Tegra194 uses bit 39 to determine the XBAR format used to
access memory. Use of this bit needs to be explicitly controlled by the
operating system drivers for devices that can use this on-the-fly format
conversion. Using the dma-ranges property prevents the operating system
from using the bit implicitly, for example in I/O virtual address
mappings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add the external memory controller as a child device of the memory
controller on Tegra186. The memory controller really represents the
memory subsystem that encompasses both the memory and external memory
controllers. The external memory controller uses the BPMP to obtain the
list of supported EMC frequencies and set the EMC frequency.
Also set up the dma-ranges property to describe that all memory clients
can address up to 40 bits using the memory controller client interface
(MCCIF), unless otherwise limited by the DMA engines of the hardware.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The memory controller can be interrupted by certain conditions. Add the
interrupt to the device tree node to allow drivers to trap these
conditions.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Rename the EMC node to external-memory-controller according to device
tree best practices.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The EMC hardware block needs access to the EMC clock in order to scale
the external memory frequency. Add the clocks property so that drivers
for the EMC can acquire a reference to the EMC clock.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
In an effort to clarify and simplify the annotation of assembly functions
in the kernel new macros have been introduced. These replace ENTRY and
ENDPROC. Update the annotations in the xen code to the new macros.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Julien Grall <julien@xen.org>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
|
|
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
There is only one chipselect on each connector.
Define it directly in board dts file.
There should be an option to use more chipselects via gpios.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Card detect bit was broken on revA and it is working fine with revC
board that's why this property can be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
The si570 clock frequency should be 156.25MHz as per datasheet.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
If there are more instances of si570 clock-output-names property
should be used for differentiation of clock output.
The patch is adding this optional properties for all zynqmp boards with
si570 chip.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|