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2019-08-24arm64: dts: imx8mq: Add mux controller to iomuxc_gprGuido Günther1-1/+8
The only mux controls the MIPI DSI input selection. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24arm64: dts: fsl: add support for Hummingboard PulseJon Nettleton3-0/+566
The SolidRun Hummingboard Pulse carrier board carries the SolidRun i.MX8MQ based SOM. Notably missing is PCIe support that depends on analog PLLOUT clock. Current imx clk driver does not support this clock. Signed-off-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24arm64: dts: ls1088a: update gpio compatibleSong Hui1-4/+4
add ls1088a gpio specify compatible. Signed-off-by: Song Hui <hui.song_1@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts supportGary Bisson2-0/+406
Add basic dts support for i.MX8MQ NITROGEN8M. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> [Dafna: porting vendor's code to mainline] Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24arm64: dts: ls1088a-qds: Add the spi-flash nodes under the DSPI controllerChuanhua Han1-0/+33
This patch adds the spi-flash nodes under the DSPI controller for ls1088a-qds boards. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-24arm64: dts: ls1088a: Add the DSPI controller nodeChuanhua Han1-0/+13
This patch adds the DSPI controller node for ls1088a boards. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-23arm64: kexec_file: add rng-seed supportHsin-Yi Wang1-1/+17
Adding "rng-seed" to dtb. It's fine to add this property if original fdt doesn't contain it. Since original seed will be wiped after read, so use a default size 128 bytes here. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-23arm64: map FDT as RW for early_init_dt_scan()Hsin-Yi Wang4-20/+11
Currently in arm64, FDT is mapped to RO before it's passed to early_init_dt_scan(). However, there might be some codes (eg. commit "fdt: add support for rng-seed") that need to modify FDT during init. Map FDT to RO after early fixups are done. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-23arm64: dts: allwinner: orange-pi-3: Enable WiFiOndrej Jirman1-0/+46
Orange Pi 3 has AP6256 WiFi/BT module. WiFi part of the module is called bcm43356 and can be used with the brcmfmac driver. The module is powered by the two always on regulators (not AXP805). WiFi uses a PG port with 1.8V voltage level signals. SoC needs to be configured so that it sets up an 1.8V input bias on this port. This is done by the pio driver by reading the vcc-pg-supply voltage. You'll need a fw_bcm43456c5_ag.bin firmware file and nvram.txt configuration that can be found in the Xulongs's repository for H6: https://github.com/orangepi-xunlong/OrangePiH6_external/tree/master/ap6256 Mainline brcmfmac driver expects the firmware and nvram at the following paths relative to the firmware directory: brcm/brcmfmac43456-sdio.bin brcm/brcmfmac43456-sdio.txt Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23ARM: dts: sunxi: Add missing watchdog clocksMaxime Ripard2-0/+3
The watchdog has a clock on all our SoCs, but it wasn't always listed. Add it to the devicetree where it's missing. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: h6: Add support for RTC and fix the clock treeOndrej Jirman1-14/+16
This patch adds RTC node and fixes the clock properties and nodes to reflect the real clock tree. The device nodes for the internal oscillator and osc32k are removed, as these clocks are now provided by the RTC device. Clock references are fixed accordingly, too. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)Sunil Mohan Adapa2-0/+24
A64 OLinuXino board from Olimex has three variants with onboard eMMC: A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In addition, there are two variants without eMMC. One without eMMC and one with SPI flash. This suggests the need for separate device tree for the three eMMC variants. This patch has been tested on A64-OLinuXino-1Ge16GW with Linux 5.0 from Debain. Basic benchmarks using Flexible IO Tester show reasonable performance from the eMMC. eMMC - Random Write: 21.3MiB/s eMMC - Sequential Write: 68.2MiB/s SD Card - Random Write: 1690KiB/s SD Card - Sequential Write: 11.0MiB/s Changes: v3: Separate dts for eMMC variants v2: Fix descriptions for VCC and VCCQ Link: https://github.com/armbian/build/commit/174953de1eb09e6aa1ef7075066b573dba625398 Signed-off-by: Martin Ayotte <martinayotte@gmail.com> [sunil@medhas.org Fix descriptions for VCC and VCCQ, separate dts for eMMC] Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org> Tested-by: Sunil Mohan Adapa <sunil@medhas.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: h6: Introduce Tanix TX6 boardJernej Skrabec2-0/+101
Tanix TX6 is an Allwinner H6 based TV box, which supports: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 4GiB DDR3 RAM (3GiB useable) - 100Mbps EMAC via AC200 EPHY - Cdtech 47822BS Wifi/BT - 2x USB 2.0 Host and 1x USB 3.0 Host - HDMI port - IR receiver - 64GiB eMMC - 5V/2A DC power supply Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: allwinner: h6: add I2C nodesBhushan Shah1-1/+59
Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl nodes. Suggested-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Bhushan Shah <bshah@kde.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: Enable DDC regulator for Beelink GS1Clément Péron1-0/+1
Beelink GS1 has a DDC I2C bus voltage shifter. This is actually missing and video is limited to 1024x768 due to missing EDID information. Add the DDC regulator in the device-tree. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1Clément Péron1-0/+22
Beelink GS1 board has a SPDIF out connector, so enable it in the device-tree and add a simple SPDIF soundcard. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: Add SPDIF node for Allwinner H6Clément Péron1-0/+20
The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio). Only one pinmuxing is available so set it as default. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-23arm64: dts: allwinner: orange-pi-3: Enable HDMI outputOndrej Jirman1-0/+26
Orange Pi 3 has a DDC_CEC_EN signal connected to PH2, that enables the DDC I2C bus voltage shifter. Before EDID can be read, we need to pull PH2 high. This is realized by the ddc-en-gpios property. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-08-22arm64: dts: rockchip: add rk3328 VPU nodeJonas Karlman1-1/+13
This patch add a VPU device node for rk3328. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-22arm64: dts: fsl: Remove num-lanes property from PCIe nodesHou Zhiqiang5-17/+0
Remove the num-lanes property to avoid the driver setting the link width. On FSL Layerscape SoCs, the number of lanes assigned to PCIe controller is not fixed, it is determined by the selected SerDes protocol in the RCW (Reset Configuration Word). The PCIe link training is completed automatically through the selected SerDes protocol - the link width set-up is updated by hardware after power on reset, so the num-lanes property is not needed for Layerscape PCIe. The current num-lanes property was added erroneously, which actually indicates the maximum lanes the PCIe controller can support up to, instead of the lanes assigned to the PCIe controller. The link width set by SerDes protocol will be overridden by the num-lanes property, hence the subsequent re-training will fail when the assigned lanes do not match the value in the num-lanes property. Remove the property to fix the issue Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-08-22arm64: defconfig: Enable SM8150 GCC and pinctrl driverVinod Koul1-0/+2
Enable GCC config CONFIG_SM_GCC_8150 and pinctrl config CONFIG_PINCTRL_SM8150 to make it possible to boot the SM8150 MTP. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-22arm64: dts: mt8183: add I2C nodesQii Wang2-0/+285
Add i2c nodes to mt8183 and mt8183-evb. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-08-22arm64: dts: mt8183: fix pwrap gic numberHsin-Hsiung Wang1-1/+1
The correct gic number of pwrap is 185 instead of 209. This patch fixes it to avoid triggering error interrupt. Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile") Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-08-21arm64: dts: qcom: sm8150: Add apps shared nodesVinod Koul1-0/+63
Add hwlock, pmu, smem, tcsr_mutex_regs, apss_shared mailbox, apps_rsc including the rpmhcc child nodes to the SM8150 DTSI Co-developed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: sm8150: Add reserved-memory regionsVinod Koul1-0/+111
Add the reserved memory regions in SM8150 Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: sm8150-mtp: Add regulatorsVinod Koul1-0/+324
Add the regulators found in the mtp platform. This platform consists of pmic PM8150, PM8150L and PM8009. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: sm8150-mtp: Add base dts fileVinod Koul2-0/+52
This add base DTS file for sm8150-mtp and enables boot to console, adds tlmm reserved range, resin node, volume down key and also includes pmic file. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: pm8150l: Add base dts fileVinod Koul1-0/+80
PMIC pm8150l is a slave pmic and this adds base DTS file for pm8150l with power-on, adc and gpio nodes Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: pm8150b: Add base dts fileVinod Koul1-0/+86
PMIC pm8150b is a slave pmic and this adds base DTS file for pm8150b with power-on, adc, and gpio nodes Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: pm8150: Add base dts fileVinod Koul1-0/+97
Add base DTS file for pm8150 along with GPIOs, power-on, rtc and vadc nodes Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: dts: qcom: sm8150: Add base dts fileVinod Koul1-0/+308
This add base DTS file with cpu, psci, firmware, clock node tlmm and spmi and enables boot to console Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: sdm845: add adsp and cdsp fastrpc nodesSrinivas Kandagatla1-0/+74
Add fastrpc compute context bank nodes to both cdsp and adsp. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-21arm64: add arch/arm64/KbuildMasahiro Yamada2-5/+7
Use the standard obj-y form to specify the sub-directories under arch/arm64/. No functional change intended. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-21arm64: entry: Move ct_user_exit before any other exceptionJames Morse3-17/+30
When taking an SError or Debug exception from EL0, we run the C handler for these exceptions before updating the context tracking code and unmasking lower priority interrupts. When booting with nohz_full lockdep tells us we got this wrong: | ============================= | WARNING: suspicious RCU usage | 5.3.0-rc2-00010-gb4b5e9dcb11b-dirty #11271 Not tainted | ----------------------------- | include/linux/rcupdate.h:643 rcu_read_unlock() used illegally wh! | | other info that might help us debug this: | | | RCU used illegally from idle CPU! | rcu_scheduler_active = 2, debug_locks = 1 | RCU used illegally from extended quiescent state! | 1 lock held by a.out/432: | #0: 00000000c7a79515 (rcu_read_lock){....}, at: brk_handler+0x00 | | stack backtrace: | CPU: 1 PID: 432 Comm: a.out Not tainted 5.3.0-rc2-00010-gb4b5e9d1 | Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno De8 | Call trace: | dump_backtrace+0x0/0x140 | show_stack+0x14/0x20 | dump_stack+0xbc/0x104 | lockdep_rcu_suspicious+0xf8/0x108 | brk_handler+0x164/0x1b0 | do_debug_exception+0x11c/0x278 | el0_dbg+0x14/0x20 Moving the ct_user_exit calls to be before do_debug_exception() means they are also before trace_hardirqs_off() has been updated. Add a new ct_user_exit_irqoff macro to avoid the context-tracking code using irqsave/restore before we've updated trace_hardirqs_off(). To be consistent, do this everywhere. The C helper is called enter_from_user_mode() to match x86 in the hope we can merge them into kernel/context_tracking.c later. Cc: Masami Hiramatsu <mhiramat@kernel.org> Fixes: 6c81fe7925cc4c42 ("arm64: enable context tracking") Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-22kbuild: add CONFIG_ASM_MODVERSIONSMasahiro Yamada1-0/+1
Add CONFIG_ASM_MODVERSIONS. This allows to remove one if-conditional nesting in scripts/Makefile.build. scripts/Makefile.build is run every time Kbuild descends into a sub-directory. So, I want to avoid $(wildcard ...) evaluation where possible although computing $(wildcard ...) is so cheap that it may not make measurable performance difference. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2019-08-21arm64: dts: renesas: Update 'vsps' properties for readabilityJacopo Mondi5-5/+5
Update the 'vsps' property in the R-Car Gen3 SoC device tree files to match what's in the documentation example. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a77965-salvator-x(s): Enable HDMI soundKuninori Morimoto2-0/+56
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> # Salvator-XS [geert: Preserve sort order] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21kbuild: rebuild modules when module linker scripts are updatedMasahiro Yamada1-1/+1
Currently, the timestamp of module linker scripts are not checked. Add them to the dependency of modules so they are correctly rebuilt. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-21arm64: dts: renesas: r8a774c0: Fix register range of display nodeGeert Uytterhoeven1-1/+1
Since the R8A774C0 SoC uses DU{0,1} only, the register block length should be 0x40000. Based on commit 06585ed38b6698bc ("arm64: dts: renesas: r8a77990: Fix register range of display node") for R-Car E3. Fixes: 8ed3a6b223159df3 ("arm64: dts: renesas: r8a774c0: Add display output support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-21arm64: dts: renesas: r8a77970: Sort nodesYoshihiro Kaneko1-3/+3
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a7796: Sort nodesYoshihiro Kaneko1-76/+76
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a774c0: Sort nodesYoshihiro Kaneko1-45/+45
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a774c0: cat874: Sort nodesYoshihiro Kaneko1-14/+14
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a774a1: Sort nodesYoshihiro Kaneko1-87/+87
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-20arm64: dts: add support for SM1 based SEI Robotics SEI610Neil Armstrong3-0/+369
Add support for the Amlogic SM1 Based SEI610 board. The SM1 SoC is a derivative of the G12A SoC Family with : - Cortex-A55 core instead of A53 - more power domains, including USB & PCIe - a neural network co-processor (NNA) - a CSI input and image processor - some changes in the audio complex, thus not yet enabled The SEI610 board is a derivative of the SEI510 board with : - removed ADC based touch button, replaced with 3x GPIO buttons - physical switch disabling on-board MICs - USB-C port for USB 2.0 OTG - On-board FTDI USB2SERIAL port for Linux console Audio, Display and USB support will be added later when support of the corresponding power domains will be added, for now they are kept disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [khilman: fix minor typo regultor -> regulator] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20arm64: Change the tagged_addr sysctl control semantics to only prevent the opt-inCatalin Marinas1-7/+10
First rename the sysctl control to abi.tagged_addr_disabled and make it default off (zero). When abi.tagged_addr_disabled == 1, only block the enabling of the TBI ABI via prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE). Getting the status of the ABI or disabling it is still allowed. Acked-by: Andrey Konovalov <andreyknvl@google.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-20arm64: perf_event: Add missing header needed for smp_processor_id()Raphael Gault1-0/+1
In perf_event.c we use smp_processor_id(), but we haven't included <linux/smp.h> where it is defined, and rely on this being pulled in via a transitive include. Let's make this more robust by including <linux.smp.h> explicitly. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Raphael Gault <raphael.gault@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-19arm64: dts: sdm845: Add dynamic CPU power coefficientsMatthias Kaehlcke1-0/+8
Add dynamic power coefficients for the Silver and Gold CPU cores of the Qualcomm SDM845. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-19kexec_file: split KEXEC_VERIFY_SIG into KEXEC_SIG and KEXEC_SIG_FORCEJiri Bohac1-3/+3
This is a preparatory patch for kexec_file_load() lockdown. A locked down kernel needs to prevent unsigned kernel images from being loaded with kexec_file_load(). Currently, the only way to force the signature verification is compiling with KEXEC_VERIFY_SIG. This prevents loading usigned images even when the kernel is not locked down at runtime. This patch splits KEXEC_VERIFY_SIG into KEXEC_SIG and KEXEC_SIG_FORCE. Analogous to the MODULE_SIG and MODULE_SIG_FORCE for modules, KEXEC_SIG turns on the signature verification but allows unsigned images to be loaded. KEXEC_SIG_FORCE disallows images without a valid signature. Signed-off-by: Jiri Bohac <jbohac@suse.cz> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Matthew Garrett <mjg59@google.com> cc: kexec@lists.infradead.org Signed-off-by: James Morris <jmorris@namei.org>
2019-08-19arm64: dts: qcom: qcs404: Update memory map to v3Bjorn Andersson1-10/+20
Update the reserved-memory map to version 3, to adjust to changes in the remoteprocs. Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>