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2019-03-27arm64: dts: qcom: qcs404: Add Ethernet nodeVinod Koul1-0/+21
Add the ethernet node found in QCS404 platform. Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-03-27arm64: dts: sdm845: Include the interconnect resources DT headerGeorgi Djakov1-0/+1
Include the device tree header for the on-chip interconnect endpoint resources on sdm845 devices. This will allow using the "interconnects" property in DT nodes to describe the interconnect path resources they use. The sdm845 interconnect provider DT node is already present, but the header file with the resources is not included, so let's fix this. Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-03-27arm64: dts: qcom: qcs404: Fix regulator supply namesBjorn Andersson1-14/+14
The regulator definition got their supply names cleaned up during upstreaming, so they no longer match the driver defined names. Update the supply names. Also fill out the missing voltage of SMPS 5. Fixes: 0b363f5b871c ("arm64: dts: qcom: qcs404: Add PMS405 RPM regulators") Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-03-27arm64: replace memblock_alloc_low with memblock_allocChen Zhou1-1/+1
If we use "crashkernel=Y[@X]" and the start address is above 4G, the arm64 kdump capture kernel may call memblock_alloc_low() failure in request_standard_resources(). Replacing memblock_alloc_low() with memblock_alloc(). [ 0.000000] MEMBLOCK configuration: [ 0.000000] memory size = 0x0000000040650000 reserved size = 0x0000000004db7f39 [ 0.000000] memory.cnt = 0x6 [ 0.000000] memory[0x0] [0x00000000395f0000-0x000000003968ffff], 0x00000000000a0000 bytes on node 0 flags: 0x4 [ 0.000000] memory[0x1] [0x0000000039730000-0x000000003973ffff], 0x0000000000010000 bytes on node 0 flags: 0x4 [ 0.000000] memory[0x2] [0x0000000039780000-0x000000003986ffff], 0x00000000000f0000 bytes on node 0 flags: 0x4 [ 0.000000] memory[0x3] [0x0000000039890000-0x0000000039d0ffff], 0x0000000000480000 bytes on node 0 flags: 0x4 [ 0.000000] memory[0x4] [0x000000003ed00000-0x000000003ed2ffff], 0x0000000000030000 bytes on node 0 flags: 0x4 [ 0.000000] memory[0x5] [0x0000002040000000-0x000000207fffffff], 0x0000000040000000 bytes on node 0 flags: 0x0 [ 0.000000] reserved.cnt = 0x7 [ 0.000000] reserved[0x0] [0x0000002040080000-0x0000002041c4dfff], 0x0000000001bce000 bytes flags: 0x0 [ 0.000000] reserved[0x1] [0x0000002041c53000-0x0000002042c203f8], 0x0000000000fcd3f9 bytes flags: 0x0 [ 0.000000] reserved[0x2] [0x000000207da00000-0x000000207dbfffff], 0x0000000000200000 bytes flags: 0x0 [ 0.000000] reserved[0x3] [0x000000207ddef000-0x000000207fbfffff], 0x0000000001e11000 bytes flags: 0x0 [ 0.000000] reserved[0x4] [0x000000207fdf2b00-0x000000207fdfc03f], 0x0000000000009540 bytes flags: 0x0 [ 0.000000] reserved[0x5] [0x000000207fdfd000-0x000000207ffff3ff], 0x0000000000202400 bytes flags: 0x0 [ 0.000000] reserved[0x6] [0x000000207ffffe00-0x000000207fffffff], 0x0000000000000200 bytes flags: 0x0 [ 0.000000] Kernel panic - not syncing: request_standard_resources: Failed to allocate 384 bytes [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.1.0-next-20190321+ #4 [ 0.000000] Call trace: [ 0.000000] dump_backtrace+0x0/0x188 [ 0.000000] show_stack+0x24/0x30 [ 0.000000] dump_stack+0xa8/0xcc [ 0.000000] panic+0x14c/0x31c [ 0.000000] setup_arch+0x2b0/0x5e0 [ 0.000000] start_kernel+0x90/0x52c [ 0.000000] ---[ end Kernel panic - not syncing: request_standard_resources: Failed to allocate 384 bytes ]--- Link: https://www.spinics.net/lists/arm-kernel/msg715293.html Signed-off-by: Chen Zhou <chenzhou10@huawei.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-03-27arm64: dts: rockchip: Decrease emmc-phy's drive impedance on rk3399-pumaChristoph Muellner1-0/+1
The RK3399-Q7 (Puma) requires 33 Ohm drive strength to ensure signal integrity at HS-400 (200MHz clock, DDR signalling). A repeated EMC testing run validates that this increase does not negatively impact EMC compliance (emissions have ample distance to the regulatory limits). Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-27arm64: dts: rockchip: Define drive-impedance-ohm for RK3399's emmc-phy.Christoph Muellner1-0/+1
A previous patch introduced the property 'drive-impedance-ohm' for the RK3399's emmc phy node. This patch sets this value explicitly to the default value of 50 Ohm. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-27arm64: dts: rockchip: Disable DCMDs on RK3399's eMMC controller.Christoph Muellner1-0/+1
When using direct commands (DCMDs) on an RK3399, we get spurious CQE completion interrupts for the DCMD transaction slot (#31): [ 931.196520] ------------[ cut here ]------------ [ 931.201702] mmc1: cqhci: spurious TCN for tag 31 [ 931.206906] WARNING: CPU: 0 PID: 1433 at /usr/src/kernel/drivers/mmc/host/cqhci.c:725 cqhci_irq+0x2e4/0x490 [ 931.206909] Modules linked in: [ 931.206918] CPU: 0 PID: 1433 Comm: irq/29-mmc1 Not tainted 4.19.8-rt6-funkadelic #1 [ 931.206920] Hardware name: Theobroma Systems RK3399-Q7 SoM (DT) [ 931.206924] pstate: 40000005 (nZcv daif -PAN -UAO) [ 931.206927] pc : cqhci_irq+0x2e4/0x490 [ 931.206931] lr : cqhci_irq+0x2e4/0x490 [ 931.206933] sp : ffff00000e54bc80 [ 931.206934] x29: ffff00000e54bc80 x28: 0000000000000000 [ 931.206939] x27: 0000000000000001 x26: ffff000008f217e8 [ 931.206944] x25: ffff8000f02ef030 x24: ffff0000091417b0 [ 931.206948] x23: ffff0000090aa000 x22: ffff8000f008b000 [ 931.206953] x21: 0000000000000002 x20: 000000000000001f [ 931.206957] x19: ffff8000f02ef018 x18: ffffffffffffffff [ 931.206961] x17: 0000000000000000 x16: 0000000000000000 [ 931.206966] x15: ffff0000090aa6c8 x14: 0720072007200720 [ 931.206970] x13: 0720072007200720 x12: 0720072007200720 [ 931.206975] x11: 0720072007200720 x10: 0720072007200720 [ 931.206980] x9 : 0720072007200720 x8 : 0720072007200720 [ 931.206984] x7 : 0720073107330720 x6 : 00000000000005a0 [ 931.206988] x5 : ffff00000860d4b0 x4 : 0000000000000000 [ 931.206993] x3 : 0000000000000001 x2 : 0000000000000001 [ 931.206997] x1 : 1bde3a91b0d4d900 x0 : 0000000000000000 [ 931.207001] Call trace: [ 931.207005] cqhci_irq+0x2e4/0x490 [ 931.207009] sdhci_arasan_cqhci_irq+0x5c/0x90 [ 931.207013] sdhci_irq+0x98/0x930 [ 931.207019] irq_forced_thread_fn+0x2c/0xa0 [ 931.207023] irq_thread+0x114/0x1c0 [ 931.207027] kthread+0x128/0x130 [ 931.207032] ret_from_fork+0x10/0x20 [ 931.207035] ---[ end trace 0000000000000002 ]--- The driver shows this message only for the first spurious interrupt by using WARN_ONCE(). Changing this to WARN() shows, that this is happening quite frequently (up to once a second). Since the eMMC 5.1 specification, where CQE and CQHCI are specified, does not mention that spurious TCN interrupts for DCMDs can be simply ignored, we must assume that using this feature is not working reliably. The current implementation uses DCMD for REQ_OP_FLUSH only, and I could not see any performance/power impact when disabling this optional feature for RK3399. Therefore this patch disables DCMDs for RK3399. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: stable@vger.kernel.org [the corresponding code changes are queued for 5.2 so doing that as well] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-27arm64: dts: renesas: salvator-common: Add GPIO keys supportLaurent Pinchart1-0/+63
The Salvator-X and XS boards have a 4 lines DIP switch and 3 push buttons connected to SoC GPIOs, meant to be used as general-purpose test keys. Add a corresponding node in DT, mapping (semi-randomly) the DIP switch to keys 1-4 and the push buttons to keys A-C. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-27arm64: dts: renesas: use extended audio dmac registerJiada Wang3-3/+3
Basic audio dmac register only supports busif from 0 to 3, in order to use busif4 ~ busif7, extended audio dmac register need to be used. This patch updates H3 (= r8a7795), M3-W (= r8a7796) and M3-N (=r8a77965) to use extended audio dmac register set. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-27arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmiiKazuya Mizuguchi1-1/+0
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of August 24, 2018, the TX clock internal Delay mode does'nt support on R-Car D3. This patch fixes EthernetAVB phy mode to rgmii. This is achieved by simply dropping the phy-mode property from r8a77995-draak.dts as the default property for this for r8a77995, as set in r8a77995.dtsi, is "rgmii". Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-03-27arm64: dts: renesas: salvator-common: Sort node labelTakeshi Kihara1-5/+5
This patch sorts the node label to improve maintainability. The sort has been done alphabetically with the node label name as the key. This patch does not include functional changes. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-27arm64: dts: renesas: Update Ebisu and Draak bootargsMagnus Damm2-2/+2
Update Ebisu and Draak bootargs to match other boards Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-26arm64: dts: allwinner: a64: Fix the Codec I2S bindingMaxime Ripard1-1/+0
The I2S binding never mentions a reset-names property, or mentions which value it should have. To avoid any further issue, remove it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-26arm64: dts: allwinner: a64: Add default dr_modeMaxime Ripard1-0/+1
The USB OTG binding we have mandates to have a dr_mode property, yet not all boards are setting it. Since the generic otg binding states that the default mode should be the OTG mode, let's use that one in our DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-26arm64: dts: imx: Add i.mx8mm evk basic dts supportJacky Bai2-0/+236
Add basic dts support for i.MM8MM LPDDR4 EVK. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-26arm64: dts: imx: Add i.mx8mm dtsi supportJacky Bai1-0/+703
The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators This patch adds the basic dtsi support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-25ARM: dts: sun8i: h3: Refactor the pinctrl node namesMaxime Ripard7-9/+9
The H3 and H5 have never been converted to the new convention we want to have for the pinctrl nodes. Convert them. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entryMaxime Ripard4-6/+0
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl group anymore. Drop them. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25arm64: dts: allwinner: Fix pinctrl node namesMaxime Ripard2-15/+15
Some pinctrl node names for the A64 and H6 do not follow the convention that we switched to and enforced, most notably by using underscores in node names, which also trigger a DTC warning. Let's change that. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25arm64: dts: allwinner: a64: Add missing PIO clocksMaxime Ripard1-1/+2
The pinctrl binding mandates that we have the three clocks fed into the PIO described. Even though the old case is still supported for backward compatibility, we should update our DTs to fix this. Fixes: 6bc37fac30cf ("arm64: dts: add Allwinner A64 SoC .dtsi") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25arm64: dts: allwinner: a64: Fix display pipeline endpointsMaxime Ripard1-1/+3
Commit a7f7047ffcee ("arm64: dts: allwinner: a64: Add cross links for the mixers") introduced a few errors while fixing the cross links. Make sure to correct them. Fixes: a7f7047ffcee ("arm64: dts: allwinner: a64: Add cross links for the mixers") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25arm64: dts: allwinner: a64: Fix the TCON output clockMaxime Ripard1-0/+1
Even though we shouldn't really have any external user of the clock provided by the TCON, if clock-output-names is set, then #clock-cells must be there as well. Fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25arm64: tegra: Disable CQE Support for SDMMC4 on Tegra186Jonathan Hunter1-1/+0
Enabling CQE support on Tegra186 Jetson TX2 has introduced a regression that is causing accesses to the file-system on the eMMC to fail. Errors such as the following have been observed ... mmc2: running CQE recovery mmc2: mmc_select_hs400 failed, error -110 print_req_error: I/O error, dev mmcblk2, sector 8 flags 80700 mmc2: cqhci: CQE failed to exit halt state For now disable CQE support for Tegra186 until this issue is resolved. Fixes: dfd3cb6feb73 arm64: tegra: Add CQE Support for SDMMC4 Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-03-25Merge tag 'arm-soc/for-5.1/soc-fixes' of https://github.com/Broadcom/stblinux into arm/fixesArnd Bergmann1-0/+1
This pull request contains Broadcom ARM/ARM64-based SoCs fixes for 5.1, please pull the following: - Eric provides fixes for the bcm2835-pm driver: added missing depends on MFD_CORE for the ARM64 definition of ARCH_BCM2835, fixing error paths on initialization and fixing the PM_IMAGE_PERI power domain * tag 'arm-soc/for-5.1/soc-fixes' of https://github.com/Broadcom/stblinux: arm64: bcm2835: Add missing dependency on MFD_CORE. soc: bcm: bcm2835-pm: Fix error paths of initialization. soc: bcm: bcm2835-pm: Fix PM_IMAGE_PERI power domain support.
2019-03-25Merge tag 'renesas-fixes-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/fixesArnd Bergmann2-8/+6
Renesas ARM Based SoC Fixes for v5.1 R-Car Gen3 E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs: * Correct SCIF5 DMA channels * tag 'renesas-fixes-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels arm64: dts: renesas: r8a77990: Fix SCIF5 DMA channels
2019-03-22arm64: dts: meson-g12a-sei510: add regulatorsJerome Brunet1-0/+57
Add some regulators. Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU(PWM controlled) * VDDQ1_5 Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson-g12a-x96-max: add uart_AO pinctrlNeil Armstrong1-0/+2
Add pinctrl on the always-enabled debug UART AO. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson-g12a-sei510: add uart_AO pinctrlNeil Armstrong1-0/+2
Add pinctrl on the always-enabled debug UART AO. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson-g12a-u200: add uart_AO pinctrlNeil Armstrong1-0/+2
Add pinctrl on the always-enabled debug UART AO. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson: g12a: Add UART A, B & C nodes and pinsNeil Armstrong1-0/+72
This patch adds the 3 UART nodes in the EE power domain with the corresponding pinctrl nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson: g12a: add reset controllerJerome Brunet1-0/+7
Add the reset controller device of g12a SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson: g12a: add uart_ao_a pinctrlJerome Brunet1-0/+18
Add the always on UART pinctrl setting to the g12a soc DT. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson: g12a: add pinctrl support controllersJerome Brunet1-0/+42
Add the peripheral and always-on pinctrl controllers to the g12a soc. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22arm64: dts: meson: g12a: Add AO Clock + Reset Controller supportNeil Armstrong1-0/+17
Add nodes and properties for the AO Clocks and Resets. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-03-22crypto: arm64 - convert to use crypto_simd_usable()Eric Biggers15-34/+47
Replace all calls to may_use_simd() in the arm64 crypto code with crypto_simd_usable(), in order to allow testing the no-SIMD code paths. Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: arm64/gcm-aes-ce - fix no-NEON fallback codeEric Biggers1-4/+6
The arm64 gcm-aes-ce algorithm is failing the extra crypto self-tests following my patches to test the !may_use_simd() code paths, which previously were untested. The problem is that in the !may_use_simd() case, an odd number of AES blocks can be processed within each step of the skcipher_walk. However, the skcipher_walk is being done with a "stride" of 2 blocks and is advanced by an even number of blocks after each step. This causes the encryption to produce the wrong ciphertext and authentication tag, and causes the decryption to incorrectly fail. Fix it by only processing an even number of blocks per step. Fixes: c2b24c36e0a3 ("crypto: arm64/aes-gcm-ce - fix scatterwalk API violation") Fixes: 71e52c278c54 ("crypto: arm64/aes-ce-gcm - operate on two input blocks at a time") Cc: <stable@vger.kernel.org> # v4.19+ Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22arm64: dts: imx8mq: Move the opp table out of bus nodeFabio Estevam1-19/+18
Move opp-table node from soc node to root node. opp-table node does not have any register properties and thus shouldn't be placed inside the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/imx8mq.dtsi:687.28-703.5: Warning (simple_bus_reg): /soc@0/opp-table: missing or empty reg/ranges property Fixes: 64d26f8c1dde ("arm64: dts: imx8mq: Add the opp table and cores opp properties") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22arm64: dts: ls1043a: add crypto node alias also for qdsHoria Geantă2-1/+1
crypto node alias is needed by U-boot to identify the node and perform fix-ups, like adding "fsl,sec-era" property or deleting a job ring child node (in case ARM TF-A is running). Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22arm64: dts: fsl: Remove unused properties from FSL QSPI nodesFrieder Schrempf2-3/+0
After switching to the new FSL QSPI driver the properties 'fsl,qspi-has-second-chip' and 'big-endian' are not used anymore. The driver now uses the 'reg' property to determine the bus and the chipselect. The endianness is selected by the driver depending on which SoC is used. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22arm64: dts: imx8mq: enable the multi sensor TMUAngus Ainslie (Purism)1-0/+118
Add the imx8mq TMU (Thermal management unit) nodes for CPU, GPU, and VPU. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21arm64: dts: stratix10: enable MMC highspeed supportDinh Nguyen1-0/+1
Add 'cap-mmc-highspeed' property to enable high-speed support for MMC cards. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-03-21arm64: dts: stratix10: add the sysmgr-syscon property from the gmac'sDinh Nguyen1-0/+3
The gmac ethernet driver uses the "altr,sysmgr-syscon" property to configure phy settings for the gmac controller. Add the "altr,sysmgr-syscon" property to all gmac nodes. This patch fixes: [ 0.917530] socfpga-dwmac ff800000.ethernet: No sysmgr-syscon node found [ 0.924209] socfpga-dwmac ff800000.ethernet: Unable to parse OF data Cc: stable@vger.kernel.org Reported-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-03-21arm64: dts: imx8qxp: add lsio_mu2 nodePeng Fan1-0/+8
Add lsio_mu2 node which could be used communicate with SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21arm64: dts: imx8qxp: fix mbox-cellsPeng Fan1-3/+3
Currently lsio_mu1 is used by Linux Kernel with mbox-cells as 2, but actually mu0-4 could be used to communicate with SCU. So fix the mbox-cells. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supplyChen-Yu Tsai4-4/+4
The A64 datasheet lists the supply rail for the headphone amp's charge pump as "CPVDD". cpvdd-supply is the name of the property for this power rail specified in the device tree bindings. "HPVCC" was the name used in the A33 datasheet for the same function. Rename the supply so it matches the datasheet and bindings. Fixes: c56689e6f2fb ("arm64: dts: allwinner: a64: bananapi-m64: Enable audio codec") Fixes: 6de8e717848f ("arm64: dts: allwinner: a64: enable sound on Pinebook") Fixes: 498c21f233ed ("arm64: dts: allwinner: a64: enable sound on Pine64 and SoPine") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2019-03-21ARM: dts: sunxi: h3/h5: Add device node for SIDChen-Yu Tsai1-0/+4
The device tree binding already lists compatible strings for these two SoCs. Add a device node for them. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2019-03-20syscall_get_arch: add "struct task_struct *" argumentDmitry V. Levin1-2/+2
This argument is required to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request: syscall_get_arch() is going to be called from ptrace_request() along with syscall_get_nr(), syscall_get_arguments(), syscall_get_error(), and syscall_get_return_value() functions with a tracee as their argument. The primary intent is that the triple (audit_arch, syscall_nr, arg1..arg6) should describe what system call is being called and what its arguments are. Reverts: 5e937a9ae913 ("syscall_get_arch: remove useless function arguments") Reverts: 1002d94d3076 ("syscall.h: fix doc text for syscall_get_arch()") Reviewed-by: Andy Lutomirski <luto@kernel.org> # for x86 Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Paul Moore <paul@paul-moore.com> Acked-by: Paul Burton <paul.burton@mips.com> # MIPS parts Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Acked-by: Kees Cook <keescook@chromium.org> # seccomp parts Acked-by: Mark Salter <msalter@redhat.com> # for the c6x bit Cc: Elvira Khabirova <lineprinter@altlinux.org> Cc: Eugene Syromyatnikov <esyr@redhat.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: x86@kernel.org Cc: linux-alpha@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-c6x-dev@linux-c6x.org Cc: uclinux-h8-devel@lists.sourceforge.jp Cc: linux-hexagon@vger.kernel.org Cc: linux-ia64@vger.kernel.org Cc: linux-m68k@lists.linux-m68k.org Cc: linux-mips@vger.kernel.org Cc: nios2-dev@lists.rocketboards.org Cc: openrisc@lists.librecores.org Cc: linux-parisc@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-riscv@lists.infradead.org Cc: linux-s390@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: linux-um@lists.infradead.org Cc: linux-xtensa@linux-xtensa.org Cc: linux-arch@vger.kernel.org Cc: linux-audit@redhat.com Signed-off-by: Dmitry V. Levin <ldv@altlinux.org> Signed-off-by: Paul Moore <paul@paul-moore.com>
2019-03-20arm64: dts: exynos: Add SlimSSS to Exynos5433Kamil Konieczny1-0/+9
Add DT node for SlimSSS (aka Slim SecuritySubSystem) in Exynos5433 SoC. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-03-20arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs of Exynos5433Andrzej Hajda1-10/+15
To support local paths both DECON and GSCALER should enable respective Smart Deck clocks DSD and GSD on Exynos5433. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-03-20arm64: dts: exynos: configure GSCALER related clocks on TM2Andrzej Hajda2-2/+10
GSCALER should be feed with clock at certain rates. Configure it on Exynos5433 based TM2 board. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>