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2019-02-21arm64: dts: Add the PCIE EP node in dtsXiaowei Bao1-1/+33
Add the PCIE EP node in dts for ls1046a. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Minghuan Lian <minghuan.lian@nxp.com> Reviewed-by: Zhiqiang Hou <zhiqiang.hou@nxp.com> Reviewed-by: Rob Herring <robh+dt@kernel.org>
2019-02-20Merge tag 'actions-arm64-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dtArnd Bergmann3-0/+121
Actions ARM64 DT changes for v5.1: - Add interrupt properties to S900 pinctrl node - Add Reset controller support for S700 - Add Reset controller support for S900 - Add pinctrl support for S700 - Add I2C support for S700 - Enable I2C0 and I2C1 for s700-cubieboard7 * tag 'actions-arm64-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: arm64: dts: actions: s700-cubieboard7: Enable I2C0 and I2C1 arm64: dts: actions: s700: Add I2C controller nodes arm64: dts: actions: Add pinctrl node for Actions Semi S700 arm64: dts: actions: Add Reset Controller support for S900 SoC arm64: dts: actions: Add Reset Controller support for S700 SoC arm64: dts: actions: Add interrupt properties to pinctrl node for S900 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-20dma-mapping: improve selection of dma_declare_coherent availabilityChristoph Hellwig1-1/+0
This API is primarily used through DT entries, but two architectures and two drivers call it directly. So instead of selecting the config symbol for random architectures pull it in implicitly for the actual users. Also rename the Kconfig option to describe the feature better. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paul.burton@mips.com> # MIPS Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-20arm64: Relax GIC version check during early bootVladimir Murzin1-2/+1
Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have values other than 0 or 1. At the moment, Linux is quite strict in the way it handles this field at early boot stage (cpufeature is fine) and will refuse to use the system register CPU interface if it doesn't find the value 1. Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3") Reported-by: Chase Conklin <Chase.Conklin@arm.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-02-20Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller13-46/+141
Two easily resolvable overlapping change conflicts, one in TCP and one in the eBPF verifier. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-19KVM: arm64: Fix comment for KVM_PHYS_SHIFTZenghui Yu1-1/+2
Since Suzuki K Poulose's work on Dynamic IPA support, KVM_PHYS_SHIFT will be used only when machine_type's bits[7:0] equal to 0 (by default). Thus the outdated comment should be fixed. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: Prefix header search paths with $(srctree)/Masahiro Yamada1-1/+1
Currently, the Kbuild core manipulates header search paths in a crazy way [1]. To fix this mess, I want all Makefiles to add explicit $(srctree)/ to the search paths in the srctree. Some Makefiles are already written in that way, but not all. The goal of this work is to make the notation consistent, and finally get rid of the gross hacks. Having whitespaces after -I does not matter since commit 48f6e3cf5bc6 ("kbuild: do not drop -I without parameter"). [1]: https://patchwork.kernel.org/patch/9632347/ Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: Remove -I. header search pathsMasahiro Yamada1-2/+0
The header search path -I. in kernel Makefiles is very suspicious; it allows the compiler to search for headers in the top of $(srctree), where obviously no header file exists. I was able to build without these extra header search paths. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19arm64: KVM: Describe data or unified caches as having 1 set and 1 wayArd Biesheuvel2-1/+17
On SMP ARM systems, cache maintenance by set/way should only ever be done in the context of onlining or offlining CPUs, which is typically done by bare metal firmware and never in a virtual machine. For this reason, we trap set/way cache maintenance operations and replace them with conditional flushing of the entire guest address space. Due to this trapping, the set/way arguments passed into the set/way ops are completely ignored, and thus irrelevant. This also means that the set/way geometry is equally irrelevant, and we can simply report it as 1 set and 1 way, so that legacy 32-bit ARM system software (i.e., the kind that only receives odd fixes) doesn't take a performance hit due to the trapping when iterating over the cachelines. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19arm64: KVM: Expose sanitised cache type register to guestArd Biesheuvel3-2/+61
We currently permit CPUs in the same system to deviate in the exact topology of the caches, and we subsequently hide this fact from user space by exposing a sanitised value of the cache type register CTR_EL0. However, guests running under KVM see the bare value of CTR_EL0, which could potentially result in issues with, e.g., JITs or other pieces of code that are sensitive to misreported cache line sizes. So let's start trapping cache ID instructions if there is a mismatch, and expose the sanitised version of CTR_EL0 to guests. Note that CTR_EL0 is treated as an invariant to KVM user space, so update that part as well. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: Move kvm_is_write_fault to header fileChristoffer Dall1-0/+8
Move this little function to the header files for arm/arm64 so other code can make use of it directly. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: consolidate arch timer trap handlersAndre Przywara2-40/+37
At the moment we have separate system register emulation handlers for each timer register. Actually they are quite similar, and we rely on kvm_arm_timer_[gs]et_reg() for the actual emulation anyways, so let's just merge all of those handlers into one function, which just marshalls the arguments and then hands off to a set of common accessors. This makes extending the emulation to include EL2 timers much easier. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Fixed 32-bit VM breakage and reduced to reworking existing code] Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> [Fixed 32bit host, general cleanup] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm64: Reuse sys_reg() macro when searching the trap tableMarc Zyngier1-13/+6
Instead of having an open-coded macro, reuse the sys_reg() macro that does the exact same thing (the encoding is slightly different, but the ordering property is the same). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19KVM: arm64: Fix ICH_ELRSR_EL2 sysreg namingMarc Zyngier1-1/+1
We previously incorrectly named the define for this system register. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19KVM: arm/arm64: Factor out VMID into struct kvm_vmidChristoffer Dall3-6/+16
In preparation for nested virtualization where we are going to have more than a single VMID per VM, let's factor out the VMID data into a separate VMID data structure and change the VMID allocator to operate on this new structure instead of using a struct kvm. This also means that udate_vttbr now becomes update_vmid, and that the vttbr itself is generated on the fly based on the stage 2 page table base address and the vmid. We cache the physical address of the pgd when allocating the pgd to avoid doing the calculation on every entry to the guest and to avoid calling into potentially non-hyp-mapped code from hyp/EL2. If we wanted to merge the VMID allocator with the arm64 ASID allocator at some point in the future, it should actually become easier to do that after this patch. Note that to avoid mapping the kvm_vmid_bits variable into hyp, we simply forego the masking of the vmid value in kvm_get_vttbr and rely on update_vmid to always assign a valid vmid value (within the supported range). Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> [maz: minor cleanups] Reviewed-by: Julien Thierry <julien.thierry@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19arm/arm64: KVM: Statically configure the host's view of MPIDRMarc Zyngier2-1/+8
We currently eagerly save/restore MPIDR. It turns out to be slightly pointless: - On the host, this value is known as soon as we're scheduled on a physical CPU - In the guest, this value cannot change, as it is set by KVM (and this is a read-only register) The result of the above is that we can perfectly avoid the eager saving of MPIDR_EL1, and only keep the restore. We just have to setup the host contexts appropriately at boot time. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19arm64: KVM: Drop VHE-specific HYP call stubMarc Zyngier2-15/+0
We now call VHE code directly, without going through any central dispatching function. Let's drop that code. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19arm64: KVM: Allow for direct call of HYP functions when using VHEMarc Zyngier1-2/+30
When running VHE, there is no need to jump via some stub to perform a "HYP" function call, as there is a single address space. Let's thus change kvm_call_hyp() and co to perform a direct call in this case. Although this results in a bit of code expansion, it allows the compiler to check for type compatibility, something that we are missing so far. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19arm/arm64: KVM: Introduce kvm_call_hyp_ret()Marc Zyngier2-1/+2
Until now, we haven't differentiated between HYP calls that have a return value and those who don't. As we're about to change this, introduce kvm_call_hyp_ret(), and change all call sites that actually make use of a return value. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19asm-generic: Make time32 syscall numbers optionalArnd Bergmann1-0/+1
We don't want new architectures to even provide the old 32-bit time_t based system calls any more, or define the syscall number macros. Add a new __ARCH_WANT_TIME32_SYSCALLS macro that gets enabled for all existing 32-bit architectures using the generic system call table, so we don't change any current behavior. Since this symbol is evaluated in user space as well, we cannot use a Kconfig CONFIG_* macro but have to define it in uapi/asm/unistd.h. On 64-bit architectures, the same system call numbers mostly refer to the system calls we want to keep, as they already pass 64-bit time_t. As new architectures no longer provide these, we need new exceptions in checksyscalls.sh. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-19arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signalBaruch Siach1-1/+1
The PHY reset signal goes to mpp43 on CP0. Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal") Reported-by: Denis Odintsov <oversun@me.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-02-19asm-generic: Drop getrlimit and setrlimit syscalls from default listYury Norov1-0/+1
The newer prlimit64 syscall provides all the functionality of getrlimit and setrlimit syscalls and adds the pid of target process, so future architectures won't need to include getrlimit and setrlimit. Therefore drop getrlimit and setrlimit syscalls from the generic syscall list unless __ARCH_WANT_SET_GET_RLIMIT is defined by the architecture's unistd.h prior to including asm-generic/unistd.h, and adjust all architectures using the generic syscall list to define it so that no in-tree architectures are affected. Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-hexagon@vger.kernel.org Cc: uclinux-h8-devel@lists.sourceforge.jp Signed-off-by: Yury Norov <ynorov@caviumnetworks.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Salter <msalter@redhat.com> [c6x] Acked-by: James Hogan <james.hogan@imgtec.com> [metag] Acked-by: Ley Foon Tan <lftan@altera.com> [nios2] Acked-by: Stafford Horne <shorne@gmail.com> [openrisc] Acked-by: Will Deacon <will.deacon@arm.com> [arm64] Acked-by: Vineet Gupta <vgupta@synopsys.com> #arch/arc bits Signed-off-by: Yury Norov <ynorov@marvell.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18arm64/neon: Disable -Wincompatible-pointer-types when building with ClangNathan Chancellor1-0/+4
After commit cc9f8349cb33 ("arm64: crypto: add NEON accelerated XOR implementation"), Clang builds for arm64 started failing with the following error message. arch/arm64/lib/xor-neon.c:58:28: error: incompatible pointer types assigning to 'const unsigned long *' from 'uint64_t *' (aka 'unsigned long long *') [-Werror,-Wincompatible-pointer-types] v3 = veorq_u64(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6)); ^~~~~~~~ /usr/lib/llvm-9/lib/clang/9.0.0/include/arm_neon.h:7538:47: note: expanded from macro 'vld1q_u64' __ret = (uint64x2_t) __builtin_neon_vld1q_v(__p0, 51); \ ^~~~ There has been quite a bit of debate and triage that has gone into figuring out what the proper fix is, viewable at the link below, which is still ongoing. Ard suggested disabling this warning with Clang with a pragma so no neon code will have this type of error. While this is not at all an ideal solution, this build error is the only thing preventing KernelCI from having successful arm64 defconfig and allmodconfig builds on linux-next. Getting continuous integration running is more important so new warnings/errors or boot failures can be caught and fixed quickly. Link: https://github.com/ClangBuiltLinux/linux/issues/283 Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-02-18arm64: fix SSBS sanitizationMark Rutland1-7/+8
In valid_user_regs() we treat SSBS as a RES0 bit, and consequently it is unexpectedly cleared when we restore a sigframe or fiddle with GPRs via ptrace. This patch fixes valid_user_regs() to account for this, updating the function to refer to the latest ARM ARM (ARM DDI 0487D.a). For AArch32 tasks, SSBS appears in bit 23 of SPSR_EL1, matching its position in the AArch32-native PSR format, and we don't need to translate it as we have to for DIT. There are no other bit assignments that we need to account for today. As the recent documentation describes the DIT bit, we can drop our comment regarding DIT. While removing SSBS from the RES0 masks, existing inconsistent whitespace is corrected. Fixes: d71be2b6c0e19180 ("arm64: cpufeature: Detect SSBS and advertise to userspace") Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-02-18arm64: dts: sprd: Remove wildcard compatible stringBaolin Wang1-7/+7
Remove wildcard compatible string. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18arm64: dts: sprd: Add SC27XX fuel gauge deviceBaolin Wang1-0/+18
Add Spreadtrum SC27XX fuel gauge device node to calculate the battery capacity. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18arm64: dts: sprd: Add SC2731 charger deviceBaolin Wang2-0/+22
Add charger device node and related battery node for SC2731 PMIC. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18arm64: dts: sprd: Add ADC calibration supportBaolin Wang1-0/+10
This patch adds phandles to the calibration cells provided by the Efuse device, which is used to calibrate the ADC channel scales. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18arm64: dts: sprd: Remove PMIC INTC irq trigger typeBaolin Wang1-4/+4
The Spreadtrum PMIC INTC controller has no registers to set trigger type, since it is always high level trigger as default. So remove its child devices' irq trigger type setting and change #interrupt-cells to 1. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18Merge tag 'v5.1-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dtArnd Bergmann4-40/+185
rockpro64 regulator improvements, rock960 improvements (tsadc, wifi, hdmi audio), nanopi4 bluetooth support and rk3328-roc-cc gmac improvement. * tag 'v5.1-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Enable tsadc device on rock960 arm64: dts: rockchip: Add on-board WiFi/BT support for Rock960 boards arm64: dts: rockchip: fix rk3328-roc-cc gmac2io stability issues arm64: dts: rockchip: rockpro64 dts add usb regulator arm64: dts: rockchip: rockpro64 dts remove unused lcd-reset pinmux arm64: dts: rockchip: rockpro64 dts make regulator more readable arm64: dts: rockchip: Add nanopi4 bluetooth arm64: dts: rockchip: enable mali power supply on rk3399-rockpro64 arm64: dts: rockchip: Enable HDMI audio devices on rk3399-rock960 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-17arm64: dts: rockchip: Enable tsadc device on rock960Ezequiel Garcia1-0/+7
Enable the thermal sensor. This device also provides temperature shutdown protection. The shutdown value is set at 110C, as tested by the vendor. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-02-17Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into develLinus Walleij40-82/+240
gpio updates for v5.1 - support for a new variant of pca953x - documentation fix from Wolfram - some tegra186 name changes - two minor fixes for madera and altera-a10sr
2019-02-17Merge branch 'efi-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds2-1/+11
Pull EFI fixes from Ingo Molnar: "This tree reverts a GICv3 commit (which was broken) and fixes it in another way, by adding a memblock build-time entries quirk for ARM64" * 'efi-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: efi/arm: Revert "Defer persistent reservations until after paging_init()" arm64, mm, efi: Account for GICv3 LPI tables in static memblock reserve table
2019-02-17Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds5-20/+101
Pull KVM fixes from Paolo Bonzini: "A somewhat bigger ARM update, and the usual smattering of x86 bug fixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: kvm: vmx: Fix entry number check for add_atomic_switch_msr() KVM: x86: Recompute PID.ON when clearing PID.SN KVM: nVMX: Restore a preemption timer consistency check x86/kvm/nVMX: read from MSR_IA32_VMX_PROCBASED_CTLS2 only when it is available KVM: arm64: Forbid kprobing of the VHE world-switch code KVM: arm64: Relax the restriction on using stage2 PUD huge mapping arm: KVM: Add missing kvm_stage2_has_pmd() helper KVM: arm/arm64: vgic: Always initialize the group of private IRQs arm/arm64: KVM: Don't panic on failure to properly reset system registers arm/arm64: KVM: Allow a VCPU to fully reset itself KVM: arm/arm64: Reset the VCPU without preemption and vcpu state loaded arm64: KVM: Don't generate UNDEF when LORegion feature is present KVM: arm/arm64: vgic: Make vgic_cpu->ap_list_lock a raw_spinlock KVM: arm/arm64: vgic: Make vgic_dist->lpi_list_lock a raw_spinlock KVM: arm/arm64: vgic: Make vgic_irq->irq_lock a raw_spinlock
2019-02-16efi/arm: Revert "Defer persistent reservations until after paging_init()"Ard Biesheuvel1-1/+0
This reverts commit eff896288872d687d9662000ec9ae11b6d61766f, which deferred the processing of persistent memory reservations to a point where the memory may have already been allocated and overwritten, defeating the purpose. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mike Rapoport <rppt@linux.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-efi@vger.kernel.org Link: http://lkml.kernel.org/r/20190215123333.21209-3-ard.biesheuvel@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-02-16arm64, mm, efi: Account for GICv3 LPI tables in static memblock reserve tableArd Biesheuvel1-0/+11
In the irqchip and EFI code, we have what basically amounts to a quirk to work around a peculiarity in the GICv3 architecture, which permits the system memory address of LPI tables to be programmable only once after a CPU reset. This means kexec kernels must use the same memory as the first kernel, and thus ensure that this memory has not been given out for other purposes by the time the ITS init code runs, which is not very early for secondary CPUs. On systems with many CPUs, these reservations could overflow the memblock reservation table, and this was addressed in commit: eff896288872 ("efi/arm: Defer persistent reservations until after paging_init()") However, this turns out to have made things worse, since the allocation of page tables and heap space for the resized memblock reservation table itself may overwrite the regions we are attempting to reserve, which may cause all kinds of corruption, also considering that the ITS will still be poking bits into that memory in response to incoming MSIs. So instead, let's grow the static memblock reservation table on such systems so it can accommodate these reservations at an earlier time. This will permit us to revert the above commit in a subsequent patch. [ mingo: Minor cleanups. ] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-efi@vger.kernel.org Link: http://lkml.kernel.org/r/20190215123333.21209-2-ard.biesheuvel@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-02-16arm64: dts: actions: s700-cubieboard7: Enable I2C0 and I2C1Parthiban Nallathambi1-0/+53
Add pinctrl definitions for Actions Semiconductor S700 I2C controllers. Pinctrl definitions are only available for I2C0, I2C1 and I2C2. Enable I2C0 (PMIC), I2C1 (gyro, touchscreen) in cubieboard7. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16arm64: dts: actions: s700: Add I2C controller nodesParthiban Nallathambi1-0/+40
Add I2C controller nodes for Actions Semiconductor S700 SoC. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16arm64: dts: actions: Add pinctrl node for Actions Semi S700Saravanan Sekar1-0/+16
Add pinctrl nodes for Actions Semi S700 SoC Signed-off-by: Parthiban Nallathambi <pn@denx.de> Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16arm64: dts: actions: Add Reset Controller support for S900 SoCManivannan Sadhasivam1-0/+2
Add reset controller property and bindings header for the Actions Semi S900 SoC DTS. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16arm64: dts: actions: Add Reset Controller support for S700 SoCManivannan Sadhasivam1-0/+2
Add reset controller property and bindings header for the Actions Semi S700 SoC DTS. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16arm64: dts: actions: Add interrupt properties to pinctrl node for S900Manivannan Sadhasivam1-0/+8
Add interrupt properties to pinctrl node for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-15Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller22-61/+58
The netfilter conflicts were rather simple overlapping changes. However, the cls_tcindex.c stuff was a bit more complex. On the 'net' side, Cong is fixing several races and memory leaks. Whilst on the 'net-next' side we have Vlad adding the rtnl-ness support. What I've decided to do, in order to resolve this, is revert the conversion over to using a workqueue that Cong did, bringing us back to pure RCU. I did it this way because I believe that either Cong's races don't apply with have Vlad did things, or Cong will have to implement the race fix slightly differently. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-15Merge tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dtArnd Bergmann2-39/+240
Qualcomm ARM64 Updates for v5.1 * Add thermal trip points to cpufreq * Add SDM845 IOMMU info for SDHC, USB, and WLAN * Fix MSM8916 clock cell argument * tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: sdm845: Fixup dependency on RPMPD includes arm64: dts: sdm845: Add clocks and iommus to WCN3990 WLAN node arm64: dts: qcom: sdm845: Define iommus for USB controllers arm64: dts: qcom: sdm845: Define IOMMU for sdhc 2 arm64: dts: sdm845: wireup the thermal trip points to cpufreq arm64: dts: msm8916: remove bogus argument to the cpu clock [arnd: I've pulled the earlier branch again after an update, this adds the stuff listed above, and fixes a build error from the missing dependency, as I requested] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixesArnd Bergmann1-2/+3
Amlogic SoC Kconfig updates for v5.1: - arm64: meson: enable g12a clock controller - drop unneeded COMMON_CLK_AMLOGIC * tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: meson: enable g12a clock controller ARM: meson: remove COMMON_CLK_AMLOGIC selection arm64: meson: remove COMMON_CLK_AMLOGIC selection Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'imx-soc-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixesArnd Bergmann1-0/+4
i.MX SoC changes for 5.1: - Support cpuidle for i.MX7ULP, states WFI, WAIT and STOP get added. - Support SoC revision detecting for i.MX7ULP by reading JTAG_ID register from SIM module. - Select PM and GPCv2 irqchip driver options for i.MX8 support, as they are essential for building an i.MX8 based system. - Skip build of ssi-fiq code if SND_SOC_IMX_PCM_FIQ is not enabled. * tag 'imx-soc-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: imx8mq: select PM support arm64: imx8mq: select GPCv2 irqchip driver ARM: imx: add i.MX7ULP SoC revision support ARM: imx: add i.MX7ULP cpuidle support ARM: imx: don't build ssi-fiq if not required Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'am654-for-v5.1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into HEADArnd Bergmann3-0/+174
AM654x SoC updates for v5.1 (part 2) Contains a few DT updates on top of part 1 of the pull: - MSMC RAM support (on-chip SRAM) - Main system control module support - USB support - ADC support There is an extra dt-binding update included, which has been acked by Rob. * tag 'am654-for-v5.1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-am65-mcu: Add ADC nodes dt-bindings: input: ti-tsc-adc: Add new compatible for AM654 SoCs arm64: dts: ti: k3-am654-base-board: enable USB1 arm64: dts: ti: k3-am6: add USB support arm64: dts: ti: am654: Add Main System Control Module node arm64: dts: ti: k3-am65: Add MSMC RAM node Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15arm64: dts: sdm845: Fixup dependency on RPMPD includesAndy Gross1-11/+10
This patch fixes a dependency issue with the RPMPD dt bindings. This temporarily removes the include file and adds hardcoded values for the OPPs until the other changes full land. This will be addressed in 5.2. Fixes: 5b6f186f0abb ("arm64: dts: sdm845: Add rpmh powercontroller node") Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-15Merge branch 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linuxCatalin Marinas1-1/+1
* 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux: perf: xgene: Remove set but not used variable 'config' arm64: perf: remove misleading comment dt-bindings: arm: Convert PMU binding to json-schema
2019-02-15Merge tag 'sunxi-config64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfigArnd Bergmann1-0/+3
Allwinner arm64 defconfig changes for 5.1 Two new additions to arm64's defconfig to support A64 boards. * tag 'sunxi-config64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: defconfig: Enable SUN6I Camera sensor interface arm64: defconfig: Enable I2C_GPIO Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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