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2018-11-18arm64: dts: qcom: qcs404: Add BAM DMA nodeVinod Koul1-0/+12
Add the BAM DMA instance found in BLSP1 node of the QCS404 Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: add prng-ee nodeVinod Koul1-0/+7
RNG hardware in QCS404 features (Execution Environment) EE for HLOS to use, add the node for prng-ee for QCS404. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add remoteproc nodesBjorn Andersson2-0/+105
Add the TrustZone based remoteproc nodes and their glink edges for adsp, cdsp and wcss. Enable them for EVB common DTS. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add scm firmware nodeBjorn Andersson1-0/+7
Add the scm firmware node to QCS404 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: pms405: add gpiosVinod Koul1-0/+19
Add the GPIOs present on PMS405 chip. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: pms405: add rtc nodeVinod Koul1-0/+6
RTC is found on PMIC PMS405 and is same as other PMIC used, so add the rtc node with compatible as qcom,pm8941-rtc Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: add spmi nodeVinod Koul2-0/+19
PMS405 is used in QCS405-EVB so include that with SPMI nodes Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: pms405: add spmi nodeVinod Koul1-0/+14
Add the pms405 DT file with spmi node. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add sdcc1 nodeBjorn Andersson2-0/+81
Add the sdcc1 node and enable it for the QCS404-EVB. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add TLMM pinctrl nodeBjorn Andersson1-0/+14
Add the QCS404 TLMM pinctrl node with its three tiles. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: add smp2p nodesVinod Koul1-0/+60
Add the smp2p-adsp, smp2p-cdsp and smp2p-wcss nodes found in QCS404. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add PMS405 RPM regulatorsBjorn Andersson1-0/+97
Add the RPM regulators found in PMS405 which is used in qcs404-evb Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add RPM GLINK related nodesBjorn Andersson1-0/+44
Add RPM GLINK node and the RPM message ram, hwspinlock, APCS apps global and smem nodes it depends on. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: Add reserved-memory regionsBjorn Andersson1-0/+41
Add the reserved memory regions in QCS404 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404-evb: add dts files for EVBsVinod Koul4-0/+38
QCS404 has two EVBs, EVB-1000 and EVB-4000. These boards are mostly similar with few differences in the peripherals used. So use a common qcs404-evb.dtsi which contains the common parts and use qcs404-evb-1000.dts and qcs404-evb-4000.dts for diffs Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-18arm64: dts: qcom: qcs404: add base dts filesVinod Koul1-0/+175
Add base dts files for QCS404 chipset along with cpu, timer, gcc and uart2 nodes. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-16arm64: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/Geert Uytterhoeven1-59/+0
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for Renesas SoCs, while other vendors have only a single Kconfig symbol. Increase consistency with other vendors by moving the SoC-specific Kconfig symbols to drivers/soc/renesas/Kconfig. Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by introducing a family-specific Kconfig symbol for R-Car Gen3 (ARCH_RCAR_GEN3), which enables family-specific hardware features. While so far only a single family (R-Car Gen3 and derivatives) of Renesas arm64 SoCs is supported by Linux, this will make it easier to add support for other SoC families later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16arm64: dts: zynqmp: Fix node names which contain "_"Michal Simek6-13/+13
s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-16arm64: dts: zynqmp: Add missing gpio-controller to ps gpioMichal Simek1-0/+1
Add missing gpio-controller property to ps gpio. This was found via DT schema validation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-15arm64: dts: meson-gx: add efuse pclkJerome Brunet2-0/+8
Add the required peripheral clock for the efuse device. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-15arm64: dts: sdm845: add prng-ee nodeVinod Koul1-0/+8
RNG hardware in SDM845 features (Execution Environment) EE for HLOS to use, add the node for prng-ee for sdm845. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-15arm64: dts: msm8996: add prng-ee nodeVinod Koul1-0/+7
RNG hardware in 8996 features (Execution Environment) EE for HLOS to use, add the node for prng-ee for msm8996. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-15arm64: dts: renesas: Add CPU capacity-dmips-mhzGaku Inami2-0/+14
Set the capacity-dmips-mhz for R-Car Gen3 SoCs, that is based on dhrystone. The average in 10 times of dhrystone result as follows: r8a7795 SoC (A57x4 + A53x4) CPU max-freq dhrystone --------------------------------- A57 1500 MHz 11470943 lps/s A53 1200 MHz 4798583 lps/s r8a7796 SoC (A57x2 + A53x4) CPU max-freq dhrystone --------------------------------- A57 1500 MHz 11463526 lps/s A53 1200 MHz 4793276 lps/s Based on above, capacity-dmips-mhz values are calculated as follows: r8a7795 SoC A57 : 1024 / (11470943 / 1500) * (11470943 / 1500) = 1024 A53 : 1024 / (11470943 / 1500) * ( 4798583 / 1200) = 535 r8a7796 SoC A57 : 1024 / (11463526 / 1500) * (11463526 / 1500) = 1024 A53 : 1024 / (11463526 / 1500) * ( 4793276 / 1200) = 535 However, since each CPUs have different max frequencies, the final CPU capacities of A53 are scaled by this difference, the values are as follows. [r8a7795 SoC] $ cat /sys/devices/system/cpu/cpu*/cpu_capacity 1024 <---- CPU capacity of A57 1024 1024 1024 428 <---- CPU capacity of A53 428 428 428 [r8a7796 SoC] $ cat /sys/devices/system/cpu/cpu*/cpu_capacity 1024 <---- CPU capacity of A57 1024 428 <---- CPU capacity of A53 428 428 428 Signed-off-by: Gaku Inami <gaku.inami.xh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-15arm64: dts: renesas: Add CPU topology on R-Car Gen3 SoCsGaku Inami2-0/+58
This patch adds the "cpu-map" into r8a7795/r8a7796 composed of multi-cluster. This definition is used to parse the cpu topology. Signed-off-by: Gaku Inami <gaku.inami.xh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-15arm64: renesas: Enable GPIOLIB to allow GPIO driver selectionTakeshi Kihara1-0/+1
The R-Car GPIO driver cannot be enabled when Renesas SoC's ARCH configs (ARCH_RENESAS, ARCH_R8A7795, ARCH_R8A7796 and ARCH_R8A77965) are enabled only. As GPIOs are a critical resource for proper operation on Renesas platforms, this patch selects GPIOLIB, just like is done for other SoC vendors, and on Renesas arm32 SoCs. Reported-by: Alexandru Gheorghe <Alexandru_Gheorghe@mentor.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Improve patch description] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-15efi/arm: Defer persistent reservations until after paging_init()Ard Biesheuvel1-0/+1
The new memory EFI reservation feature we introduced to allow memory reservations to persist across kexec may trigger an unbounded number of calls to memblock_reserve(). The memblock subsystem can deal with this fine, but not before memblock resizing is enabled, which we can only do after paging_init(), when the memory we reallocate the array into is actually mapped. So break out the memreserve table processing into a separate routine and call it after paging_init() on arm64. On ARM, because of limited reviewing bandwidth of the maintainer, we cannot currently fix this, so instead, disable the EFI persistent memreserve entirely on ARM so we can fix it later. Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-efi@vger.kernel.org Link: http://lkml.kernel.org/r/20181114175544.12860-5-ard.biesheuvel@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-11-15arm64: dts: allwinner: h6: enable USB2 on Pine H64Icenowy Zheng1-0/+27
Pine H64 board has both the USB2 OTG pins and the USB2 host pins on H6 SoC wired out to USB Type-A ports. Enable them. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-11-15arm64: dts: allwinner: h6: add USB Vbus regulator for Pine H64Icenowy Zheng1-0/+10
The 5V output of the USB ports on Pine H64 is controlled via a GPIO. Add the USB Vbus regulator device tree node. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-11-15arm64: dts: allwinner: h6: add USB2-related device nodesIcenowy Zheng1-0/+82
Allwinner H6 has two USB2 ports, one OTG and one host-only. Add device tree nodes related to them. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-11-14arm64: dts: qcom: pm8998: Add die temperature channel node to the ADCMatthias Kaehlcke1-0/+5
Add a channel node for the die temperature to the ADC. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14arm64: dts: sdm845: enable tsens thermal zonesAmit Kucheria1-0/+170
One thermal zone per cpu is defined Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14arm64: dts: msm8916: Add camera thermal zoneAmit Kucheria1-0/+21
Initialise the camera thermal zone to export temperature to userspace. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14arm64: dts: msm8916: Add gpu thermal zoneAmit Kucheria1-0/+20
Initialise the gpu thermal zone to export temperature to userspace. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14arm64: dts: msm8916: thermal: Add "qcom,sensors" propertyAmit Kucheria1-0/+1
This new property allows the number of sensors to be configured from DT instead of being hardcoded in platform data. Use it. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14arm64: dts: msm8916: thermal: split address space into twoAmit Kucheria1-2/+3
We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for msm8916 that has a similar register layout. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-13arm64: dts: exynos: Update DWC3 modules on Exynos5433 SoCsMarek Szyprowski1-6/+18
Update DWC3 hardware modules to Exynos5433 specific variant: change compatible name and add all required clocks (both to the glue node and DWC3 core node). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-11-13Merge branch 'next-for-4.21' of https://github.com/lyrazhang/linux into next/dtOlof Johansson2-142/+151
* 'next-for-4.21' of https://github.com/lyrazhang/linux: arm64: dts: sc9836/sc9860: Update coresight bindings for hardware ports Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-13arm64: dts: renesas: r8a774a1: Replace clock magic numbersFabrizio Castro1-19/+19
Now that include/dt-bindings/clock/r8a774a1-cpg-mssr.h is in Linus' master branch we can replace clock related magic numbers with the corresponding labels. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: corrected whitespace] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-13arm64: dts: renesas: r8a774a1: Replace power magic numbersFabrizio Castro1-100/+101
Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus' master branch we can replace power related magic numbers with the corresponding labels. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-13arm64: dts: rockchip: Fix PCIe reset polarity for rk3399-puma-haikou.Christoph Muellner1-1/+1
This patch fixes the wrong polarity setting for the PCIe host driver's pre-reset pin for rk3399-puma-haikou. Without this patch link training will most likely fail. Fixes: 60fd9f72ce8a ("arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM") Cc: stable@vger.kernel.org Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-13arm64: defconfig: Enable PWM_SUN4IJagan Teki1-0/+1
Allwinner PWM support need for ARM64 Allwinner SoC's which used pwms, builds it as module. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-13arm64: defconfig: Enable DRM_SUN8I_DW_HDMIJagan Teki1-0/+1
Allwinner DesignWare HDMI is needed for HDMI support in ARM64 Allwinner SoC's, build it as module. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-13arm64: defconfig: Enable DRM_SUN8I_MIXERJagan Teki1-0/+1
Allwinner Display Engine 2.0 Mixer is need for ARM64 Allwinner SoC's, build it as module. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-12Merge tag 'am654-fixes-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into fixesOlof Johansson1-1/+1
Texas Instruments AM65x fixes for v4.20 - Fix the wkup uart instance addresses to use proper cell sizes, otherwise the uart fails to probe. * tag 'am654-fixes-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-am654: Fix wakeup_uart reg address Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-12Merge tag 'qcom-fixes-for-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into fixesOlof Johansson2-0/+8
Qualcomm ARM64 DT Fixes for 4.20-rc1 * Fix reserved gpio ranges for SDM845 and MSM8998 * tag 'qcom-fixes-for-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: msm8998: Reserve gpio ranges on MTP arm64: dts: sdm845-mtp: Reserve reserved gpios Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-10Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds3-2/+10
Pull arm64 fixes from Catalin Marinas: - Fix occasional page fault during boot due to memblock resizing before the linear map is up. - Define NET_IP_ALIGN to 0 to improve the DMA performance on some platforms. - lib/raid6 test build fix. - .mailmap update for Punit Agrawal * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: memblock: don't permit memblock resizing until linear mapping is up arm64: mm: define NET_IP_ALIGN to 0 lib/raid6: Fix arm64 test build mailmap: Update email for Punit Agrawal
2018-11-09arm64: dts: qcom: msm8998: Reserve gpio ranges on MTPBjorn Andersson1-0/+4
GPIOs 0 through 3 and 81 through 84 are configured to not be accessible from the application CPUs. Mark them as reserved to allow the MSM8998 MTP to boot after the introduction of 3edfb7bd76bd ("gpiolib: Show correct direction from the beginning"). Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-09arm64: dts: sdm845-mtp: Reserve reserved gpiosBjorn Andersson1-0/+4
With the introduction of commit 3edfb7bd76bd ("gpiolib: Show correct direction from the beginning") the gpiolib will attempt to read the direction of all pins, which triggers a read from protected register regions. The pins 0 through 3 and 81 through 84 are protected, so mark these as reserved. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-09arm64: dts: ti: k3-am654: Fix wakeup_uart reg addressVignesh R1-1/+1
cbass_wakeup interconnect which is the parent of wakeup_uart node defines address-cells=1 and size-cells=1, therefore fix up reg property of wakeup_uart node accordingly. Otherwise, this UART instance fails to probe if enabled. Fixes: 4201af2544b3 ("arm64: dts: ti: am654: Add uart nodes") Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-11-08arm64: memblock: don't permit memblock resizing until linear mapping is upArd Biesheuvel2-2/+2
Bhupesh reports that having numerous memblock reservations at early boot may result in the following crash: Unable to handle kernel paging request at virtual address ffff80003ffe0000 ... Call trace: __memcpy+0x110/0x180 memblock_add_range+0x134/0x2e8 memblock_reserve+0x70/0xb8 memblock_alloc_base_nid+0x6c/0x88 __memblock_alloc_base+0x3c/0x4c memblock_alloc_base+0x28/0x4c memblock_alloc+0x2c/0x38 early_pgtable_alloc+0x20/0xb0 paging_init+0x28/0x7f8 This is caused by the fact that we permit memblock resizing before the linear mapping is up, and so the memblock_reserved() array is moved into memory that is not mapped yet. So let's ensure that this crash can no longer occur, by deferring to call to memblock_allow_resize() to after the linear mapping has been created. Reported-by: Bhupesh Sharma <bhsharma@redhat.com> Acked-by: Will Deacon <will.deacon@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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