aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64
AgeCommit message (Collapse)AuthorFilesLines
2022-09-14arm64: dts: qcom: pmi8994: add missing MPP compatible fallbackKrzysztof Kozlowski1-1/+1
Bindings require usage of generic MPP fallback in compatible: qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb: pmic@2: mpps@a000:compatible: ['qcom,pmi8994-mpp'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220908081050.29751-1-krzysztof.kozlowski@linaro.org
2022-09-14arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocksKrishna chaitanya chundru1-2/+6
Add missing aggre0, aggre1 clocks. Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1662626776-19636-2-git-send-email-quic_krichai@quicinc.com
2022-09-14arm64: defconfig: enable newer Qualcomm SoC sound driversKrzysztof Kozlowski1-0/+3
Enable sound support: 1. machine drivers for Qualcomm SC7180 and SC7280 SoCs, 2. Qualcomm ADSP Peripheral Image Loader used already on SC7280. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909105136.421877-1-krzysztof.kozlowski@linaro.org
2022-09-14arm64: dts: qcom: sc8280xp-x13s: Update firmware locationManivannan Sadhasivam1-2/+2
The firmware location in linux-firmware has been changed to include the SoC name. So use the updated location in Thinkpad devicetree. Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220914073922.7145-1-manivannan.sadhasivam@linaro.org
2022-09-14arm64: dts: mt7986: add built-in Wi-Fi device nodesPeter Chiu3-0/+101
This enables built-in 802.11ax Wi-Fi support. Reviewed-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> Link: https://lore.kernel.org/r/20220901130552.26234-1-chui-hao.chiu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-14arm64: dts: qcom: sc7280-villager: Adjust LTE SKUsDouglas Anderson6-336/+332
There have been a few changes since the patch ("arm64: dts: qcom: Add LTE SKUs for sc7280-villager family") * New firmware reports LTE boards as "SKU 512" now. Old firmware will still report "SKU 0", but that's all pre-production and everyone will update. * It's been relaized that no "-rev0" boards were ever built that were WiFi-only. Thus we don't two entries for -rev0. Adjust the organization a bit. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220829084732.2.I22e256d1ebac577a91fac44d1d12919be7111cd4@changeid
2022-09-14KVM: arm64: Treat 32bit ID registers as RAZ/WI on 64bit-only systemOliver Upton1-20/+43
One of the oddities of the architecture is that the AArch64 views of the AArch32 ID registers are UNKNOWN if AArch32 isn't implemented at any EL. Nonetheless, KVM exposes these registers to userspace for the sake of save/restore. It is possible that the UNKNOWN value could differ between systems, leading to a rejected write from userspace. Avoid the issue altogether by handling the AArch32 ID registers as RAZ/WI when on an AArch64-only system. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220913094441.3957645-7-oliver.upton@linux.dev
2022-09-14KVM: arm64: Add a visibility bit to ignore user writesOliver Upton2-0/+10
We're about to ignore writes to AArch32 ID registers on AArch64-only systems. Add a bit to indicate a register is handled as write ignore when accessed from userspace. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220913094441.3957645-6-oliver.upton@linux.dev
2022-09-14KVM: arm64: Spin off helper for calling visibility hookOliver Upton1-8/+11
No functional change intended. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220913094441.3957645-5-oliver.upton@linux.dev
2022-09-14KVM: arm64: Drop raz parameter from read_id_reg()Oliver Upton1-13/+6
There is no longer a need for caller-specified RAZ visibility. Hoist the call to sysreg_visible_as_raz() into read_id_reg() and drop the parameter. No functional change intended. Suggested-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220913094441.3957645-4-oliver.upton@linux.dev
2022-09-14KVM: arm64: Remove internal accessor helpers for id regsOliver Upton1-34/+12
The internal accessors are only ever called once. Dump out their contents in the caller. No functional change intended. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220913094441.3957645-3-oliver.upton@linux.dev
2022-09-14KVM: arm64: Use visibility hook to treat ID regs as RAZOliver Upton1-19/+14
The generic id reg accessors already handle RAZ registers by way of the visibility hook. Add a visibility hook that returns REG_RAZ unconditionally and throw out the RAZ specific accessors. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220913094441.3957645-2-oliver.upton@linux.dev
2022-09-14arm64: dts: rockchip: enable gamma control on RK3399Hugh Cole-Baker1-2/+2
Define the memory region on RK3399 VOPs containing the gamma LUT at base+0x2000. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Tested-by: Linus Heckemann <git@sphalerite.org> Link: https://lore.kernel.org/r/20211019215843.42718-4-sigmaris@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-14arm64: dts: rockchip: Enable video output on rk3566-roc-pcFurkan Kardame1-0/+52
Add the device tree nodes to enable video output on the Station M2. Enable the GPU and HDMI nodes and fix the GPU regulator range. Signed-off-by: Furkan Kardame <f.kardame@manjaro.org> Link: https://lore.kernel.org/r/20220627202208.45770-1-f.kardame@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-13arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hubMatthias Kaehlcke1-1/+20
Add nodes for the onboard USB hub on herobrine devices. Remove the 'always-on' property from the hub regulator, since the regulator is now managed by the onboard_usb_hub driver. This requires "CONFIG_USB_ONBOARD_HUB=y". Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220722093238.v24.2.I18481b296484eec47bdc292a31fa46fa8c655ca9@changeid
2022-09-13arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hubMatthias Kaehlcke5-37/+44
Add nodes for the onboard USB hub on trogdor devices. Remove the 'always-on' property from the hub regulator, since the regulator is now managed by the onboard_usb_hub driver. For anyone using trogdor-based devices on Linux, it should be noted that this requires "CONFIG_USB_ONBOARD_HUB=y". Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220722093238.v24.1.I7a1a6448d50bdd38e6082204a9818c59cc7a9bfd@changeid
2022-09-14arm64: dts: imx8mp-venice-gw74xx: fix port/phy validationTim Harvey1-0/+5
Since commit 65ac79e18120 ("net: dsa: microchip: add the phylink get_caps") the phy-mode must be set otherwise the switch driver will assume "NA" mode and invalidate the port. Fixes: 7899eb6cb15d ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-13arm64: dts: qcom: align SDHCI reg-names with DT schemaKrzysztof Kozlowski6-10/+10
DT schema requires SDHCI reg names to be hc/core without "_mem" suffix, just like TXT bindings were expecting before the conversion. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220712144245.17417-4-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8250: provide additional MSI interruptsDmitry Baryshkov1-2/+10
On SM8250 each group of MSI interrupts is mapped to the separate host interrupt. Describe each of interrupts in the device tree for PCIe0 host. Tested on Qualcomm RB5 platform with first group of MSI interrupts being used by the PME and attached ath11k WiFi chip using second group of MSI interrupts. Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220707134733.2436629-7-dmitry.baryshkov@linaro.org
2022-09-13arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY nodeDmitry Baryshkov1-2/+6
Add #clock-cells property to the HDMI PHY device node to let other nodes resolve the hdmipll clock. While we are at it, also add the XO clock to the device node. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220704161148.814510-4-dmitry.baryshkov@linaro.org
2022-09-13arm64: dts: qcom: Use WCD9335 DT bindingsYassine Oudjana3-6/+9
Replace DAI indices in codec nodes with definitions from the WCD9335 DT bindings for devices that use WCD9335. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220622161322.168017-4-y.oudjana@protonmail.com
2022-09-13arm64: dts: qcom: msm8994: switch TCSR mutex to MMIOKrzysztof Kozlowski1-9/+4
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'reg' is a required property qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-13-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIOKrzysztof Kozlowski1-9/+4
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-12-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: msm8996: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-9-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: qcs404: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-8-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: msm8953: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-7-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: ipq6018: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-6-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-namesKrzysztof Kozlowski1-2/+0
There are 174 GPIOs in SC7280. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-41-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schemaKrzysztof Kozlowski5-201/+201
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-40-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schemaKrzysztof Kozlowski2-82/+82
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-39-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schemaKrzysztof Kozlowski2-23/+23
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-38-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm8350-sagami: correct TS pin propertyKrzysztof Kozlowski1-1/+1
The pin configuration is selected with "pins", not "pin" property. Fixes: 1209e9246632 ("arm64: dts: qcom: sm8350-sagami: Enable and populate I2C/SPI nodes") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-37-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schemaKrzysztof Kozlowski1-7/+7
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-36-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schemaKrzysztof Kozlowski2-7/+7
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-35-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI busAngeloGioacchino Del Regno1-0/+42
All machines in the Cherry platform use MT6315 over SPMI: add the two instances, providing Vbcpu and Vgpu regulators. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220902081156.38526-8-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: mediatek: cherry: Enable Elantech eKTH3000 i2c trackpadAngeloGioacchino Del Regno1-0/+18
The Cherry platform uses an Elantech touchpad/trackpad: enable probing it at address 0x15 on I2C1. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220902081156.38526-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: mediatek: cherry: Enable secondary SD/MMC controllerAngeloGioacchino Del Regno1-0/+45
As of now, all of the boards based on the cherry platform have a usable secondary SD/MMC controller, usually for SD cards: enable it to allow both booting from it and generally accessing external storage. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: mediatek: cherry: Add keyboard mapping for the top rowAngeloGioacchino Del Regno1-0/+30
Chromebooks' embedded keyboards differ from standard layouts for the top row, as this one doesn't have the standard function keys but shortcuts instead: map these keys to achieve the functionality that is pictured on the printouts. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220902081156.38526-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: mediatek: cherry: Add Google Security Chip (GSC) TPMAngeloGioacchino Del Regno1-0/+15
Add support for the Cr50 Google Security Chip (GSC) found on this platform on I2C3 to support TPM and to also use it as an entropy source for the kernel. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: mediatek: cherry: Wire up the ChromeOS Embedded ControllerAngeloGioacchino Del Regno1-0/+77
Wire up the ChromeOS Embedded Controller on SPI0 and its communication channel via SCP RPMSG along with all of the offered functionality, including Keyboard, Smart Battery Metrics (SBS), keyboard backlight, I2C tunnel, regulators and Type-C connector management. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: mediatek: cherry: Enable the System Companion ProcessorAngeloGioacchino Del Regno1-0/+29
MT8195 features a SCP like some other older SoCs, and Cherry uses it for various tasks. Add the required pin configuration and DMA pool and enable the node. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-09-13arm64: dts: qcom: sc7280: Fix Dmic no sound on villager-r1Judy Hsiao1-0/+27
Fix the DMIC no sound issue of villager-r1 by using "PP1800_L2C" as the DMIC power source to match the hardware schematic. This patch: 1. set vdd-micb-supply to PP1800_L2C as the MIC Bias voltage regulator. 2. In audio-routing, set VA DMIC01~VA DMIC03 to use the vdd-micb-supply setting. Co-developed-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220826065621.2255795-1-judyhsiao@chromium.org
2022-09-13arm64: dts: qcom: sc7280: Add sound node for CRD 3.0/3.1Srinivasa Rao Mandadapu1-0/+101
Add dt nodes for sound card support on rev5+ (aka CRD 3.0/3.1) boards, which is using WCD9385 headset playback, capture, I2S speaker playback and DMICs via VA macro. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-13-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: Add sound node for CRD 1.0/2.0 and IDP boardsSrinivasa Rao Mandadapu2-0/+121
Add dt nodes for sound card support on revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards, which is using WCD9385 headset playback, capture, I2S speaker playback and DMICs via VA macro. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-12-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 3.0/3.1Srinivasa Rao Mandadapu1-0/+28
Enable lpass cpu node and add pin control and dai-links for audio on sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-11-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 1.0/2.0 and IDP boards.Srinivasa Rao Mandadapu1-0/+28
Enable lpass cpu node and add pin control and dai-links for audio on sc7280 based platforms of revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-10-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: Add lpass cpu nodeSrinivasa Rao Mandadapu1-0/+62
Add lpass cpu node for audio on sc7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-9-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: herobrine: Add max98360a codec nodeSrinivasa Rao Mandadapu1-0/+8
Add max98360a codec node for audio use case on all herobrine boards. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-8-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: Add max98360a codec for CRD 1.0/2.0 and IDP boardsSrinivasa Rao Mandadapu1-0/+14
Add max98360a codec node for audio use case on revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards. Add amp_en node for max98360a codec pin control. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-7-git-send-email-quic_srivasam@quicinc.com
2022-09-13arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1Srinivasa Rao Mandadapu2-0/+55
Add wcd9385 codec node for audio use case on CRD rev5+ (aka CRD 3.0/3.1) boards. Add tlmm gpio property for switching CTIA/OMTP Headset. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1657200184-29565-6-git-send-email-quic_srivasam@quicinc.com