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Fix PCIe address ranges that are affected by recent PCI changes.
There are 3 additional patches pending that handle the backward
compatiblity inside the PCI subsystem, but the address ranges
should be fixed anyway.
* tag 'v5.13-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory
Link: https://lore.kernel.org/r/3405741.0S5aU1g85B@diego
Signed-off-by: Olof Johansson <olof@lixom.net>
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Our usual bunch of patches to improve the Allwinner SoCs support,
mainly:
- I2S Support for the V3
- Audio Codec Support for the V3s
- DMA support for the V3s
- PWM support for the V3s
- Support for Bluetooth Audio on the pinephone
- Add A10-like timers to the A64 and R40
- New boards: Forlinx OKA40i-C, Forlinx OKA40i-C, NanoPi R1S H5
* tag 'sunxi-dt-for-5.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (29 commits)
ARM: dts: sun8i: v3s: enable emac for zero Dock
arm64: dts: allwinner: pinephone: Set audio card name
ARM: dts: sun8i: r40: Add timer node
ARM: dts: sun8i: V3: add I2S interface to V3 dts
dt-bindings: sound: sun4i-i2s: add Allwinner V3 I2S compatible
ARM: dts: sun8i: V3: add codec analog frontend to V3 dts
ASoC: dt-bindings: sun8i-a23-codec-analog: add compatible for Allwinner V3
ARM: dts: sun8i: v3s: add analog codec and frontend to v3s dts
ARM: dts: sun8i: v3s: add DMA properties to peripherals supporting DMA
ARM: dts: sun8i: v3s: add DMA controller to v3s dts
ARM: dts: sun8i: v3s: add pwm controller to v3s dts
dt-bindings: pwm: allwinner: add v3s pwm compatible
arm64: dts: allwinner: h5: Add NanoPi R1S H5 support
dt-bindings: arm: Add NanoPi R1S H5
arm64: dts: allwinner: pinephone: Add support for Bluetooth audio
arm64: dts: allwinner: a64: Allow multiple DAI links
arm64: dts: allwinner: a64: Add pinmux nodes for AIF2/AIF3
arm64: dts: allwinner: a64: Allow using multiple codec DAIs
ARM: dts: sun8i-a33: Allow using multiple codec DAIs
ASoC: dt-bindings: sun8i-codec: Increase #sound-dai-cells
...
Link: https://lore.kernel.org/r/96cc77ec-139d-4685-8a66-a60964cf39fd.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
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One patch to select one of our timer in the arm64 Kconfig option.
* tag 'sunxi-core-for-5.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: sunxi: Build the sun4i timer driver
Link: https://lore.kernel.org/r/bf3431f6-2196-425c-9b43-0bf4de0b6d30.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
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Two patches to fix the GMAC PHY mode on some boards.
* tag 'sunxi-fixes-for-5.13-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64-sopine-baseboard: change RGMII mode to TXID
ARM: dts: sun8i: h3: orangepi-plus: Fix ethernet phy-mode
Link: https://lore.kernel.org/r/ad7ba352-315c-4201-b922-4bf914a00d98.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
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- Delete MTK_PMIC_WRAP added twice.
- Set MMC_MTK as built-in to be able to boot from MMC device.
* tag 'v5.13-next-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: defconfig: Allow Mediatek boards to boot from the mmc
arm64: defconfig: Do not override the MTK_PMIC_WRAP symbol
Link: https://lore.kernel.org/r/ad6f7f4e-7e4d-08b9-8781-71bd78444929@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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mt8173:
- split hardware encoder block into two devices.
mt8167:
- add pm domains, multi-media system (mmsys), SMI, local arbiter
(larb) and IOMMU nodes.
mt8183:
- Add new chromebooks: HP Chromebook 11a, Acer Chromebook 311, HP
Chromebook x360 11MK G3 EE, Lenovo IdeaPad Flex 3.
- add power domain to SMI common node.
- add power supplies for EEPROM node.
* tag 'v5.13-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits)
arm64: dts: mt8183: Add node for the Mali GPU
arm64: dts: mt8183-kukui: Add tboard thermal zones
arm64: dts: mt8183: add cbas node under cros_ec
arm64: dts: mt8183: add supply name for eeprom
arm64: dts: mt8183: remove syscon from smi_common node
arm64: dts: mt8183: Add kukui-jacuzzi-fennel board
arm64: dts: mt8183: Add kukui-jacuzzi-kenzo board
arm64: dts: mt8183: Add kukui-jacuzzi-burnet board
arm64: dts: mt8183: Add kukui-jacuzzi-willow board
arm64: dts: mt8183: Add kukui-jacuzzi-kappa board
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-fennel
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kenzo
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-burnet
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-willow
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-kappa
arm64: dts: mediatek: mt8167: add iommu node
arm64: dts: mediatek: mt8167: add larb nodes
arm64: dts: mediatek: mt8167: add smi_common node
arm64: dts: mediatek: mt8167: add mmsys node
arm64: dts: mediatek: mt8167: add power domains
...
Link: https://lore.kernel.org/r/117d5eb5-bc99-70bb-a1a9-d7141fe96527@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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Renesas ARM DT updates for v5.14 (take two)
- External interrupt (INTC-EX) support for the R-Car M3-W+ SoC,
- Initial support for the new RZ/G2L SoC on the RZ/G2L SMARC EVK
board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.14-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r9a07g044: Add SYSC node
arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's
dt-bindings: clock: Add r9a07g044 CPG Clock Definitions
arm64: dts: renesas: r8a779a0: Drop power-domains property from GIC node
arm64: dts: renesas: r8a77961: Add INTC-EX device node
ARM: dts: silk: Configure pull-up for SOFT_SW GPIO keys
ARM: dts: gose: Configure pull-up for SOFT_SW GPIO keys
ARM: dts: blanche: Configure pull-up for SOFT_SW and SW25 GPIO keys
ARM: dts: lager: Configure pull-up for SOFT_SW GPIO keys
arm64: dts: renesas: r8a7796[01]: Fix OPP table entry voltages
arm64: dts: renesas: Add missing opp-suspend properties
Link: https://lore.kernel.org/r/cover.1623403796.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
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Renesas ARM defconfig updates for v5.14 (take two)
- Enable support for the new RZ/G2L SoC variants in the arm64
defconfig.
* tag 'renesas-arm-defconfig-for-v5.14-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable ARCH_R9A07G044
Link: https://lore.kernel.org/r/cover.1623403795.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
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ARMv8 Juno fix for v5.14
Just a single fix to use standard and generic nodes names for SCMI
power domain controller and clock controller devicetree nodes.
* tag 'juno-fix-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Update SCPI nodes as per the YAML schema
Link: https://lore.kernel.org/r/20210611075805.2813712-1-sudeep.holla@arm.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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This pull request contains Broadcom ARM64-based SoCs changes for 5.14,
please pull the following:
- Zhen fixes the Broadcom stingray serial node unit names to fix a DT
binding warning
* tag 'arm-soc/for-5.14/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: normalize the node name of the UART devices
Link: https://lore.kernel.org/r/20210610194836.309869-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.14, please pull the following:
- Rafal updates the BCM5301x, HR2, BCM63xx, BCM5301x, NSP and Cygnus DTS
files to resolve a number of DT binding check warnings pertaining to
NAND, pinmux, clocks, SPI
- Stefan provides a fix for an increase in the DWC2 controller's RX FIFO
causing regressions on the Raspberry Pi 4B
- Mateusz adds a BCM2711 specific VEC compatible string to allow keying
off that variant properly
- Stefan adds support for the Raspberry Pi 400 by doing some DTS/DTSI
re-organization work and finally adding the DTS file proper
* tag 'arm-soc/for-5.14/devicetree' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Add reference to RPi 400
ARM: dts: Add Raspberry Pi 400 support
ARM: dts: bcm283x: Fix up GPIO LED node names
dt-bindings: arm: bcm2835: Add Raspberry Pi 400 to DT schema
ARM: dts: Move BCM2711 RPi specific into separate dtsi
ARM: dts: bcm283x: Fix up MMC node names
ARM: boot: dts: bcm2711: Add BCM2711 VEC compatible
Revert "ARM: dts: bcm283x: increase dwc2's RX FIFO size"
ARM: dts: BCM5301X: Fixup SPI binding
dt-bindings: clock: brcm, iproc-clocks: convert to the json-schema
ARM: dts: BCM5301X: Fix pinmux subnodes names
ARM: dts: Hurricane 2: Fix NAND nodes names
ARM: dts: BCM63xx: Fix NAND nodes names
ARM: NSP: dts: fix NAND nodes names
ARM: Cygnus: dts: fix NAND nodes names
ARM: brcmstb: dts: fix NAND nodes names
ARM: dts: BCM5301X: Fix NAND nodes names
Link: https://lore.kernel.org/r/20210610194836.309869-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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Amlogic ARM64 DT changed for v5.14:
- set 128bytes FIFO size on uart A
- add Banana PI BPI-M5 board dts & bindings
- meson-sm1: add toacodec node to use internal audio DAC
- enable hdmi audio loopback on VIM3 board
* tag 'amlogic-arm64-dt-for-v5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: meson: set 128bytes FIFO size on uart A
arm64: dts: meson-sm1: add Banana PI BPI-M5 board dts
dt-bindings: arm: amlogic: add Banana PI M5 bindings
arm64: dts: meson-sm1: add toacodec node
arm64: dts: meson: vim3: enable hdmi audio loopback
Link: https://lore.kernel.org/r/bb207cf8-fc7a-3121-eea8-56618b5952aa@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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Renesas ARM defconfig updates for v5.14
- Refresh shmobile_defconfig for v5.13-rc1
- Enable R-Car USB2 clock selector support
* tag 'renesas-arm-defconfig-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable usb2_clksel for R-Car Gen3 and RZ/G2
ARM: shmobile: defconfig: Refresh for v5.13-rc1
Link: https://lore.kernel.org/r/cover.1622188834.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
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imx8mn evk board usb port does not support over current detection,
so disable it.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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imx8mm evk board usb1 port does not support over current detection,
so disable it.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Do not write the 'reg' of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported by reg.yaml.
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dt.yaml:
soc: pcie@3400000:reg:0: \
[0, 54525952, 0, 1048576, 64, 0, 0, 8192] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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enet_clk_ref actually is sourced from internal gpr clocks
which needs a default rate. Also update enet lpcg clock
output names to be more straightforward.
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This fixes multiple issues with the current non-existent PCIe clock setup:
The controller can run at up to 250MHz, so use a parent that provides this
clock.
The PHY needs an exact 100MHz reference clock to function if the PCIe
refclock is not fed in via the refclock pads. While this mode is not
supported (yet) in the driver it doesn't hurt to make sure we are
providing a clock with the right rate.
The AUX clock is specified to have a maximum clock rate of 10MHz. So
the current setup, which drives it straight from the 25MHz oscillator is
actually overclocking the AUX input.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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DMA addressing capabilities on i.MX8MN are limited by the interconnect,
same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let
the kernel know about this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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DMA addressing capabilities on i.MX8MM are limited by the interconnect,
same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let
the kernel know about this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Currently all PCIE windows point to bus address 0x0, which does not match
the values obtained from hardware during EA.
Replace those values with CPU addresses, since in reality we
have a 1:1 mapping between the two.
Signed-off-by: Kornel Duleba <mindal@semihalf.com>
Acked-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The PMIC throws an errors because the clock isn't assigned to it.
Fix this by assigning the clocks info.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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On LS2088A-RDB board, if the spi-fsl-dspi driver is built as module
then its probe fails with the following warning:
[ 10.471363] couldn't get idr
[ 10.471381] WARNING: CPU: 4 PID: 488 at drivers/spi/spi.c:2689 spi_register_controller+0x73c/0x8d0
...
[ 10.471651] fsl-dspi 2100000.spi: Problem registering DSPI ctlr
[ 10.471708] fsl-dspi: probe of 2100000.spi failed with error -16
Reason for the failure is that bus-num property is set for dspi node.
However, bus-num property is not set for the qspi node. If probe for
spi-fsl-qspi happens first then id 0 is dynamically allocated to it.
Call to spi_register_controller() from spi-fsl-dspi driver then fails.
Since commit 29d2daf2c33c ("spi: spi-fsl-dspi: Make bus-num property
optional") bus-num property is optional. Remove bus-num property from
dspi node to fix the issue.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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ls1012a-freeway board contains a M.2 2230 slot. Update the status of
pcei1 node to okay so that the pcie controller can be probed.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Enable EQOS ethernet on i.MX8MP EVK board.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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On i.MX8MP, there is no audio ipg clock, so remove the wrong reference
to this clock in dts file.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The i.MX8MM reference manual shows there are two spba busses.
SPBA1 handles much of the serial interfaces, and SPBA2 covers much
of the audio.
Add both of them.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The i.MX8MN has an SPBA bus which covers much of the audio, but
there is a second SPBA bus which covers many of the serial interfaces
like SPI and UARTs currently missing from the device tree. The reference
manual calls the bus handling the audio peripherals SPBA2, and the bus
handling the serial peripherals is called SPBA1.
Rename the existing spba bus to spba2 and add spba1.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support of the lt8912b in the DTB.
This adds the support of the DB_DSIHD daugther board from
Boundary Devices.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add the description for the USB host port.
This port is linked to a resettable USB HUB so handle
this reset signal with a GPIO hog.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add the description for the USB OTG port.
The OTG port uses a dedicated regulator for vbus.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The PCIe host bridge on RK3399 advertises a single 64-bit memory
address range even though it lies entirely below 4GB.
Previously the OF PCI range parser treated 64-bit ranges more
leniently (i.e., as 32-bit), but since commit 9d57e61bf723 ("of/pci:
Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses")
the code takes a stricter view and treats the ranges as advertised in
the device tree (i.e, as 64-bit).
The change in behaviour causes failure when allocating bus addresses
to devices connected behind a PCI-to-PCI bridge that require
non-prefetchable memory ranges. The allocation failure was observed
for certain Samsung NVMe drives connected to RockPro64 boards.
Update the host bridge window attributes to treat it as 32-bit address
memory. This fixes the allocation failure observed since commit
9d57e61bf723.
Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://lore.kernel.org/r/20210607112856.3499682-5-punitagrawal@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Putting the panel under the bridge chip (under the aux-bus node)
allows the panel driver to get access to the DP AUX bus, enabling all
sorts of fabulous new features.
While we're at this, get rid of a level of hierarchy for the panel
node. It doesn't need "ports / port" and can just have a "port" child.
For Linux, this patch has a hard requirement on the patches adding DP
AUX bus support to the ti-sn65dsi86 bridge chip driver. See the patch
("drm/bridge: ti-sn65dsi86: Add support for the DP AUX bus").
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210611101711.v10.11.Ibdb7735fb1844561b902252215a69526a14f9abd@changeid
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Lockstep mode is not supported here. So turn it off to avoid warnings
during startup.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/3a241e50-80a3-992a-2445-345c629d7895@siemens.com
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Host stage-2 optimisations from Quentin Perret
* kvm-arm64/mmu/reduce-vmemmap-overhead:
KVM: arm64: Use less bits for hyp_page refcount
KVM: arm64: Use less bits for hyp_page order
KVM: arm64: Remove hyp_pool pointer from struct hyp_page
KVM: arm64: Unify MMIO and mem host stage-2 pools
KVM: arm64: Remove list_head from hyp_page
KVM: arm64: Use refcount at hyp to check page availability
KVM: arm64: Move hyp_pool locking out of refcount helpers
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Scheduling a 32-bit application on a 64-bit-only CPU is a bad idea.
Ensure that 32-bit applications always take the slow-path when returning
to userspace on a system with mismatched support at EL0, so that we can
avoid trying to run on a 64-bit-only CPU and force a SIGKILL instead.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210608180313.11502-5-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
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If a vCPU is caught running 32-bit code on a system with mismatched
support at EL0, then we should kill it.
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210608180313.11502-4-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
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When confronted with a mixture of CPUs, some of which support 32-bit
applications and others which don't, we quite sensibly treat the system
as 64-bit only for userspace and prevent execve() of 32-bit binaries.
Unfortunately, some crazy folks have decided to build systems like this
with the intention of running 32-bit applications, so relax our
sanitisation logic to continue to advertise 32-bit support to userspace
on these systems and track the real 32-bit capable cores in a cpumask
instead. For now, the default behaviour remains but will be tied to
a command-line option in a later patch.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210608180313.11502-3-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
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In preparation for late initialisation of the "sanitised" AArch32 register
state, move the AArch32 registers out of 'struct cpuinfo' and into their
own struct definition.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210608180313.11502-2-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
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The hyp_page refcount is currently encoded on 4 bytes even though we
never need to count that many objects in a page. Make it 2 bytes to save
some space in the vmemmap.
As overflows are more likely to happen as well, make sure to catch those
with a BUG in the increment function.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-8-qperret@google.com
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The hyp_page order is currently encoded on 4 bytes even though it is
guaranteed to be smaller than this. Make it 2 bytes to reduce the hyp
vmemmap overhead.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-7-qperret@google.com
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Each struct hyp_page currently contains a pointer to a hyp_pool struct
where the page should be freed if its refcount reaches 0. However, this
information can always be inferred from the context in the EL2 code, so
drop the pointer to save a few bytes in the vmemmap.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-6-qperret@google.com
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We currently maintain two separate memory pools for the host stage-2,
one for pages used in the page-table when mapping memory regions, and
the other to map MMIO regions. The former is large enough to map all of
memory with page granularity and the latter can cover an arbitrary
portion of IPA space, but allows to 'recycle' pages.
However, this split makes accounting difficult to manage as pages at
intermediate levels of the page-table may be used to map both memory and
MMIO regions. Simplify the scheme by merging both pools into one. This
means we can now hit the -ENOMEM case in the memory abort path, but
we're still guaranteed forward-progress in the worst case by unmapping
MMIO regions. On the plus side this also means we can usually map a lot
more MMIO space at once if memory ranges happen to be mapped with block
mappings.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-5-qperret@google.com
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The list_head member of struct hyp_page is only needed when the page is
attached to a free-list, which by definition implies the page is free.
As such, nothing prevents us from using the page itself to store the
list_head, hence reducing the size of the vmemmap.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-4-qperret@google.com
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The hyp buddy allocator currently checks the struct hyp_page list node
to see if a page is available for allocation or not when trying to
coalesce memory. Now that decrementing the refcount and attaching to
the buddy tree is done in the same critical section, we can rely on the
refcount of the buddy page to be in sync, which allows to replace the
list node check by a refcount check. This will ease removing the list
node from struct hyp_page later on.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-3-qperret@google.com
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The hyp_page refcount helpers currently rely on the hyp_pool lock for
serialization. However, this means the refcounts can't be changed from
the buddy allocator core as it already holds the lock, which means pages
have to go through odd transient states.
For example, when a page is freed, its refcount is set to 0, and the
lock is transiently released before the page can be attached to a free
list in the buddy tree. This is currently harmless as the allocator
checks the list node of each page to see if it is available for
allocation or not, but it means the page refcount can't be trusted to
represent the state of the page even if the pool lock is held.
In order to fix this, remove the pool locking from the refcount helpers,
and move all the logic to the buddy allocator. This will simplify the
removal of the list node from struct hyp_page in a later patch.
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210608114518.748712-2-qperret@google.com
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Add the device tree node for the dual-SMMU found on Tegra194 and hook up
peripherals such as host1x, BPMP, HDA, SDMMC, EQOS and VIC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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On Tegra186 and later, the memory controller needs to be programmed in
coordination with any of the ARM SMMU instances to configure the stream
ID used for each memory client.
To support this, add a phandle reference to the memory controller to the
SMMU device tree node.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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