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2022-08-29arm64: dts: qcom: sm8150: split TCSR halt regs out of mutexKrzysztof Kozlowski1-1/+6
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-16-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm630: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'reg' is a required property qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-15-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm630: split TCSR halt regs out of mutexKrzysztof Kozlowski1-1/+6
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-14-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: qcs404: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-13-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sdm845-shift-axolotl.dtb: hwlock: 'reg' is a required property qcom/sdm845-shift-axolotl.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-12-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845: split TCSR halt regs out of mutexKrzysztof Kozlowski1-2/+7
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-11-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7280: split TCSR halt regs out of mutexKrzysztof Kozlowski1-7/+12
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. This also describes more accurately the devices and their IO address space, and allows to remove incorrect syscon compatible from TCSR mutex: qcom/sc7280-herobrine-crd.dtb: hwlock@1f40000: compatible: ['qcom,tcsr-mutex', 'syscon'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-10-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7180: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'reg' is a required property qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-9-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7180: split TCSR halt regs out of mutexKrzysztof Kozlowski1-4/+9
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-8-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7180: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-7-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8998: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8998-asus-novago-tp370ql.dtb: hwlock: 'reg' is a required property qcom/msm8998-asus-novago-tp370ql.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-6-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8998: split TCSR halt regs out of mutexKrzysztof Kozlowski1-2/+7
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-5-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8996: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8996-xiaomi-natrium.dtb: hwlock: 'reg' is a required property qcom/msm8996-xiaomi-natrium.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-4-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8996: split TCSR halt regs out of mutexKrzysztof Kozlowski1-4/+9
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-3-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845-xiaomi-polaris: Fix sde_dsi_active pinctrlGeert Uytterhoeven1-1/+1
"make dtbs_check" says: bias-disable: boolean property with value b'\x00\x00\x00\x00' Fix this by dropping the offending value. Fixes: be497abe19bf08fb ("arm64: dts: qcom: Add support for Xiaomi Mi Mix2s") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/629afd26008c2b1ba5822799ea7ea5b5271895e8.1660903997.git.geert+renesas@glider.be
2022-08-29arm64: dts: qcom: msm8916-samsung-a2015: Rename touchscreen analog regulatorLin, Meng-Bo3-5/+5
reg_vdd_tsp: regulator-vdd-tsp is actually used as an analog regulator for touchscreen on all of a2015 and e2015 devices. Rename it into reg_vdd_tsp_a: regulator-vdd-tsp-a to reduce confusion. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220724095438.14252-1-linmengbo0689@protonmail.com
2022-08-29arm64: dts: qcom: msm8916-samsung-e2015: Add touchkeyLin, Meng-Bo2-0/+30
On the Samsung Galaxy E5 and E7 the touch key is supplied by a single fixed regulator (enabled via GPIO 97) that supplies both MCU and LED. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220724095426.14189-1-linmengbo0689@protonmail.com
2022-08-29arm64: dts: qcom: msm8916-samsung-e2015: Add initial common dtsiLin, Meng-Bo5-0/+171
Samsung Galaxy E5, E7 and Grand Max are smartphones using the MSM8916 SoC released in 2015. e2015 and a2015 are similar, with some differences in accelerometer, MUIC and Vibrator. The common parts are shared in msm8916-samsung-a2015-common.dtsi to reduce duplication. Add a common device tree for with initial support for: - GPIO keys - GPIO LEDs for Grand Max - Regulator haptic - Hall sensor (except Grand Max) - SDHCI (internal and external storage) - USB Device Mode - UART (on USB connector via the SM5504 MUIC) - WCNSS (WiFi/BT) - Regulators - S3FWRN5 NFC (except Grand Max) The three devices (and all other variants of E5/E7/Grand Max released in 2015) are very similar, with some differences in display, touchscreen, sensors and NFC. The common parts are shared in msm8916-samsung-e2015-common.dtsi to reduce duplication. Unfortunately, some E5/E7/Grand Max were released with outdated 32-bit only firmware and never received any update from Samsung. Since the 32-bit TrustZone firmware is signed there seems to be no way currently to actually boot this device tree on arm64 Linux on those variants at the moment. However, it is possible to use this device tree by compiling an ARM32 kernel instead. The device tree can be easily built on ARM32 with an #include and it works really well there. To avoid confusion for others it is still better to add this device tree on arm64. Otherwise it's easy to forget to update this one when making some changes that affect all MSM8916 devices. Maybe someone finds a way to boot ARM64 Linux on those device at some point. In this case I expect that this device tree can be simply used as-is. Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220724095400.14081-1-linmengbo0689@protonmail.com
2022-08-29arm64: dts: qcom: Add SKU6 for sc7180-trogdor-pazquel-lte-paradeYunlong Jia1-1/+1
SKU6 is LTE(w/o eSIM)+WIFI+Parade Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220721033918.v3.1.I10519ca1bf88233702a90e296088808d18cdc7b1@changeid
2022-08-29arm64: dts: qcom: Add device tree for Sony Xperia 1 IVKonrad Dybcio2-0/+635
Add support for Sony Xperia 1 IV, a.k.a PDX223. This device is a part of the SoMC SM8450 Nagara platform and currently it is the only device based on that board, so no -common DTSI is created until (if?) other Nagara devices appear. This commit brings support for: * SD Card * USB (*including SuperSpeed*) * ADSP/CDSP/SLPI (modem remains untested for now) * Most regulators (some GPIO-enabled ones require PMIC GPIOs but trying to access any SPMI device crashes the device..) * Part of I2C-connected peripherals (notably no touch due to a driver bug) * PCIe0 (PCIe1 is unused) Do note display via simplefb is not supported, as the display is blanked upon exiting XBL. To create a working boot image, you need to run: cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm8450-sony-xperia-\ nagara-pdx223.dtb > .Image.gz-dtb mkbootimg \ --kernel .Image.gz-dtb \ --ramdisk some_initrd.img \ --pagesize 4096 \ --base 0x0 \ --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 \ --tags_offset 0x100 \ --cmdline "SOME_CMDLINE" \ --dtb_offset 0x1f00000 \ --header_version 1 \ --os_version 12 \ --os_patch_level 2022-06 \ # or newer -o boot.img-sony-xperia-pdx223 Then, you need to flash it on the device and get rid of all the vendor_boot/dtbo mess: // You have to either pull vbmeta{"","_system"} from // /dev/block/bootdevice/by-name/ or build one as a part of AOSP build process fastboot --disable-verity --disable-verification flash vbmeta vbmeta.img fastboot --disable-verity --disable-verification flash vbmeta_system \ vbmeta_system.img fastboot flash boot boot.img-sony-xperia-pdx223 fastboot erase vendor_boot fastboot erase recovery fastboot flash dtbo emptydtbo.img fastboot reboot Where emptydtbo.img is a tiny file that consists of 2 bytes (all zeroes), doing a "fastboot erase" won't cut it, the bootloader will go crazy and things will fall apart when it tries to overlay random bytes from an empty partition onto a perfectly good appended DTB. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220714123406.1919836-5-konrad.dybcio@somainline.org
2022-08-29arm64: dts: qcom: sm8450: Add SDHCI2Konrad Dybcio1-0/+59
Add and configure the SDHCI host responsible for (mostly) SD Card and its corresponding pins' sleep states. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220714123406.1919836-4-konrad.dybcio@somainline.org
2022-08-29arm64: dts: qcom: sm8450: Adjust memory mapKonrad Dybcio1-5/+10
Fix up the camera region (cross-referenced different vendors' msm-5.10 drops, 9f500000 is the default location for SM8450) and reserve the second chunk occupied by xbl_sc. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220714123406.1919836-3-konrad.dybcio@somainline.org
2022-08-29arm64: dts: qcom: msm8998: add MSM8998 SDCC specific compatibleKrzysztof Kozlowski1-1/+1
Add a MSM8998-specific SDCC compatible, because using only a generic qcom,sdhci-msm-v4 fallback is deprecated. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220714091042.22287-3-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8992-xiaomi-libra: split qcom,msm-id into tuplesKrzysztof Kozlowski1-1/+1
The qcom,msm-id is an uint32 matrix, so a list of tuples. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220705130300.100882-4-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8916: add clocks to the GCC device nodeDmitry Baryshkov1-0/+14
As we are converting this platform to use DT clock bindings, add clocks and clock-names properties to the MMCC device tree node. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220704172453.838303-8-dmitry.baryshkov@linaro.org
2022-08-29arm64: dts: qcom: sm6350: Add interconnect supportLuca Weiss1-0/+109
Add all the different NoC providers that are found in SM6350 and populate different nodes that use the interconnect properties. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220525144404.200390-6-luca.weiss@fairphone.com
2022-08-29arm64: dts: qcom: replace deprecated perst-gpio with perst-gpiosDmitry Baryshkov8-14/+14
Replace deprecated perst-gpio and wake-gpio properties with up-to-date perst-gpios and wake-gpios in the Qualcomm device trees. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220506152107.1527552-9-dmitry.baryshkov@linaro.org
2022-08-29arm64: dts: qcom: stop using snps,dw-pcie falbackDmitry Baryshkov2-4/+4
Qualcomm PCIe devices are not really compatible with the snps,dw-pcie. Unlike the generic IP core, they have special requirements regarding enabling clocks, toggling resets, using the PHY, etc. This is not to mention that platform snps-dw-pcie driver expects to find two IRQs declared, while Qualcomm platforms use just one. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220506152107.1527552-6-dmitry.baryshkov@linaro.org
2022-08-29arm64: dts: mt8192: Add dsi nodeAllen-KH Cheng1-0/+19
Add dsi node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-6-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mt8192: Add display nodesAllen-KH Cheng1-0/+146
Add display nodes and gce info for mt8192 SoC. GCE (Global Command Engine) properties to the display nodes in order to enable the usage of the CMDQ (Command Queue), which is required for operating the display. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-5-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mediatek: Add mmsys #reset-cells property for mt8192Allen-KH Cheng1-0/+2
To support reset of mmsys, we include mt8192-resets.h and add property of #reset-cells in mmsys. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-4-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mt8192: Add mipi_tx nodeAllen-KH Cheng1-0/+10
Add mipi_tx node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mt8192: Add pwm nodeAllen-KH Cheng1-0/+11
Add pwm node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: Add MediaTek MT8186 dts and evaluation board and MakefileAllen-KH Cheng3-0/+1040
MT8186 is a SoC based on 64bit ARMv8 architecture. It contains 6 CA55 and 2 CA76 cores. MT8186 share many HW IP with MT65xx series. We add basic chip support for MediaTek MT8186 on evaluation board. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Link: https://lore.kernel.org/r/20220825170448.17024-1-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: rockchip: specify pinctrl for i2c adapters on rock-3aMichael Riesch1-0/+12
On the Radxa ROCK3 Model A the I2C adapters related to the MIPI DSI connector and the M.2/NGFF connector use the non-default pins. Specify the correct pinctrl but leave the adapters disabled (as they are supposed to be activated by overlays that describe the external hardware). Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220712133204.2524942-3-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-08-29arm64: dts: rockchip: add vcc_mipi regulator to rock-3aMichael Riesch1-0/+22
The Radxa ROCK3 Model A features a voltage regulator that provides a 3V3 supply to the MIPI DSI connector. Add this regulator to the device tree of the board. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220712133204.2524942-2-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-08-29arm64: dts: rockchip: add vcc_cam regulator to rock-3aMichael Riesch1-0/+22
The Radxa ROCK3 Model A features a voltage regulator that provides a 3V3 supply to the MIPI CSI connector. Add this regulator to the device tree of the board. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220712133204.2524942-1-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-08-29Merge tag 'imx-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixesArnd Bergmann7-20/+23
i.MX fixes for 6.0: - Remove superfluous interrupt-names from imx8mq-tqma8mq RTC device to silence dtbs_check warning. - A few Verdin board fixes on CAN clock frequency, mcp251xfd interrupt, atmel_mxt_ts reset polarity and USB PHY. - Remove duplicated node and fix spi-flash compatible for imx6qdl-kontron-samx6i. - A couple of i.MX8M Plus DHCOM fixes from Marek Vasut on ECSPI1 pinmux and I2C5 GPIO assignment. - A couple of Venice fixes on SAI2 pin settings and phy-mode. - Drop in-band autoneg for 2500base-x phy-mode on ls1028a-qds-65bb board. - Revert the power device name setting change from imx8m-blk-ctrl driver, as it causes issue for sysfs cleanup path. - Fix gpcv2 driver to assert reset before ungating clock. * tag 'imx-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: freescale: verdin-imx8mp: fix atmel_mxt_ts reset polarity arm64: dts: freescale: verdin-imx8mm: fix atmel_mxt_ts reset polarity arm64: dts: imx8mp: Fix I2C5 GPIO assignment on i.MX8M Plus DHCOM arm64: dts: imx8mm-venice-gw7901: fix port/phy validation arm64: dts: verdin-imx8mm: add otg2 pd to usbphy soc: imx: gpcv2: Assert reset before ungating clock arm64: dts: ls1028a-qds-65bb: don't use in-band autoneg for 2500base-x ARM: dts: imx6qdl-kontron-samx6i: fix spi-flash compatible ARM: dts: imx6qdl-kontron-samx6i: remove duplicated node ARM: dts: imx6qdl-vicut1.dtsi: Fix node name backlight_led arm64: dts: imx8mq-tqma8mq: Remove superfluous interrupt-names arm64: dts: imx8mp: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOM arm64: dts: imx8mp-venice-gw74xx: fix sai2 pin settings arm64: dts: imx8mm-verdin: use level interrupt for mcp251xfd arm64: dts: imx8mm-verdin: update CAN clock to 40MHz Revert "soc: imx: imx8m-blk-ctrl: set power device name" Link: https://lore.kernel.org/r/20220823092631.GV149610@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-08-29arm64: defconfig: Drop ARM_CPUIDLE(generic idle driver) configSudeep Holla1-1/+0
Since commit 788961462f34 ("ARM: psci: cpuidle: Enable PSCI CPUidle driver") the generic ARM cpuidle driver probe no longer worked on ARM64. It was however left enabled with the driver failing to probe successfully. However the commit 51280acad855 ("cpuidle: cpuidle-arm: remove arm64 support") removed the Kconfig option so that it is no longer enabled for arm64 platforms. Drop the disabled/unavailable ARM_CPUIDLE from the defconfig. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20220822121604.2213778-1-sudeep.holla@arm.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-08-29arm64: dts: meson-sm1-sei610: Remove 'enable-active-low'Fabio Estevam1-1/+0
The 'enable-active-low' property is not a valid one. Only 'enable-active-high' is valid, and when this property is absent the gpio regulator will act as active low by default. Remove the invalid 'enable-active-low' property. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220827203813.1742715-2-festevam@denx.de
2022-08-29arm64: dts: meson-g12a: Remove 'enable-active-low'Fabio Estevam1-1/+0
The 'enable-active-low' property is not a valid one. Only 'enable-active-high' is valid, and when this property is absent the gpio regulator will act as active low by default. Remove the invalid 'enable-active-low' property. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220827203813.1742715-1-festevam@denx.de
2022-08-29arm64: dts: renesas: r8a774a1: Put I2C aliases to board filesWolfram Sang3-11/+16
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-7-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a774e1: Rename i2c_dvfs to iic_pmicGeert Uytterhoeven1-1/+1
As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to "iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware Rev. 1.00. See also commit a636d8037ef6028a ("arm64: dts: renesas: rzg2: Rename i2c_dvfs to iic_pmic"), which apparently forgot to update RZ/G2H. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7d60653d4d63904dc025a133297a53eb885fa064.1661525361.git.geert+renesas@glider.be
2022-08-29arm64: dts: renesas: r8a779a0: Put I2C aliases to board filesWolfram Sang2-10/+7
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a77990: Put I2C aliases to board filesWolfram Sang2-11/+8
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a77980: Put I2C aliases to board filesWolfram Sang3-9/+12
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-4-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a77970: Put I2C aliases to board filesWolfram Sang3-8/+10
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a779{51|60|65}: Put I2C aliases to board filesWolfram Sang5-33/+16
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: rzv2m evk: Enable i2cPhil Edworthy1-0/+27
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Link: https://lore.kernel.org/r/20220819193944.337599-4-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r9a09g011: Add i2c nodesPhil Edworthy1-0/+28
Add device nodes for the I2C controllers that are not assigned to the ISP. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Link: https://lore.kernel.org/r/20220819193944.337599-3-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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