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2022-08-22arm64: dts: renesas: r9a07g043: Fix audio clk node namesBiju Das1-2/+2
Replace the clk node names audio-clk{1,2} with audio{1,2}-clk as per the device tree specification. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220729084527.388023-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-22arm64: dts: renesas: r9a07g054: Add DMA support to RSPIBiju Das1-0/+6
Add DMA properties to RSPI nodes to support DMA operation. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220728122312.189766-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-22arm64: dts: renesas: r9a07g044: Add DMA support to RSPIBiju Das1-0/+6
Add DMA properties to RSPI nodes to support DMA operation. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220728122312.189766-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-22arm64: dts: renesas: r9a07g043: Add DMA support to RSPIBiju Das1-0/+6
Add DMA properties to RSPI nodes to support DMA operation. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220728122312.189766-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-22arm64: dts: renesas: r8a779f0: Add TMU nodesWolfram Sang1-0/+65
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220726210110.1444-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-22arm64: dts: freescale: verdin-imx8mp: fix atmel_mxt_ts reset polarityMarcel Ziswiler1-2/+2
Fix reset GPIO polarity in-line with the following commit feedaacdadfc ("Input: atmel_mxt_ts - fix up inverted RESET handler"). Fixes: a39ed23bdf6e ("arm64: dts: freescale: add initial support for verdin imx8m plus") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-22arm64: dts: freescale: verdin-imx8mm: fix atmel_mxt_ts reset polarityMarcel Ziswiler1-1/+1
Fix reset GPIO polarity in-line with the following commit feedaacdadfc ("Input: atmel_mxt_ts - fix up inverted RESET handler"). Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-22arm64: dts: imx8mp: Fix I2C5 GPIO assignment on i.MX8M Plus DHCOMMarek Vasut1-2/+2
Fix copy-paste error of the I2C5 bus recovery GPIO assignment, the I2C5 GPIOs are on gpio3 instead of gpio5. Fixes: 8d6712695bc8e ("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-22arm64: dts: imx8mm-venice-gw7901: fix port/phy validationTim Harvey1-0/+4
Since commit 65ac79e18120 ("net: dsa: microchip: add the phylink get_caps") the phy-mode must be set otherwise the switch driver will assume "NA" mode and invalidate the port. Fixes: 65ac79e18120 ("net: dsa: microchip: add the phylink get_caps") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-22arm64: dts: verdin-imx8mm: add otg2 pd to usbphyPhilippe Schenker1-0/+1
The Verdin iMX8M Mini System on Module does not have USB-ID signal connected on Verdin USB_2 (usbotg2). On Verdin Development board this is no problem, as we have connected a USB-Hub that is always connected. However, if Verdin USB_2 is desired to be used as a single USB-Host port the chipidea driver does not detect if a USB device is plugged into this port, due to runtime pm shutting down the PHY. Add the power-domain &pgc_otg2 to &usbphynop2 in order to detect plugging events and enumerate the usb device. Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini") Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-21arm64: dts: ls1028a-qds-65bb: don't use in-band autoneg for 2500base-xVladimir Oltean1-1/+0
The Lynx PCS integrated with ENETC port 0 does not support in-band autoneg for the 2500base-x SERDES protocol, and prints errors from its phylink methods. Furthermore, the AQR112 card used for these boards does not expect in-band autoneg either. So delete the extraneous property. Fixes: e426d63e752b ("arm64: dts: ls1028a-qds: add overlays for various serdes protocols") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-21arm64: dts: imx8mq-tqma8mq: Remove superfluous interrupt-namesAlexander Stein1-1/+0
This property was never needed, remove it. This also silences dtbs_check warnings. Fixes: b186b8b6e770 ("arm64: dts: freescale: add initial device tree for TQMa8Mx with i.MX8M") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-21arm64: dts: imx8mp: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOMMarek Vasut1-5/+5
The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly. Fixes: 8d6712695bc8e ("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-21arm64: dts: imx8mp-venice-gw74xx: fix sai2 pin settingsPeng Fan1-4/+4
The pad settings are missed, add them Fixes: 7899eb6cb15d ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-19Merge tag 'kvmarm-fixes-6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEADPaolo Bonzini5-7/+12
KVM/arm64 fixes for 6.0, take #1 - Fix unexpected sign extension of KVM_ARM_DEVICE_ID_MASK - Tidy-up handling of AArch32 on asymmetric systems
2022-08-19KVM: Rename mmu_notifier_* to mmu_invalidate_*Chao Peng1-4/+4
The motivation of this renaming is to make these variables and related helper functions less mmu_notifier bound and can also be used for non mmu_notifier based page invalidation. mmu_invalidate_* was chosen to better describe the purpose of 'invalidating' a page that those variables are used for. - mmu_notifier_seq/range_start/range_end are renamed to mmu_invalidate_seq/range_start/range_end. - mmu_notifier_retry{_hva} helper functions are renamed to mmu_invalidate_retry{_hva}. - mmu_notifier_count is renamed to mmu_invalidate_in_progress to avoid confusion with mn_active_invalidate_count. - While here, also update kvm_inc/dec_notifier_count() to kvm_mmu_invalidate_begin/end() to match the change for mmu_notifier_count. No functional change intended. Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Message-Id: <20220816125322.1110439-3-chao.p.peng@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-08-18arm64: defconfig: enable more Qualcomm driversKrzysztof Kozlowski1-0/+3
Enable Qualcomm drivers: 1. Last Level Cache Controller (many platforms supported). 2. On Chip Memory - OCMEM (used in MSM8992 and MSM8994) 3. Subsystem Power Manager - SPM (used in MSM8916 and SDM660). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220727065830.10681-4-krzysztof.kozlowski@linaro.org
2022-08-17arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: add alternate touchpadJohan Hovold1-0/+16
Add support for the alternate (second-source) touchpad found on some X13s laptops. Note that alternate touchpad is kept disabled for now. The boot firmware should determine which device is actually populated and enable only the corresponding node. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-8-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: mark HID wakeup sourcesJohan Hovold1-0/+4
The touchpad and keyboard can wake the system from suspend so declare them as wakeup sources. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-7-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: move HID pin configJohan Hovold1-2/+14
The HID pin configurations belong in the HID nodes rather than i2c bus node. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-6-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: disable touchscreen pull-upJohan Hovold1-1/+1
The (optional) touchscreen interrupt line has an external pull-up so disable the internal one as is done for the keyboard and touchpad. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-5-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sc8280xp-crd: mark HID wakeup sourcesJohan Hovold1-0/+4
The touchpad and keyboard can wake the system from suspend so declare them as wakeup sources. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-4-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sc8280xp-crd: move HID pin configJohan Hovold1-2/+14
The HID pin configurations belong in the HID nodes rather than i2c bus node. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-3-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sc8280xp-crd: disable touchscreen pull-upJohan Hovold1-1/+1
The touchscreen interrupt line has an external pull-up so disable the internal one as is done for the keyboard and touchpad. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805092317.4985-2-johan+linaro@kernel.org
2022-08-17arm64: dts: qcom: sdm845: add LLCC BWMONKrzysztof Kozlowski1-0/+37
The SDM845 comes with few instances of Bandwidth Monitor. The already supported one monitors traffic between CPU and Last Level Cache Controller (LLCC) and in downstream sources is called BWMON v4 (or v4 of register layout). SDM845 also has also BWMON instance measuring traffic between LLCC and memory with different register layout: called v5. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-12-krzysztof.kozlowski@linaro.org
2022-08-17arm64: dts: qcom: sdm845: narrow LLCC address spaceKrzysztof Kozlowski1-1/+1
The Last Level Cache Controller (LLCC) device does not need to access entire LLCC address space. Currently driver uses only hardware info and status registers which both reside in LLCC0_COMMON range (offset 0x30000, size 0x1000). Narrow the address space to allow binding other drivers to rest of LLCC address space. Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: Sibi Sankar <quic_sibis@quicinc.com> Reported-by: Steev Klimaszewski <steev@kali.org> Suggested-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@linaro.org
2022-08-17arm64: adjust KASLR relocation after ARCH_RANDOM removalLukas Bulwahn1-5/+3
Commit aacd149b6238 ("arm64: head: avoid relocating the kernel twice for KASLR") adds the new file arch/arm64/kernel/pi/kaslr_early.c with a small code part guarded by '#ifdef CONFIG_ARCH_RANDOM'. Concurrently, commit 9592eef7c16e ("random: remove CONFIG_ARCH_RANDOM") removes the config CONFIG_ARCH_RANDOM and turns all '#ifdef CONFIG_ARCH_RANDOM' code parts into unconditional code parts, which is generally safe to do. Remove a needless ifdef guard after the ARCH_RANDOM removal. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20220721100433.18286-1-lukas.bulwahn@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2022-08-17arm64: Fix match_list for erratum 1286807 on Arm Cortex-A76Zenghui Yu1-0/+2
Since commit 51f559d66527 ("arm64: Enable repeat tlbi workaround on KRYO4XX gold CPUs"), we failed to detect erratum 1286807 on Cortex-A76 because its entry in arm64_repeat_tlbi_list[] was accidently corrupted by this commit. Fix this issue by creating a separate entry for Kryo4xx Gold. Fixes: 51f559d66527 ("arm64: Enable repeat tlbi workaround on KRYO4XX gold CPUs") Cc: Shreyas K K <quic_shrekk@quicinc.com> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220809043848.969-1-yuzenghui@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
2022-08-17KVM: arm64: Reject 32bit user PSTATE on asymmetric systemsOliver Upton1-1/+1
KVM does not support AArch32 EL0 on asymmetric systems. To that end, prevent userspace from configuring a vCPU in such a state through setting PSTATE. It is already ABI that KVM rejects such a write on a system where AArch32 EL0 is unsupported. Though the kernel's definition of a 32bit system changed in commit 2122a833316f ("arm64: Allow mismatched 32-bit EL0 support"), KVM's did not. Fixes: 2122a833316f ("arm64: Allow mismatched 32-bit EL0 support") Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220816192554.1455559-3-oliver.upton@linux.dev
2022-08-17KVM: arm64: Treat PMCR_EL1.LC as RES1 on asymmetric systemsOliver Upton3-4/+7
KVM does not support AArch32 on asymmetric systems. To that end, enforce AArch64-only behavior on PMCR_EL1.LC when on an asymmetric system. Fixes: 2122a833316f ("arm64: Allow mismatched 32-bit EL0 support") Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220816192554.1455559-2-oliver.upton@linux.dev
2022-08-17arm64: dts: imx8mm-verdin: use level interrupt for mcp251xfdAndrejs Cainikovs1-1/+1
Switch to level interrupt for mcp251xfd. This will make sure no interrupts are lost. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reported-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-17arm64: dts: imx8mm-verdin: update CAN clock to 40MHzAndrejs Cainikovs1-3/+3
Update SPI CAN controller clock to match current hardware design. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-08-16arm64: dts: meson-axg: add support for JetHub D1p (j110)Vyacheslav Bocharov5-334/+421
- add support for JetHome JetHub D1p (https://jethome.ru/d1p) is a home automation controller with the following features: - DIN Rail Mounting - Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz - no video out - 1/2/4GB LPDDR4 - 8/16/32GB eMMC flash - 1 x USB 2.0 - 1 x 10/100Mbps ethernet - WiFi / Bluetooth Realtek 8822CS or similar IEEE 802.11a/b/g/n/ac - TI CC2652P1 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. - 2 x gpio LEDS - GPIO user Button - 1 x 1-Wire - 2 x RS-485 - 4 x dry contact digital GPIO inputs - 3 x relay GPIO outputs - DC source with a voltage of 9 to 56 V / Active POE - unify device tree files for JetHub D1/D1p devices Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220811103113.3097868-2-adeep@lexina.in
2022-08-16arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for ETH{0/1}Lad Prabhakar1-2/+9
The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ3 for ETH0 and ETH1 respectively. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220722151155.21100-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-16arm64: dts: renesas: Add Renesas R8A779MB SoC supportGeert Uytterhoeven1-0/+12
Add support for the Renesas R-Car H3Ne-1.7G (R8A779MB) SoC, which is a different grading of the R-Car H3-N (R8A77951) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/862a5eecc850cbb90af86a56513b644b638fb62b.1656072871.git.geert+renesas@glider.be
2022-08-15arm64: defconfig: remove BCM4908William Zhang1-1/+0
Remove CONFIG_ARCH_BCM4908. It is supported under CONFIG_ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-10-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCAWilliam Zhang1-9/+1
Delete ARCH_BCM4908 platform Kconfig for BCM4908 SoC as it is replaced by ARCH_BCMBCA and move its selection to ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-8-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: Add BCM4908 generic board dtsWilliam Zhang2-0/+31
Add generic bare bone bcm94908.dts file to support any 4908 based design. It supports cpu subsystem, memory and an uart console. This can be useful for board bring-up and cpu subsystem and memory related kernel test as well. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-6-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: Move BCM4908 dts to bcmbca folderWilliam Zhang9-6/+4
As part of ARCH_BCM4908 to ARCH_BCMBCA migration, move the BCM4908 dts files to bcmbca folder and use CONFIG_ARCH_BCMBCA to build all the BCM4908 board dts. Delete bcm4908 folder and its makefile as well. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-5-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: bcmbca: update BCM4908 board dts filesWilliam Zhang4-4/+4
Append "brcm,bcmbca" to compatible strings based on the new bcmbca binding rule for BCM4908 family based boards. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220803175455.47638-4-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDsRafał Miłecki1-0/+48
There are 5 software-controllable LEDs on PCB. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220718132100.13277-3-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: broadcom: bcm4908: add LEDs controller blockRafał Miłecki1-0/+8
BCM4908 includes LEDs controller that supports multiple brightness levels & hardware blinking. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220718132100.13277-2-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: broadcom: bcm4908: add remaining LED pinsRafał Miłecki1-0/+75
Include all 32 pins. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220718132100.13277-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: juno: Add missing MHU secure-irqJassi Brar1-1/+2
The MHU secure interrupt exists physically but is missing in the DT node. Specify the interrupt in DT node to fix a warning on Arm Juno board: mhu@2b1f0000: interrupts: [[0, 36, 4], [0, 35, 4]] is too short Link: https://lore.kernel.org/r/20220801141005.599258-1-jassisinghbrar@gmail.com Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-08-15arm64: dts: arm: juno: Remove legacy Coresight 'slave-mode' propertyRob Herring1-2/+0
The 'slave-mode' property is not valid under 'in-ports' as it was the legacy way to find input ports. Warnings are generated from the Coresight schema: arch/arm64/boot/dts/arm/juno-r1.dtb: funnel@20150000: in-ports:port@0:endpoint: Unevaluated properties are not allowed ('slave-mode' was unexpected) From schema: Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml Link: https://lore.kernel.org/r/20220721212952.1984382-1-robh@kernel.org Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-08-15arm64: dts: renesas: r9a07g054: Update pinctrl node to handle GPIO interruptsLad Prabhakar1-0/+4
Add required properties in pinctrl node to handle GPIO interrupts. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220718195651.7711-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-15arm64: dts: renesas: r9a07g054: Add IRQC nodeLad Prabhakar1-0/+55
Add IRQC node to R9A07G054 (RZ/V2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220718195651.7711-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-15arm64: dts: renesas: r9a07g044: Update pinctrl node to handle GPIO interruptsLad Prabhakar1-0/+4
Add required properties in pinctrl node to handle GPIO interrupts. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220718195651.7711-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-15arm64: dts: renesas: r9a07g044: Add IRQC nodeLad Prabhakar1-0/+55
Add IRQC node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220718195651.7711-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-15arm64: dts: renesas: r8a779f0: Add CMT supportWolfram Sang1-0/+70
This patch adds CMT{0|1|2|3} device nodes for R-Car S4-8 (r8a779f0) SoC. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220713101447.3804-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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