aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
AgeCommit message (Collapse)AuthorFilesLines
2019-02-19KVM: arm/arm64: Prefix header search paths with $(srctree)/Masahiro Yamada1-1/+1
Currently, the Kbuild core manipulates header search paths in a crazy way [1]. To fix this mess, I want all Makefiles to add explicit $(srctree)/ to the search paths in the srctree. Some Makefiles are already written in that way, but not all. The goal of this work is to make the notation consistent, and finally get rid of the gross hacks. Having whitespaces after -I does not matter since commit 48f6e3cf5bc6 ("kbuild: do not drop -I without parameter"). [1]: https://patchwork.kernel.org/patch/9632347/ Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: Remove -I. header search pathsMasahiro Yamada1-2/+1
The header search path -I. in kernel Makefiles is very suspicious; it allows the compiler to search for headers in the top of $(srctree), where obviously no header file exists. I was able to build without these extra header search paths. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: Move kvm_is_write_fault to header fileChristoffer Dall1-0/+8
Move this little function to the header files for arm/arm64 so other code can make use of it directly. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm/arm64: arch_timer: Assign the phys timer on VHE systemsChristoffer Dall1-0/+4
VHE systems don't have to emulate the physical timer, we can simply assign the EL1 physical timer directly to the VM as the host always uses the EL2 timers. In order to minimize the amount of cruft, AArch32 gets definitions for the physical timer too, but is should be generally unused on this architecture. Co-written with Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19KVM: arm/arm64: consolidate arch timer trap handlersAndre Przywara1-9/+14
At the moment we have separate system register emulation handlers for each timer register. Actually they are quite similar, and we rely on kvm_arm_timer_[gs]et_reg() for the actual emulation anyways, so let's just merge all of those handlers into one function, which just marshalls the arguments and then hands off to a set of common accessors. This makes extending the emulation to include EL2 timers much easier. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Fixed 32-bit VM breakage and reduced to reworking existing code] Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> [Fixed 32bit host, general cleanup] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19KVM: arm64: Fix ICH_ELRSR_EL2 sysreg namingMarc Zyngier1-2/+2
We previously incorrectly named the define for this system register. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19KVM: arm/arm64: Factor out VMID into struct kvm_vmidChristoffer Dall4-10/+18
In preparation for nested virtualization where we are going to have more than a single VMID per VM, let's factor out the VMID data into a separate VMID data structure and change the VMID allocator to operate on this new structure instead of using a struct kvm. This also means that udate_vttbr now becomes update_vmid, and that the vttbr itself is generated on the fly based on the stage 2 page table base address and the vmid. We cache the physical address of the pgd when allocating the pgd to avoid doing the calculation on every entry to the guest and to avoid calling into potentially non-hyp-mapped code from hyp/EL2. If we wanted to merge the VMID allocator with the arm64 ASID allocator at some point in the future, it should actually become easier to do that after this patch. Note that to avoid mapping the kvm_vmid_bits variable into hyp, we simply forego the masking of the vmid value in kvm_get_vttbr and rely on update_vmid to always assign a valid vmid value (within the supported range). Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> [maz: minor cleanups] Reviewed-by: Julien Thierry <julien.thierry@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19arm/arm64: KVM: Statically configure the host's view of MPIDRMarc Zyngier2-1/+8
We currently eagerly save/restore MPIDR. It turns out to be slightly pointless: - On the host, this value is known as soon as we're scheduled on a physical CPU - In the guest, this value cannot change, as it is set by KVM (and this is a read-only register) The result of the above is that we can perfectly avoid the eager saving of MPIDR_EL1, and only keep the restore. We just have to setup the host contexts appropriately at boot time. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19ARM: KVM: Teach some form of type-safety to kvm_call_hypMarc Zyngier3-6/+31
Just like on arm64, and for the same reasons, kvm_call_hyp removes any form of type safety when calling into HYP. But we can still try to tell the compiler what we're trying to achieve. Here, we can add code that would do the function call if it wasn't guarded by an always-false predicate. Hopefully, the compiler is dumb enough to do the type checking and clever enough to not emit the corresponding code... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19arm/arm64: KVM: Introduce kvm_call_hyp_ret()Marc Zyngier1-0/+3
Until now, we haven't differentiated between HYP calls that have a return value and those who don't. As we're about to change this, introduce kvm_call_hyp_ret(), and change all call sites that actually make use of a return value. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19Merge branch 'am335x-phy-fixes' into omap-for-v5.0/fixes-v2Tony Lindgren2-3/+3
2019-02-19ARM: dts: am335x-evm: Fix PHY mode for ethernetPeter Ujfalusi1-1/+1
The PHY must add both tx and rx delay and not only on the tx clock. The board uses AR8031_AL1A PHY where the rx delay is enabled by default, the tx dealy is disabled. The reason why rgmii-txid worked because the rx delay was not disabled by the driver so essentially we ended up with rgmii-id PHY mode. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-02-19ARM: dts: am335x-evmsk: Fix PHY mode for ethernetPeter Ujfalusi1-2/+2
The PHY must add both tx and rx delay and not only on the tx clock. The board uses AR8031_AL1A PHY where the rx delay is enabled by default, the tx dealy is disabled. The reason why rgmii-txid worked because the rx delay was not disabled by the driver so essentially we ended up with rgmii-id PHY mode. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-02-19ARM: dts: armada-xp: fix Armada XP boards NAND descriptionThomas Petazzoni3-60/+68
Commit 3b79919946cd2cf4dac47842afc9a893acec4ed7 ("ARM: dts: armada-370-xp: update NAND node with new bindings") updated some Marvell Armada DT description to use the new NAND controller bindings, but did it incorrectly for a number of boards: armada-xp-gp, armada-xp-db and armada-xp-lenovo-ix4-300d. Due to this, the NAND is no longer detected on those platforms. This commit fixes that by properly using the new NAND DT binding. This commit was runtime-tested on Armada XP GP, the two other platforms are only compile-tested. Fixes: 3b79919946cd2 ("ARM: dts: armada-370-xp: update NAND node with new bindings") Cc: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-02-19ARM: davinci: remove intc related fields from davinci_soc_infoBartosz Golaszewski7-221/+0
The fields related to the two davinci interrupt controllers are no longer used. Remove them. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19irqchip: davinci-cp-intc: move the driver to drivers/irqchipBartosz Golaszewski3-268/+2
The cp-intc driver has now been cleaned up. Move it to drivers/irqchip where it belongs. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: remove redundant commentsBartosz Golaszewski1-3/+0
We don't need comments explaining what functions with obvious names do. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: drop GPL license boilerplateBartosz Golaszewski1-10/+8
Replace the GPLv2 license boilerplate with an SPDX identifier and add myself as a second author. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: use readl/writel_relaxed()Bartosz Golaszewski1-2/+2
Replace all calls to __raw_readl() & __raw_writel() with readl_relaxed() and writel_relaxed() respectively. It's safe to do as there's no endianness conversion being done in the code. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: unify error handlingBartosz Golaszewski1-4/+7
Instead of dumping stack traces, just print a specific error message in aintc driver. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: improve coding styleBartosz Golaszewski1-6/+7
Drop tabs from variable initialization. Arrange variables in reverse christmas-tree order. Add a newline before a return. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: request the memory region before remapping itBartosz Golaszewski1-0/+9
Add a missing call to request_mem_region() before calling ioremap() to make sure it's not been requested by another user. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: use the new-style config structureBartosz Golaszewski4-55/+47
Modify the cp-intc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_cp_intc_init() to irq-davinci-cp-intc.h and make it take the new config structure as parameter. Convert all users to the new version. Also: since the two da8xx SoCs default all irq priorities to 7, just drop the priority configuration at all and hardcode the channels to 7. It will simplify the driver code and make our lives easier when it comes to device-tree support. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: convert all hex numbers to lowercaseBartosz Golaszewski1-4/+4
Use lowercase letters in hexadecimal numbers in the cp-intc driver as is done in most of the kernel code base. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: use a common prefix for all symbolsBartosz Golaszewski4-73/+77
In preparation for moving the driver to drivers/irqchip do some cleanup: use a common prefix for all symbols. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: add the new config structures for da8xx SoCsBartosz Golaszewski2-0/+20
Add the new-style config structures for da8xx SoCs. They will be used once we make the cp-intc driver stop using davinci_soc_info. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: add a wrapper around cp_intc_init()Bartosz Golaszewski7-4/+16
We're going to extend the cp_intc_init() function with a config structure so we can drop the intc-related fields from davinci_soc_info. Once we do it, we won't be able to use this routine directly as the init_irq callback. Wrap the calls in additional helpers that don't take parameters and can be assigned to init_irq. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: cp-intc: remove cp_intc.hBartosz Golaszewski7-63/+19
There's no need to have a local header for cp-intc. Move the only declaration for a public function to common.h. Move all register offsets into the driver source file and drop all unused defines. Make cp_intc_of_init() static. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19irqchip: davinci-aintc: move the driver to drivers/irqchipBartosz Golaszewski3-171/+4
The aintc driver has now been cleaned up. Move it to drivers/irqchip where it belongs. There's no device-tree support for any dm* board so there's no IRQCHIP_OF_DECLARE() - there's only the exported init function called from machine code. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: remove unnecessary includesBartosz Golaszewski1-4/+0
These includes are no longer required. Remove them. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: remove the timer-specific irq_set_handler()Bartosz Golaszewski1-3/+0
I've been unable to figure out exactly why, but the IRQ_TINT1_TINT34 interrupt is being handled as level irq and it's configured in the irq chip driver instead of set by the irq_set_type() callback. Since this is probably some legacy hack for out-of-tree code - remove it. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: request memory region before remapping itBartosz Golaszewski1-0/+9
Add a missing call to request_mem_region() before calling ioremap() to make sure the region is not being used by anyone else. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: unify error handlingBartosz Golaszewski1-4/+14
Instead of dumping stack traces, just print a specific error message in aintc driver. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: use the new config structureBartosz Golaszewski6-25/+24
Modify the aintc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h and make it take the new config structure as parameter. Convert all users to the new version. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: use the new irqchip config structure in dm* SoCsBartosz Golaszewski4-0/+44
Add the new-style config structures for dm* SoCs. They will be used once we make the aintc driver stop using davinci_soc_info. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: use writel_relaxed()Bartosz Golaszewski1-1/+1
Raplace all calls to __raw_writel() with writel_relaxed(). It's safe to do as there's no endianness conversion being done in the code. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: drop the 00 prefix from register offsetsBartosz Golaszewski1-11/+11
Since no offset goes past 0xff - let's drop the 00 prefix for better readability. While we're at it: convert all hex numbers to lower-case. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: use a common prefix for symbols in the driverBartosz Golaszewski6-55/+58
In preparation for moving the driver to drivers/irqchip do some cleanup: use a common prefix for all symbols. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: wrap davinci_irq_init() with a helperBartosz Golaszewski12-8/+32
We're going to extend the davinci_irq_init() function with a config structure so we can drop the intc-related fields from davinci_soc_info. Once we do it, we won't be able to use this routine directly as the init_irq callback. Wrap the calls in additional helpers that don't take parameters and can be assigned to init_irq. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: drop GPL license boilerplateBartosz Golaszewski1-20/+6
Replace the GPLv2 or later license boilerplate with an SPDX identifier. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: make irqs.h a local headerBartosz Golaszewski16-26/+30
The existence of irqs.h in mach-davinci/include/mach only makes sense without SPARSE_IRQ as it's then expected to define NR_IRQS and is included from asm/irq.h. As we now support SPARSE_IRQ, this header can be moved to mach-davinci and used as the source of HW interrupt numbers. While updating the includes in various files - also rearrange the headers by directory (linux/asm/mach). Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: select SPARSE_IRQBartosz Golaszewski8-2/+9
Everything is in place now for SPARSE_IRQ. Select it and set DAVINCI_INTC_START to NR_IRQS. We now need to include mach/irqs.h in a couple places as it is no longer indirectly included after selecting SPARSE_IRQ. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: wrap HW interrupt numbers with a macroBartosz Golaszewski13-239/+246
Once we select SPARSE_IRQ, the interrupt numbers defined in mach/irqs.h will only signify the hardware interrupt offsets, not the interrupt numbers seen by linux. Introduce a wrapper macro that translates the hwirq number to virtual numbers. For now it's just a dummy. Use that macro when specifying the interrupts in resources for platform devices. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: pull davinci_intc_base into the respective intc driversBartosz Golaszewski4-3/+3
davinci_intc_base is defined globally in common.c. Define separate local variables for the aintc and cp-intc drivers and remove the global one. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: remove davinci_intc_typeBartosz Golaszewski11-14/+0
We now use the generic ARM irq handler on davinci. There are no more users that check davinci_intc_type. Remove the variable and all its references. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: select GENERIC_IRQ_MULTI_HANDLERBartosz Golaszewski4-39/+52
In order to support SPARSE_IRQ we first need to make davinci use the generic irq handler for ARM. Translate the legacy assembly to C and put the irq handlers into their respective drivers (aintc and cp-intc). Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: aintc: use irq domainBartosz Golaszewski1-8/+27
We need to create an irq domain if we want to select SPARSE_IRQ. The cp-intc driver already supports it, but aintc doesn't. Use the helpers provided by the generic irq chip abstraction. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19ARM: davinci: remove intc_host_map from davinci_soc_info structBartosz Golaszewski2-6/+0
The intc_host_map field in struct davinci_soc_info is not used by any board. Remove it as part of the interrupt support cleanup. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-02-19Merge branch 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm into pm-cpufreqRafael J. Wysocki2-27/+1
Pull cpufreq drivers material for v5.1 from Viresh Kumar: "This contains: - Minor cleanups for pcc, longhaul, powerenv and speedstep drivers (Yangtao Li). - Moving configuration data out of mach directory for davinci (Bartosz Golaszewski)." * 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: cpufreq: davinci: move configuration to include/linux/platform_data cpufreq: speedstep: convert BUG() to BUG_ON() cpufreq: powernv: fix missing check of return value in init_powernv_pstates() cpufreq: longhaul: remove unneeded semicolon cpufreq: pcc-cpufreq: remove unneeded semicolon
2019-02-1932-bit userspace ABI: introduce ARCH_32BIT_OFF_T config optionYury Norov1-0/+1
All new 32-bit architectures should have 64-bit userspace off_t type, but existing architectures has 32-bit ones. To enforce the rule, new config option is added to arch/Kconfig that defaults ARCH_32BIT_OFF_T to be disabled for new 32-bit architectures. All existing 32-bit architectures enable it explicitly. New option affects force_o_largefile() behaviour. Namely, if userspace off_t is 64-bits long, we have no reason to reject user to open big files. Note that even if architectures has only 64-bit off_t in the kernel (arc, c6x, h8300, hexagon, nios2, openrisc, and unicore32), a libc may use 32-bit off_t, and therefore want to limit the file size to 4GB unless specified differently in the open flags. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Yury Norov <ynorov@marvell.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.