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2019-01-28Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller2-9/+46
Daniel Borkmann says: ==================== pull-request: bpf-next 2019-01-29 The following pull-request contains BPF updates for your *net-next* tree. The main changes are: 1) Teach verifier dead code removal, this also allows for optimizing / removing conditional branches around dead code and to shrink the resulting image. Code store constrained architectures like nfp would have hard time doing this at JIT level, from Jakub. 2) Add JMP32 instructions to BPF ISA in order to allow for optimizing code generation for 32-bit sub-registers. Evaluation shows that this can result in code reduction of ~5-20% compared to 64 bit-only code generation. Also add implementation for most JITs, from Jiong. 3) Add support for __int128 types in BTF which is also needed for vmlinux's BTF conversion to work, from Yonghong. 4) Add a new command to bpftool in order to dump a list of BPF-related parameters from the system or for a specific network device e.g. in terms of available prog/map types or helper functions, from Quentin. 5) Add AF_XDP sock_diag interface for querying sockets from user space which provides information about the RX/TX/fill/completion rings, umem, memory usage etc, from Björn. 6) Add skb context access for skb_shared_info->gso_segs field, from Eric. 7) Add support for testing flow dissector BPF programs by extending existing BPF_PROG_TEST_RUN infrastructure, from Stanislav. 8) Split BPF kselftest's test_verifier into various subgroups of tests in order better deal with merge conflicts in this area, from Jakub. 9) Add support for queue/stack manipulations in bpftool, from Stanislav. 10) Document BTF, from Yonghong. 11) Dump supported ELF section names in libbpf on program load failure, from Taeung. 12) Silence a false positive compiler warning in verifier's BTF handling, from Peter. 13) Fix help string in bpftool's feature probing, from Prashant. 14) Remove duplicate includes in BPF kselftests, from Yue. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-28arch/arm/xen: Remove duplicate headerSouptick Joarder1-1/+0
Remove duplicate header which is included twice. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Acked-by: Stefano Stabellini <sstabellini@kernel.org> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2019-01-28ARM: dts: sun5i: q8-tablet: Use bananapi,s070wv20-ct16 panel compatibleChen-Yu Tsai1-1/+1
The compatible string for the LCD panel used for the Q8 tablets are just a placeholder that was shown to be compatible with the actual panels found on these devices. The real panels do not have any identifiable markings and vary between production runs. The compatibe string previously used had a pixel clock that could not be accurately reproduced on Allwinner hardware, and discussions on whether a margin should be added to the display drivers and how large a margin was acceptable had stalled. Now that we have a panel model that is actually used with Allwinner hardware, has the same dimensions, and the timings have been shown to work with the nameless panels, we can use that one instead. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-28ARM: dts: sun5i: q8-tablet: Add LCD Panel power supplyChen-Yu Tsai1-0/+1
The A13 Q8 tablet, following the A13 reference tablet design, has the system's fixed 3.3V rail feed the VCC supply of the LCD panel. Additional voltage rails used by the panel are generated using a regulator fed from the unregulated IPSOUT output of the PMIC. The latter is unrepresentable in the device tree. Both are controlled with MOSFETs by the enable GPIO added in the previous patch. The actual enable or reset pin for the panel is tied directly to LCD-VCC after the MOSFET. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-28ARM: dts: sun5i: q8-tablet: Add LCD Panel enable GPIOChen-Yu Tsai1-1/+1
Now that we support the AXP209 GPIOs, we can toggle the LCD panel enable line. Add the GPIO phandle to the panel. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-28ARM: dts: sun5i: q8-tablet: Move panel properties to correct node levelChen-Yu Tsai1-2/+2
The panel backlight and enable GPIO comments were incorrectly placed in the input port, while it should have been in the panel node itself. Move them to the correct position. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-28ARM: dts: sun5i: Add backlight GPIO for reference design tabletChen-Yu Tsai1-1/+1
Now that we support the GPIOs on the AXP209, we can control the LCD backlight with them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-28reset: socfpga: declare socfpga_reset_init in a header filePhilipp Zabel1-2/+1
Avoid declaring extern functions in c files. To make sure function definition and usage don't get out of sync, declare socfpga_reset_init in a common header. Suggested-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Dinh Nguyen <dinguyen@kernel.org>
2019-01-28reset: sunxi: declare sun6i_reset_init in a header filePhilipp Zabel1-1/+1
Avoid declaring extern functions in c files. To make sure function definition and usage don't get out of sync, declare sun6i_reset_init in a common header. Suggested-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-01-28ARM: dts: rockchip: clean up the abuse of disable-wpShawn Lin13-14/+0
The mmc.txt didn't explicitly say disable-wp is for SD card slot only, but that is what it was designed for in the first place. Remove all disable-wp from emmc or sdio controller. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-01-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-0/+94
2019-01-26arm: bpf: implement jitting of JMP32Jiong Wang2-9/+46
This patch implements code-gen for new JMP32 instructions on arm. For JSET, "ands" (AND with flags updated) is used, so corresponding encoding helper is added. Cc: Shubham Bansal <illusionist.neo@gmail.com> Signed-off-by: Jiong Wang <jiong.wang@netronome.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2019-01-26ARM: dts: lpc435x: remove address and size cells from gpio-keys-polled nodesVladimir Zapolskiy2-4/+0
The change removes redundant #address-cells and #size-cells properties from gpio-keys-polled compatible device nodes found in lpc4357-ea4357-devkit and lpc4350-hitex-eval board DTS files. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: lpc32xx: Delete an error message for a failed memory allocation in lpc32xx_pm_enter()Markus Elfring1-5/+1
Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: defconfig: lpc32xx: disable superfluous GPIO controllersVladimir Zapolskiy1-8/+0
The change disables a list of GPIO controllers, which to the best knowledge are not found on any supported NXP LPC32xx powered board. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: defconfig: lpc32xx: enable generic SRAM driverVladimir Zapolskiy1-0/+1
NXP LPC32xx SoCs contain an IRAM area, which is supported by the generic MMIO SRAM driver, enable the driver to be built by default. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: defconfig: lpc32xx: enable serial console on HS UARTVladimir Zapolskiy1-0/+1
It is possible to configure NXP LPC32xx powered boards to have serial consoles on HS UARTs, enable this option by default. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: defconfig: lpc32xx: enable panic on oops optionVladimir Zapolskiy1-0/+2
Panic on oops option enabled by by default makes great sense both for debugging and production. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: defconfig: lpc32xx: enable build options for basic debuggingVladimir Zapolskiy1-0/+4
To make a default built kernel image more advanced include support of sysrq, dynamic debug, GDB scripts and printed timestamps in kernel log buffer by default. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-26ARM: defconfig: lpc32xx: enable NFSv4 supportVladimir Zapolskiy1-0/+3
The change allows to mount rootfs shared on an NFSv4 server. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-25ARM: defconfig: Switch LPC32xx to use PL11x DRM driverLinus Walleij1-4/+5
None of the LPC32xx device trees contains any display settings, it just defines a device tree node for the CLCD (PL11x) left as "disabled" on lpc3250-ea3250 and "okay" on lpc3250-phy3250 but no panels are attached on any device tree, so the driver will simply bail out. I conclude that the hardware is dormant on existing systems, so we can without any problems switch the defconfig over from the old ARMCLCD frame buffer driver to the new PL11x DRM driver. Cc: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [vzapolskiy: deselected I2C as selected by DRM; fixed SoC name] Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-25ARM: defconfig: Update LPC32xx defconfigLinus Walleij1-22/+12
This simply updates the LPC32xx defconfig against the current Kconfig structure in the kernel so we can make changed to the defconfig without disturbing noise. Cc: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-25ARM: defconfig: Switch LPC18xx to use PL11x DRM driverLinus Walleij1-3/+4
None of the LPC18xx device trees contains any display settings, it just defines a device tree node for the CLCD (PL11x) set as "disabled" and no panels are attached on any device tree. This I conclude that the hardware is dormant on existing systems, so we can without any problems switch the defconfig over from the old ARMCLCD frame buffer driver to the new PL11x DRM driver. Cc: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [vzapolskiy: deselected I2C build option as selected by DRM] Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-25ARM: dts: exynos: Fix pinctrl definition for eMMC RTSN line on Odroid X2/U3Marek Szyprowski1-7/+6
Commit 225da7e65a03 ("ARM: dts: add eMMC reset line for exynos4412-odroid-common") added MMC power sequence for eMMC card of Odroid X2/U3. It reused generic sd1_cd pin control configuration node and only disabled pull-up. However that time the pinctrl configuration was not applied during MMC power sequence driver initialization. This has been changed later by commit d97a1e5d7cd2 ("mmc: pwrseq: convert to proper platform device"). It turned out then, that the provided pinctrl configuration is not correct, because the eMMC_RTSN line is being re-configured as 'special function/card detect function for mmc1 controller' not the simple 'output', thus the power sequence driver doesn't really set the pin value. This in effect broke the reboot of Odroid X2/U3 boards. Fix this by providing separate node with eMMC_RTSN pin configuration. Cc: <stable@vger.kernel.org> Reported-by: Markus Reichl <m.reichl@fivetechno.de> Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Fixes: 225da7e65a03 ("ARM: dts: add eMMC reset line for exynos4412-odroid-common") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-01-25ipc: rename old-style shmctl/semctl/msgctl syscallsArnd Bergmann1-3/+3
The behavior of these system calls is slightly different between architectures, as determined by the CONFIG_ARCH_WANT_IPC_PARSE_VERSION symbol. Most architectures that implement the split IPC syscalls don't set that symbol and only get the modern version, but alpha, arm, microblaze, mips-n32, mips-n64 and xtensa expect the caller to pass the IPC_64 flag. For the architectures that so far only implement sys_ipc(), i.e. m68k, mips-o32, powerpc, s390, sh, sparc, and x86-32, we want the new behavior when adding the split syscalls, so we need to distinguish between the two groups of architectures. The method I picked for this distinction is to have a separate system call entry point: sys_old_*ctl() now uses ipc_parse_version, while sys_*ctl() does not. The system call tables of the five architectures are changed accordingly. As an additional benefit, we no longer need the configuration specific definition for ipc_parse_version(), it always does the same thing now, but simply won't get called on architectures with the modern interface. A small downside is that on architectures that do set ARCH_WANT_IPC_PARSE_VERSION, we now have an extra set of entry points that are never called. They only add a few bytes of bloat, so it seems better to keep them compared to adding yet another Kconfig symbol. I considered adding new syscall numbers for the IPC_64 variants for consistency, but decided against that for now. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-25ARM: add kexec_file_load system call numberArnd Bergmann1-0/+1
A couple of architectures including arm64 already implement the kexec_file_load system call, on many others we have assigned a system call number for it, but not implemented it yet. Adding the number in arch/arm/ lets us use the system call on arm64 systems in compat mode, and also reduces the number of differences between architectures. If we want to implement kexec_file_load on ARM in the future, the number assignment means that kexec tools can already be built with the now current set of kernel headers. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-25ARM: add migrate_pages() system callArnd Bergmann2-1/+1
The migrate_pages system call has an assigned number on all architectures except ARM. When it got added initially in commit d80ade7b3231 ("ARM: Fix warning: #warning syscall migrate_pages not implemented"), it was intentionally left out based on the observation that there are no 32-bit ARM NUMA systems. However, there are now arm64 NUMA machines that can in theory run 32-bit kernels (actually enabling NUMA there would require additional work) as well as 32-bit user space on 64-bit kernels, so that argument is no longer very strong. Assigning the number lets us use the system call on 64-bit kernels as well as providing a more consistent set of syscalls across architectures. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
2019-01-25ARM: multi_v7_defconfig: Enable support for RZ/A2Geert Uytterhoeven1-0/+2
Enable support for the RZ/A2 SoC, including pin control, now the DTS for the Renesas RZ/A2M evaluation board is included. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-25ARM: shmobile: defconfig: Enable support for RZ/A2Geert Uytterhoeven1-0/+2
Enable support for the RZ/A2 SoC, including pin control, now the DTS for the Renesas RZ/A2M evaluation board is included. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-25ARM: dts: sun8i-a23-q8: Set compatible string for LCD panelChen-Yu Tsai1-0/+4
The Q8 tablets follow the A23/A33 tablet reference design, and normally use a "generic" 800x480 LCD panel. The actual panel may vary between production runs, and there are no visible markings denoting its model. This patch uses a panel that has the same dimensions and timings that are close to what was provided in the vendor fex files. Since there are also A33 Q8 tablets with 1024x600 panels, this patch only sets the compatible string for A23 Q8 tablets. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-25ARM: dts: sun8i-q8-common: Enable display pipeline with RGB LCD panelChen-Yu Tsai1-0/+37
The Q8 design for A23/A33 tablets have an 18-bit RGB LCD panel connected to the LCD interface on the SoC, the DC1SW output on the PMIC providing power for the LCD, and PH7 toggling the reset pin for the panel. This patch adds a device node for the panel, describing the above, and enables the display pipeline. The actual model or compatible string for the panel should be added in the tablet device tree file. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-25ARM: dts: sun8i-a23: Add compatible strings to display pipeline device nodesChen-Yu Tsai1-0/+20
Now that the compatible strings for the display pipeline on the A23 have been added to the bindings, add the corresponding compatibles to the device nodes already in the A23/A33 shared dtsi. While the A23 has the TCON ch1 clock defined in the CCU, and the channel 1 registers are available, it does not have any means to use channel 1 due to a lack of downstream encoders, and the enable bit for channel 1 is hard-wired to 0 (off). Hence the ch1 clock is left out. As the MIPI DSI output device is not officially documented, and there are no reference devices to test it, it is not covered by this patch. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-25ARM: dts: sun8i-a33: Move display pipeline nodes to a23/a33 common dtsiChen-Yu Tsai2-156/+185
The display pipeline has the same structure, resources and connections on both the A23 and A33. The differences include: - compatible strings - extra clock, reset control, and IO region for SAT in the backend only found on the A33 - missing ch1 clock for the TCON However, while the A23 has the TCON ch1 clock defined in the CCU, and the channel 1 registers are available, it does not have any means to use channel 1 due to a lack of downstream encoders, and the enable bit for channel 1 is hard-wired to 0 (off). As the MIPI DSI output device is not officially documented, and there are no A23 reference devices to test it, it is not covered by this patch. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-25ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by addressChen-Yu Tsai1-15/+13
The NAND controller device node was inserted into the wrong position, probably due to a rebase or merge, as the file's structure does not provide enough context for git to accurately match the previous device node block. Fixes: d7b843df13ea ("ARM: dts: sun8i: add NAND controller node for A23/A33") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-24ARM: pxa: remove unused empty mach/pxa25x-udc.h fileVladimir Zapolskiy1-0/+0
Commit c5418a0b98c1 ("usb: gadget: pxa25x_udc: move register definitions from arch") removed inclusion of mach/pxa25x-udc.h from the PXA25x UDC driver, the contents of the header file was also wiped out, however the file itself hasn't been removed, now this change removes the unused empty header file. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-01-24ARM: dts: Adds device tree file for McGill's IceBoard, based on TI AM3874Graeme Smecher2-0/+497
This is an ARM + FPGA instrumentation board used at telescopes in Antarctica, Chile, and Canada: https://pole.uchicago.edu/ https://arxiv.org/abs/1608.03025 https://chime-experiment.ca/ With these commits and a suitable userspace, we can boot the board, load a FPGA bitstream, and communicate with the RTL design. Most of the board's telemetry sensors (temperatures, voltages) are functional but detailed testing is to follow. We are weaning ourselves off TI's "official" kernel for this SOC, which has been stuck at 2.6.37 and is not really fit for use. To anyone at TI: despite good silicon and some dedicated support enginers, your open-source software strategy for these parts has not worked well. Please get in touch with me if you'd like to have a constructive discussion about ways to improve it. Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com> [tony@atomide.com: dropped fpga@1 as linux,spidev is still undocumented] Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: dts: ti81xx: Add dts boilerplate for all GPIO and SPI peripheralsGraeme Smecher1-1/+63
GPIO3/4 and MCSPI2/3/4 are now present. Lightly tested on am3874 platform. Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com> [tony@atomide.com: split to apply hwmod and dts changes separately] Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: ti81xx: Add hwmod boilerplate for all GPIO and SPI peripheralsGraeme Smecher1-0/+117
GPIO3/4 and MCSPI2/3/4 are now present. Lightly tested on am3874 platform. Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com> [tony@atomide.com: split to apply hwmod and dts changes separately] Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: ti81xx: Move I2C entries in omap_hwmod_81xx to maintain groupingGraeme Smecher1-7/+7
There is no functional change here; the I2C and ELM entries leaked into each other and this separates them again. Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: dts: omap4-sdp: Make ethernet working even if booted with latest u-bootPeter Ujfalusi1-0/+30
The ethernet works in kernel only if we use some binary u-boot from the past which have support for KS8851. The u-boot sources are not available for this mysterious u-boot image people tends to hold on... Mainline u-bott does not have ethernet support for sdp4430 and if we use that the ethernet is not working. After some debugging I have managed to get the ethernet working with mainline u-boot while not breaking the networking with the case when we boot with the mysterious binary u-boot. Basically we were missing bunch of pinmux settings and the 'magic' gpio_138 handling in kernel. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: dts: am335x-shc.dts: Switch to SPDX identifierHeiko Schocher1-3/+1
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: dts: am437x: replace linux,wakeup with wakeup-source propertySudeep Holla1-1/+1
Most of the legacy "linux,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. Replace the legacy properties with the unified "wakeup-source" property introduced in the commit aeda5003d0b9 ("Input: matrix_keypad - change name of wakeup property to "wakeup-source"") Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24ARM: dts: am33xx: Remove unnecessary propertiesFelix Brack1-2/+0
Remove the unnecessary properties #address-cells and #size-cells of node pinmux as there are no child-nodes with property reg. Signed-off-by: Felix Brack <fb@ltec.ch> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-24Merge branch 'ib-qcom-spmi' into develLinus Walleij2-58/+4
2019-01-24ARM: dts: qcom: pma8084: add interrupt controller propertiesBrian Masney1-22/+2
Add interrupt controller properties now that spmi-gpio is a proper hierarchical IRQ chip. The interrupts property is no longer needed so remove it. This change was not tested on any hardware but the same change was tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with no issues. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-24ARM: dts: qcom: pm8941: add interrupt controller propertiesBrian Masney1-36/+2
Add interrupt controller properties now that spmi-gpio is a proper hierarchical IRQ chip. The interrupts property is no longer needed so remove it. Code was tested on the LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-24ARM: dts: sunxi: h3/h5: Drop A31 fallback compatible for CSI controllerChen-Yu Tsai1-2/+1
The CSI controller found on the H3 (and H5) is a reduced version of the one found on the A31. It only has 1 channel, instead of 4 channels for time-multiplexed BT.656. Since the H3 is a reduced version, it cannot "fallback" to a compatible that implements more features than it supports. Drop the A31 fallback compatible. Fixes: f89120b6f554 ("ARM: dts: sun8i: Add the H3/H5 CSI controller") Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2019-01-23ARM: OMAP5+: Fix inverted nirq pin interrupts with irq_set_typeTony Lindgren3-5/+52
Commit 83a86fbb5b56 ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE") started warning about incorrect dts usage for irqs. ARM GIC only supports active-high interrupts for SPI (Shared Peripheral Interrupts), and the Palmas PMIC by default is active-low. Palmas PMIC allows changing the interrupt polarity using register PALMAS_POLARITY_CTRL_INT_POLARITY, but configuring sys_nirq1 with a pull-down and setting PALMAS_POLARITY_CTRL_INT_POLARITY made the Palmas RTC interrupts stop working. This can be easily tested with kernel tools rtctest.c. Turns out the SoC inverts the sys_nirq pins for GIC as they do not go through a peripheral device but go directly to the MPUSS wakeupgen. I've verified this by muxing the interrupt line temporarily to gpio_wk16 instead of sys_nirq1. with a gpio, the interrupt works fine both active-low and active-high with the SoC internal pull configured and palmas polarity configured. But as sys_nirq1, the interrupt only works when configured ACTIVE_LOW for palmas, and ACTIVE_HIGH for GIC. Note that there was a similar issue earlier with tegra114 and palmas interrupt polarity that got fixed by commit df545d1cd01a ("mfd: palmas: Provide irq flags through DT/platform data"). However, the difference between omap5 and tegra114 is that tegra inverts the palmas interrupt twice, once when entering tegra PMC, and again when exiting tegra PMC to GIC. Let's fix the issue by adding a custom wakeupgen_irq_set_type() for wakeupgen and invert any interrupts with wrong polarity. Let's also warn about any non-sysnirq pins using wrong polarity. Note that we also need to update the dts for the level as IRQ_TYPE_NONE never has irq_set_type() called, and let's add some comments and use proper pin nameing to avoid more confusion later on. Cc: Belisko Marek <marek.belisko@gmail.com> Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Cc: "Dr. H. Nikolaus Schaller" <hns@goldelico.com> Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Nishanth Menon <nm@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Cc: Thierry Reding <treding@nvidia.com> Cc: stable@vger.kernel.org # v4.17+ Reported-by: Belisko Marek <marek.belisko@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-23ARM: dts: am335x-shc.dts: fix wrong cd pin levelHeiko Schocher1-1/+1
cd pin on mmc1 is GPIO_ACTIVE_LOW not GPIO_ACTIVE_HIGH Fixes: e63201f19438 ("mmc: omap_hsmmc: Delete platform data GPIO CD and WP") Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-23ARM: dts: omap3-gta04: Fix graph_port warningTony Lindgren1-4/+0
We're currently getting a warning with make dtbs: arch/arm/boot/dts/omap3-gta04.dtsi:720.7-727.4: Warning (graph_port): /ocp@68000000/dss@48050000/encoder@48050c0 0/port: graph node unit address error, expected "0" Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>