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2019-01-23ARM: dts: n900: fix mmc1 card detect gpio polarityArthur Demchenkov1-1/+1
Wrong polarity of card detect GPIO pin leads to the system not booting from external mmc, if the back cover of N900 is closed. When the cover is open the system boots fine. This wasn't noticed before, because of a bug, which was fixed by commit e63201f19 (mmc: omap_hsmmc: Delete platform data GPIO CD and WP). Kernels up to 4.19 ignored the card detect GPIO from DT. Fixes: e63201f19438 ("mmc: omap_hsmmc: Delete platform data GPIO CD and WP") Signed-off-by: Arthur Demchenkov <spinal.by@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-01-23arm64/xen: fix xen-swiotlb cache flushingChristoph Hellwig1-0/+94
Xen-swiotlb hooks into the arm/arm64 arch code through a copy of the DMA DMA mapping operations stored in the struct device arch data. Switching arm64 to use the direct calls for the merged DMA direct / swiotlb code broke this scheme. Replace the indirect calls with direct-calls in xen-swiotlb as well to fix this problem. Fixes: 356da6d0cde3 ("dma-mapping: bypass indirect calls for dma-direct") Reported-by: Julien Grall <julien.grall@arm.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-01-23ARM: pxa: ssp: unneeded to free devm_ allocated dataPeng Hao1-3/+0
devm_ allocated data will be automatically freed. The free of devm_ allocated data is invalid. Fixes: 1c459de1e645 ("ARM: pxa: ssp: use devm_ functions") Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> [title's prefix changed] Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-01-23pxa2xx: replace spi_master with spi_controllerLubomir Rintel17-22/+22
It's also a slave controller driver now, calling it "master" is slightly misleading. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-01-23ARM: dts: sun8i-h3: nanopi-m1-plus: enable HDMICorentin Labbe1-0/+25
This patch enable HDMI output on sun8i-h3-nanopi-m1-plus. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-23ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVBChris Brandt2-0/+83
Add support for Renesas RZ/A2M evaluation board. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-23ARM: dts: r7s9210: Initial SoC device treeChris Brandt1-0/+218
Basic support for the RZ/A2 (R7S9210) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-23ARM: dts: r8a7743: Convert to new LVDS DT bindingsBiju Das1-6/+30
The internal LVDS encoder now has DT bindings separate from the DU. Port the device tree over to the new model. Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver") Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22ARM: dts: ls1021a: add 1588 external trigger stamp fifo supportYangbo Lu1-0/+1
This patch is to add external trigger stamp fifo support for 1588 timer. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-22Merge branch 'omap-for-v4.21/dt' into omap-for-v5.1/dtTony Lindgren5-8/+29
2019-01-23ARM: defconfig: Update LPC18xx defconfigLinus Walleij1-15/+9
This simply updates the LPC18xx defconfig against the current Kconfig structure in the kernel so we can make changed to the defconfig without disturbing noise. Cc: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2019-01-22ARM: dts: ipq4019: Remove skeleton.dtsiRobert Marko1-1/+3
The skeleton.dtsi file was removed in ARM64 for different reasons as explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi"). These also applies to ARM and it will also allow to get rid of the following DTC warnings in the future: "Node /memory has a reg or ranges property, but no unit name" The disassembled DTB are almost the same besides an empty chosen node being removed and nodes reordered, so it should not have functional changes. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22ARM: dts: qcom: msm8974-hammerhead: add USB OTG supportBrian Masney2-0/+71
Add the device tree bindings for USB OTG support. Driver was tested using on a LG Nexus 5 (hammerhead) phone. This patch is based on work from Jonathan Marek and from the other msm8974 devices. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22ARM: dts: qcom: msm8974: add gpio-rangesBrian Masney1-0/+1
This adds the gpio-ranges property to pm8941_gpios so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency so GPIO hogging can be used on this board. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22ARM: dts: qcom: msm8974-hammerhead: add WiFi supportJonathan Marek1-0/+70
This patch adds WiFi support to the LG Nexus 5 (hammerhead) phone. Signed-off-by: Jonathan Marek <jonathan@marek.ca> [masneyb@onstation.org: Enabled wlan_regulator_pin and wlan_sleep_clk_pin] Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22ARM: dts: msm8660: Fix up GIC IRQ flagsLinus Walleij1-7/+7
All the GSBI blocks are marking their GIC IRQ lines as "IRQ_TYPE_NONE" but there is no such thing: all GIC IRQ lines have a trigger type. That yields the following warning from the GIC driver: WARNING: CPU: 0 PID: 1 at ../drivers/irqchip/irq-gic.c:1016 gic_irq_domain_translate+0xdc/0xe4 (...) Mark all of these IRQ_TYPE_LEVEL_HIGH as is common so this warning goes away. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22ARM: dts: msm8660: Mark two GSBI blocks "disabled"Linus Walleij1-0/+2
The GSBI module complains: gsbi 16500000.gsbi: missing mode configuration gsbi: probe of 16500000.gsbi failed with error -22 gsbi 16600000.gsbi: missing mode configuration gsbi: probe of 16600000.gsbi failed with error -22 gsbi 19800000.gsbi: GSBI port protocol: 2 crci: 0 So we should mark these GSBIs as "disabled" in the SoC file by default. If boards appear that make use of them, we can simply set status = "ok" in the DTS for them. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22ARM: dts: vexpress: use list instead of tuple for mmci interruptsSudeep Holla2-2/+2
Vexpress motherboard MMCI requires dedicated interrupts for CMD and PIO, which obviously should be expressed as a list. Current form uses tuple and it works fine since interrupt-cells equal to 1. Reported-by: Vladimir Murzin <vladimir.murzin@arm.com> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-22ARM: shmobile: defconfig: Refresh for v5.0-rc1Geert Uytterhoeven1-24/+21
- Move SoC config options (moved in commit 062887bf5ef73313 ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/")), - Move PCI config options (moved in commit eb01d42a77785ff9 ("PCI: consolidate PCI config entry in drivers/pci")), - Drop CONFIG_I2C_MUX=y (auto-enabled since commit ea6b13e9fed0fda9 ("drm/bridge/sii902x: Add missing dependency on I2C_MUX")), - Drop CONFIG_SH_DMAE=y (no longer selectable since commit a19788612f51b787 ("dmaengine: sh: Remove R-Mobile APE6 support")), - Drop CONFIG_ARM_UNWIND (auto-enabled since commit f9b58e8c7d031b0d ("ARM: 8800/1: use choice for kernel unwinders")). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22ARM: dts: mps2: use list instead of tuple for uart interruptsVladimir Murzin1-3/+3
MPS2 UART requires dedicated interrupts for RX, TX and overflow, which obviously should be expressed as a list. Current form uses tuple and it has worked so far because NVIC has interrupt-cells equal to 1. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-21arm/mach-sa1100/simpad.c: Remove duplicate headerSouptick Joarder1-1/+0
Remove linux/gpio/machine.h which is included more than once. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-21perf/core, arch/arm: Use PERF_PMU_CAP_NO_EXCLUDE for exclusion incapable PMUsAndrew Murray2-15/+3
For drivers that do not support context exclusion let's advertise the PERF_PMU_CAP_NO_EXCLUDE capability. This ensures that perf will prevent us from handling events where any exclusion flags are set. Let's also remove the now unnecessary check for exclusion flags. Signed-off-by: Andrew Murray <andrew.murray@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Russell King <linux@armlinux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxppc-dev@lists.ozlabs.org Cc: robin.murphy@arm.com Cc: suzuki.poulose@arm.com Link: https://lkml.kernel.org/r/1547128414-50693-7-git-send-email-andrew.murray@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-01-21ARM: dts: aspeed: Add Inspur on5263m5 BMCJohn Wang1-0/+145
The Inspur on5263m5 is an Intel Xeon OCP server that uses the ASPEED AST2500 BMC. Signed-off-by: John Wang <wangzqbj@inspur.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> [joel: Rework commit message] Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-18ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodesPaul Kocialkowski1-0/+26
This adds nodes for the Video Engine and the associated reserved memory for the A10. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18ARM: dts: sun4i: Add support for the C1 SRAM region with the SRAM controllerPaul Kocialkowski1-0/+13
This adds support for the C1 SRAM region (to be used with the SRAM controller driver) for the A10 platform. The region is shared between the Video Engine and the CPU. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18EDAC, aspeed: Add an Aspeed AST2500 EDAC driverStefan M Schaeckeler1-0/+7
Add support for the Aspeed AST2500 SoC. Signed-off-by: Stefan M Schaeckeler <sschaeck@cisco.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Joel Stanley <joel@jms.id.au> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-aspeed@lists.ozlabs.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net
2019-01-18ARM: dts: r8a7779: Add HSCIF0/1 device nodesUlrich Hecht1-0/+26
Based on Rev. 1.00 of the R-Car H1 datasheet. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-17ARM: orion5x: Include platform_data/dsa.hFlorian Fainelli7-7/+7
Now that we have split the DSA platform data structures from the main net/dsa.h header file, include only the relevant header file. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-17ARM: dts: r8a7778: Add HSCIF0/1 supportUlrich Hecht1-0/+28
Add HSCIF0/1 clocks and device nodes, based on Rev. 1.00 of the R-Car M1A datasheet. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [geert: Squashed two patches] [geert: Correct HSCIF1 module clock index] [geert: Correct reg properties for non-LPAE] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-17ARM: dts: da850: fix interrupt numbers for clocksourceBartosz Golaszewski1-1/+1
The timer interrupts specified in commit 3652e2741f42 ("ARM: dts: da850: Add clocks") are wrong but since the current timer code hard-codes them, the bug was never spotted. This patch must go into stable since, once we introduce a proper clocksource driver, devices with buggy device tree will stop booting. Fixes: 3652e2741f42 ("ARM: dts: da850: Add clocks") Cc: stable@vger.kernel.org Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-01-17ARM: dts: aspeed: tiogapass: Add sensorsVijay Khemka1-2/+21
Added ADC and other sensor devices present in the Facebook Tiogapass machine. Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17ARM: dts: aspeed: tiogapass: Enable KCSVijay Khemka1-0/+12
Tiogapass uses two KCS channels. Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17ARM: dts: aspeed: Add KCS support for LPC BMCVijay Khemka1-1/+32
This adds the description of the four Keyboard Controller Style (KCS) IPMI communication channels present in the ASPEED BMC. They are disabled by default. Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17ARM: dts: aspeed: Add #interrupt-cells property to gpio controllersMark Walton2-0/+2
Allows the GPIO controller to be used as an interrupt parent. of_irq_find_parent() skips interrupt controller nodes that do not have the #interrupt-cells property. Signed-off-by: Mark Walton <mark.walton@serialtek.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17ARM: dts: aspeed-palmetto: Add i2c OCC hwmon nodeJoel Stanley1-0/+5
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17ARM: dts: aspeed: stardragon4800: Add power supplyXiaoting Liu1-0/+10
Add Delta Electronics power supply DPS-650-AB. Signed-off-by: Xiaoting Liu <xiaoting.liu@hxt-semitech.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-16ARM: dts: tegra20: Update Memory Controller node to the new bindingDmitry Osipenko1-9/+6
Device tree binding of Memory Controller has been changed: GART has been squashed into the MC, there are a new mandatory clock and #iommu-cells properties, the compatible has been changed to 'tegra20-mc-gart'. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+Dmitry Osipenko2-0/+30
The external memory arbitration configuration is getting reset after memory entering into self-refresh mode, it shall be restored on the exit. Note that MC_EMEM_ARB_CFG register is shadowed and latching happens on the EMC timing update. This fixes 2x GPU performance degradation after resuming from LP1 on Tegra30. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-16ARM: tegra: Fix DRAM refresh-interval clobbering on resume from LP1 on Tegra30Dmitry Osipenko2-4/+0
The DRAM refresh-interval is getting erroneously set to "1" on exiting from memory self-refreshing mode. The clobbered interval causes the "refresh request overflow timeout" error raised by the External Memory Controller on exiting from LP1 on Tegra30. The same may happen on Tegra20, but EMC registers are not latched after exiting from self-refreshing mode on Tegra20 and hence refresh-interval is not altered until an event that causes registers latching happens. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-16ARM: tegra: Fix missed EMC registers latching on resume from LP1 on Tegra30+Dmitry Osipenko1-0/+2
The memory interface configuration and re-calibration interval are left unassigned on resume from LP1 because these registers are shadowed and require latching after being adjusted. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-16ARM: imx: add i.MX7ULP SoC revision supportAnson Huang1-0/+39
i.MX7ULP SoC's revision info is inside the SIM module, bit[31:28] of JTAG_ID register defines revision as below from B0: 0001 B0 0010 B1 This patch adds SoC revision support for i.MX7ULP, test result as below: root@imx7ulp-evk ~$ cat /sys/devices/soc0/revision 2.1 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-15ARM: imx: add i.MX7ULP cpuidle supportAnson Huang6-5/+127
This patch adds cpuidle support for i.MX7ULP, 3 cpuidle states supported as below: 1. WFI, just ARM wfi; 2. WAIT mode, mapped to SoC's partial stop mode #3; 3. STOP mode, mapped to SoC's partial stop mode #1. In WAIT mode, system clock and bus clock will be enabled; In STOP mode, system clock and bus clock will be disabled. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-14ARM: dts: socfpga: update missing reset property peripheralsDinh Nguyen2-0/+30
Add reset property for gpio, i2c, sdmmc, nand, qspi, spi, uart, and watchdog on base socfpga and socfpga_arria10. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-01-14ARM: dts: BCM53573: Relicense Luxul files to the GPL 2.0+ / MITDan Haab2-4/+2
This matches licensing used by other BCM53573 files and BCM5301X. Signed-off-by: Dan Haab <dan.haab@luxul.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-01-13ARM: s5pv210_defconfig: Enable cpufreqPaweł Chmiel1-0/+6
Enable cpufreq drivers for all S5Pv210 devices. Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-01-13ARM: s5pv210_defconfig: Enable more drivers present on Samsung AriesPaweł Chmiel1-3/+22
Enable following drivers for Samsung Aries family of devices: - I2C support (using s3c2410 driver) - s5p-jpeg - s5p-mfc - Exynos DRM rotator - PWM support - PWM vibrator - Fixed regulator - Syscon poweroff - Atmel maXTouch touchscreen - Broadcom BCM4329 Bluetooth over UART0 - DMA devices (so we can use pl330 DMA driver) Disable DEBUG_LL. It's currently set to UART1, but if we want to use it on Aries, we would need to switch it to UART2, to get any logs. Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-01-13ARM: s5pv210_defconfig: Run make savedefconfigPaweł Chmiel1-8/+8
Run savedefconfig to cleanup the config and prepare for enabling more drivers for Samsung Aries based devices. Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-01-12Merge tag 'reset-for-5.0-rc2' of git://git.pengutronix.de/git/pza/linux into fixesOlof Johansson1-0/+4
Late reset controller changes for v5.0 This adds missing deassert functionality to the ARC HSDK reset driver, fixes some indentation and grammar issues in the kernel docs, adds a helper to count the number of resets on a device for the non-DT case as well, adds an early reset driver for SoCFPGA and simple reset driver support for Stratix10, and generalizes the uniphier USB3 glue layer reset to also cover AHCI. * tag 'reset-for-5.0-rc2' of git://git.pengutronix.de/git/pza/linux: reset: uniphier-glue: Add AHCI reset control support in glue layer dt-bindings: reset: uniphier: Add AHCI core reset description reset: uniphier-usb3: Rename to reset-uniphier-glue dt-bindings: reset: uniphier: Replace the expression of USB3 with generic peripherals ARM: socfpga: dts: document "altr,stratix10-rst-mgr" binding reset: socfpga: add an early reset driver for SoCFPGA reset: fix null pointer dereference on dev by dev_name reset: Add reset_control_get_count() reset: Improve reset controller kernel docs ARC: HSDK: improve reset driver Signed-off-by: Olof Johansson <olof@lixom.net>
2019-01-12Merge tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson1-2/+2
mvebu fixes for 5.0 They are all device tree fixes which also worth being in stable: - Reserve PSCI area on Armada 7K/8K preventing the kernel accessing this area and crashing while doing it. - Use correct PCIe reset signal on MACCHIATOBin (Armada 8040 based) - Fix polarity of GPIO fan line D-Link DNS NASes(kikwood based) * tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu: ARM: dts: kirkwood: Fix polarity of GPIO fan lines arm64: dts: marvell: mcbin: fix PCIe reset signal arm64: dts: marvell: armada-ap806: reserve PSCI area Signed-off-by: Olof Johansson <olof@lixom.net>
2019-01-12Merge tag 'integrator-fixes-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into fixesOlof Johansson1-2/+6
Fixes for the Integrator: - Handle failed allocations in the IM/PC bus attachment. - Use struct_size() for allocation. * tag 'integrator-fixes-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: integrator: impd1: use struct_size() in devm_kzalloc() gpio: pl061: handle failed allocations Signed-off-by: Olof Johansson <olof@lixom.net>
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