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2021-10-05ARM: imx_v6_v7_defconfig: enable bpf syscall and cgroup bpfMarcel Ziswiler1-0/+2
Enable CONFIG_BPF_SYSCALL and CONFIG_CGROUP_BPF to allow for systemd interoperability. This avoids the following failure on boot: [ 10.615914] systemd[1]: system-getty.slice: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05ARM: imx_v6_v7_defconfig: build imx sdma driver as moduleMarcel Ziswiler1-1/+1
Build CONFIG_IMX_SDMA as a module to avoid the following boot issue: [ 5.214751] imx-sdma 20ec000.sdma: Direct firmware load for imx/sdma/sdma-imx6q.bin failed with error -2 [ 5.215762] imx-sdma 20ec000.sdma: Falling back to sysfs fallback for: imx/sdma/sdma-imx6q.bin Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05ARM: imx_v6_v7_defconfig: rebuild default configurationMarcel Ziswiler1-27/+11
Run "make imx_v6_v7_defconfig; make savedefconfig" to rebuild imx_v6_v7_defconfig. This dropped the following nowadays obsolete configuration options: CONFIG_MTD_M25P80=y (got integrated into MTD_SPI_NOR) CONFIG_CS89x0=y (selected by CS89x0_PLATFORM) CONFIG_SMSC_PHY=y (selected by USB_NET_SMSC95XX) CONFIG_GPIO_MC9S08DZ60=y (depends on MACH_MX35_3DS) CONFIG_REGULATOR=y (selected by various stuff) CONFIG_MEDIA_CAMERA_SUPPORT=y (defaults to on if MEDIA_CAMERA) CONFIG_MEDIA_CONTROLLER=y (selected by various stuff) CONFIG_VIDEO_V4L2_SUBDEV_API=y (selected by various stuff) CONFIG_SND_SOC_PHYCORE_AC97=y CONFIG_SND_SOC_IMX_MC13783=y CONFIG_USB_EHCI_MXC=y CONFIG_USB_FSL_USB2=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05ARM: imx_v6_v7_defconfig: change snd soc tlv320aic3x to i2c variantMarcel Ziswiler1-1/+1
Change CONFIG_SND_SOC_TLV320AIC3X to CONFIG_SND_SOC_TLV320AIC3X_I2C. I did double check all current mainline device trees and they are all using the I2C rather than the SPI variant. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05ARM: imx_v6_v7_defconfig: enable mtd physmapMarcel Ziswiler1-0/+1
Enable CONFIG_MTD_PHYSMAP which is nowadays required for CONFIG_MTD_PHYSMAP_OF. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04ARM: tegra: nexus7: Enable USB OTG modeDmitry Osipenko1-2/+23
Nexus 7 has OTG-cable microUSB port, enable OTG mode. USB peripheral devices now can be connected to Nexus 7 using OTG adapter, switching USB port into host mode. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04ARM: tegra: Add new properties to USB PHY device-tree nodesDmitry Osipenko4-0/+22
Add new properties to USB PHYs needed for enabling USB OTG mode. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04ARM: tegra: Update Broadcom Bluetooth device-tree nodesDmitry Osipenko3-3/+12
The host-wakeup GPIO is now marked as deprecated in the broadcom-bluetooth device-tree binding, it's replaced with the host-wakeup interrupt. Update Tegra device-trees to the recent version of the Bluetooth binding. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04ARM: tegra: acer-a500: Correct compatible of ak8975 magnetometerDavid Heidelberg1-1/+1
The "ak,ak8975" compatible is not recognized by dt-bindings, it's deprecated. Use supported "asahi-kasei,ak8975" compatible. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04ARM: at91: add basic support for new SoC family lan966Kavyasree Kotagiri1-0/+9
This patch introduces Microchip LAN966 ARMv7 based SoC family of multiport gigabit AVB/TSN-capable ethernet switches. It supports two SKUs: 4-port LAN9662 with multiprotocol processing support and 8-port LAN9668 switch. LAN966 family includes copper and serial ethernet interfaces, peripheral interfaces such as PCIe, USB, TWI, SPI, UART, QSPI, SD/eMMC, Parallel Interface (PI) as well as synchronization and trigger inputs/outputs. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [nicolas.ferre@microchip.com: merged patches for this SoC introduction] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210831102138.2476-1-kavyasree.kotagiri@microchip.com Link: https://lore.kernel.org/r/20211004105926.5696-5-kavyasree.kotagiri@microchip.com
2021-10-04ARM: dts: at91: sama7g5ek: to not touch slew-rate for SDMMC pinsClaudiu Beznea1-0/+6
With commit c709135e576b ("pinctrl: at91-pio4: add support for slew-rate") and commit cbde6c823bfa ("pinctrl: at91-pio4: Fix slew rate disablement") the slew-rate is enabled by default for each configured pin. The datasheet specifies at chapter "Output Driver AC Characteristics" that HSIO drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate setting but are rather calibrated against an external 1% resistor mounted on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal frequency and the external load, it is possible to adjust their target output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled at the moment in device tree). Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com
2021-10-04ARM: dts: at91: sama7g5ek: use proper slew-rate settings for GMACsClaudiu Beznea1-6/+22
Datasheet chapter "EMAC Timings" specifies that while in 3.3V domain GMAC's MDIO pins should be configured with slew-rate enabled, while the data + signaling pins should be configured with slew-rate disabled when GMAC works in RGMII or RMII modes. The pin controller for SAMA7G5 sets the slew-rate as enabled for all pins. Adapt the device tree to comply with these. Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210915074836.6574-2-claudiu.beznea@microchip.com
2021-10-04ARM: at91: pm: preload base address of controllers in tlbClaudiu Beznea1-1/+24
In suspend/resume procedure for AT91 architecture different controllers (PMC, SHDWC, RAM, RAM PHY, SFRBU) are accessed to do the proper settings for power saving. Commit f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5") introduced the access to RAMC PHY controller for SAMA7G5. The access to this controller is done after RAMC ports are closed, thus any TLB walk necessary for RAMC PHY virtual address will fail. In the development branch this was not encountered. However, on current kernel the issue is reproducible. To solve the issue the previous mechanism of pre-loading the TLB with the RAMC PHY virtual address has been used. However, only the addition of this new pre-load breaks the functionality for ARMv5 based devices (SAM9X60). This behavior has been encountered previously while debugging this code and using the same mechanism for pre-loading address for different controllers (e.g. pin controller, the assumption being that other requested translations are replaced from TLB). To solve this new issue the TLB flush + the extension of pre-loading the rest of controllers to TLB (e.g. PMC, RAMC) has been added. The rest of the controllers should have been pre-loaded previously, anyway. Fixes: f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5") Depends-on: e42cbbe5c9a2 ("ARM: at91: pm: group constants and addresses loading") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210930154219.2214051-4-claudiu.beznea@microchip.com
2021-10-04ARM: at91: pm: group constants and addresses loadingClaudiu Beznea1-8/+9
Group constants and addresses loading. This commit prepares the field for the next one. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210930154219.2214051-3-claudiu.beznea@microchip.com
2021-10-04ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l railClaudiu Beznea1-0/+2
SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The 1.35V for DDR3L rail at run-time is selected by the proper configuration on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of configuration registers to provide proper voltages on its rail. Run-time configuration registers could be configured differently than suspend configuration register for MCP16502 (VSEL2 affects only run-time configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK switches to self-refresh. Even on self-refresh it needs to be powered by a 1.35V rail. Thus, make sure the PMIC is configured properly when system is suspended. Fixes: 7540629e2fc7 (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
2021-10-04ARM: dts: imx: change the spi-nor txHaibo Chen2-3/+3
Before commit 0e30f47232ab5 ("mtd: spi-nor: add support for DTR protocol"), for all PP command, it only support 1-1-1 mode, no matter the tx setting in dts. But after the upper commit, the logic change. It will choose the best mode(fastest mode) which flash device and spi-nor host controller both support. Though the spi-nor device on imx6sx-sdb/imx6ul(l/z)-14x14-evk board do not support PP-1-4-4/PP-1-1-4, but if tx is 4 in dts file, it will also impact the read mode selection. For the spi-nor device on the upper mentioned boards, they support read 1-4-4 mode and read 1-1-4 mode according to the device internal sfdp register. But qspi host controller do not support read 1-4-4 mode. so need to set the tx to 1, let the common code finally select read 1-1-4 mode, PP-1-1-1 mode. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Fixes: 0e30f47232ab ("mtd: spi-nor: add support for DTR protocol") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-30arm: kprobes: Make space for instruction pointer on stackMasami Hiramatsu1-0/+2
Since arm's __kretprobe_trampoline() saves partial 'pt_regs' on the stack, 'regs->ARM_pc' (instruction pointer) is not accessible from the kretprobe handler. This means if instruction_pointer_set() is used from kretprobe handler, it will break the data on the stack. Make space for instruction pointer (ARM_pc) on the stack in the __kretprobe_trampoline() for fixing this problem. Link: https://lkml.kernel.org/r/163163052262.489837.10327621053231461255.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-09-30kprobes: treewide: Make it harder to refer kretprobe_trampoline directlyMasami Hiramatsu1-3/+3
Since now there is kretprobe_trampoline_addr() for referring the address of kretprobe trampoline code, we don't need to access kretprobe_trampoline directly. Make it harder to refer by renaming it to __kretprobe_trampoline(). Link: https://lkml.kernel.org/r/163163045446.489837.14510577516938803097.stgit@devnote2 Suggested-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-09-30kprobes: treewide: Remove trampoline_address from kretprobe_trampoline_handler()Masami Hiramatsu1-2/+1
The __kretprobe_trampoline_handler() callback, called from low level arch kprobes methods, has the 'trampoline_address' parameter, which is entirely superfluous as it basically just replicates: dereference_kernel_function_descriptor(kretprobe_trampoline) In fact we had bugs in arch code where it wasn't replicated correctly. So remove this superfluous parameter and use kretprobe_trampoline_addr() instead. Link: https://lkml.kernel.org/r/163163044546.489837.13505751885476015002.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Tested-by: Andrii Nakryiko <andrii@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-09-30kprobes: treewide: Use 'kprobe_opcode_t *' for the code address in get_optimized_kprobe()Masami Hiramatsu1-3/+4
Since get_optimized_kprobe() is only used inside kprobes, it doesn't need to use 'unsigned long' type for 'addr' parameter. Make it use 'kprobe_opcode_t *' for the 'addr' parameter and subsequent call of arch_within_optimized_kprobe() also should use 'kprobe_opcode_t *'. Note that MAX_OPTIMIZED_LENGTH and RELATIVEJUMP_SIZE are defined by byte-size, but the size of 'kprobe_opcode_t' depends on the architecture. Therefore, we must be careful when calculating addresses using those macros. Link: https://lkml.kernel.org/r/163163040680.489837.12133032364499833736.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-09-30kprobes: treewide: Cleanup the error messages for kprobesMasami Hiramatsu1-1/+3
This clean up the error/notification messages in kprobes related code. Basically this defines 'pr_fmt()' macros for each files and update the messages which describes - what happened, - what is the kernel going to do or not do, - is the kernel fine, - what can the user do about it. Also, if the message is not needed (e.g. the function returns unique error code, or other error message is already shown.) remove it, and replace the message with WARN_*() macros if suitable. Link: https://lkml.kernel.org/r/163163036568.489837.14085396178727185469.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-09-30ARM: dts: exynos: use spaces instead of tabs around '='Krzysztof Kozlowski2-19/+19
Use spaces in Origen boards instead of tabs around '=' for simple property assignments, to match coding style. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210928084949.27939-13-krzysztof.kozlowski@canonical.com
2021-09-30ARM: dts: exynos: remove unneeded DVS voltages from PMIC on ArndaleKrzysztof Kozlowski1-3/+0
The S5M8767 PMIC does not require anymore a safe DVS voltage, if the DVS GPIO is not enabled. Although previously bindings required providing this safe DVS voltage, but since commit 04f9f068a619 ("regulator: s5m8767: Modify parsing method of the voltage table of buck2/3/4") this was ignored. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210928084949.27939-12-krzysztof.kozlowski@canonical.com
2021-09-29bpf, arm: Fix register clobbering in div/mod implementationJohan Almbladh1-0/+19
On ARM CPUs that lack div/mod instructions, ALU32 BPF_DIV and BPF_MOD are implemented using a call to a helper function. Before, the emitted code for those function calls failed to preserve caller-saved ARM registers. Since some of those registers happen to be mapped to BPF registers, it resulted in eBPF register values being overwritten. This patch emits code to push and pop the remaining caller-saved ARM registers r2-r3 into the stack during the div/mod function call. ARM registers r0-r1 are used as arguments and return value, and those were already saved and restored correctly. Fixes: 39c13c204bb1 ("arm: eBPF JIT compiler") Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2021-09-29soc: samsung: exynos-chipid: do not enforce built-inKrzysztof Kozlowski1-1/+0
After converting the Exynos ChipID and ASV driver to a module, allow to actually choose it to be a module, while being a default built-in. The side effect is that driver could be now entirely disabled even for kernel with ARCH_EXYNOS, but this is not a critical issue because driver is not necessary for the proper platform boot. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org> Tested-by: Sylwester Nawrocki <snawrocki@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20210919093114.35987-4-krzysztof.kozlowski@canonical.com
2021-09-28ARM: dts: rzg1: Add missing Ethernet PHY resetsGeert Uytterhoeven2-0/+4
Describe all Ethernet PHY reset GPIOs on RZ/G1 boards, to avoid relying solely on boot loaders to bring PHYs out of reset. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/e20b3643b4dc5f6c2a9e19d9544495c06075d9ff.1631177442.git.geert+renesas@glider.be
2021-09-28ARM: dts: r-mobile: Add missing Ethernet PHY resetsGeert Uytterhoeven2-0/+2
Describe all Ethernet PHY reset GPIOs on R-Mobile boards, to avoid relying solely on boot loaders to bring PHYs out of reset. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b41bf0098ff193fbff9fad04d00075ce1bea1986.1631177442.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Add compatible properties to uPD6061x Ethernet PHYsGeert Uytterhoeven2-0/+4
Add compatible values to Ethernet PHY subnodes representing Renesas uPD60610 or uPD60611 PHYs on RZ/A1 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/335a1dfea905369da683e122e41e08ca1c5f90f7.1631174218.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Add compatible properties to RTL8201FL Ethernet PHYsGeert Uytterhoeven1-0/+2
Add compatible values to Ethernet PHY subnodes representing Realtek RTL8201FL PHYs on RZ/A2 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/a23eca16869457684b0300379233e335b4e2047e.1631174218.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYsGeert Uytterhoeven2-0/+4
Add compatible values to Ethernet PHY subnodes representing SMSC LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/247dc2074dae149af07b6d014985ad30eb362eda.1631174218.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYsGeert Uytterhoeven4-0/+8
Add compatible values to Ethernet PHY subnodes representing Micrel KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/ce8ae6b199fa244315a008ae31891a808ca1948d.1631174218.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Add compatible properties to KSZ8081 Ethernet PHYsGeert Uytterhoeven1-0/+2
Add compatible values to Ethernet PHY subnodes representing Micrel KSZ8081 PHYs on RZ/G1 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/ec5c7dadf3c0fe5e47dfbae72fb435047203ad06.1631174218.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYsGeert Uytterhoeven9-0/+18
Add compatible values to Ethernet PHY subnodes representing Micrel KSZ8041 PHYs on RZ/G1 and R-Car Gen2 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/f9e26625924f90eff34fe6f6f02b15fa272c5d80.1631174218.git.geert+renesas@glider.be
2021-09-28ARM: dts: renesas: Fix SMSC Ethernet compatible valuesGeert Uytterhoeven4-4/+4
According to schematics, and confirmed by ID_REV register contents, the Ethernet controllers on various development board are not SMSC LAN9220, but different variants: - KZM-A9-Dual and KZM-A9-GT: LAN9221, - Bock-W and Marzen: LAN89218AQ. Update the compatible values accordingly. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/59c142176f795b3541c935df43ab11cecd77cc61.1631173813.git.geert+renesas@glider.be
2021-09-27ARM: smp: Enable THREAD_INFO_IN_TASKArd Biesheuvel7-2/+35
Now that we no longer rely on thread_info living at the base of the task stack to be able to access the 'current' pointer, we can wire up the generic support for moving thread_info into the task struct itself. Note that this requires us to update the cpu field in thread_info explicitly, now that the core code no longer does so. Ideally, we would switch the percpu code to access the cpu field in task_struct instead, but this unleashes #include circular dependency hell. Co-developed-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
2021-09-27ARM: smp: Store current pointer in TPIDRURO register if availableArd Biesheuvel12-2/+105
Now that the user space TLS register is assigned on every return to user space, we can use it to keep the 'current' pointer while running in the kernel. This removes the need to access it via thread_info, which is located at the base of the stack, but will be moved out of there in a subsequent patch. Use the __builtin_thread_pointer() helper when available - this will help GCC understand that reloading the value within the same function is not necessary, even when using the per-task stack protector (which also generates accesses via the TLS register). For example, the generated code below loads TPIDRURO only once, and uses it to access both the stack canary and the preempt_count fields. <do_one_initcall>: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} ee1d 4f70 mrc 15, 0, r4, cr13, cr0, {3} 4606 mov r6, r0 b094 sub sp, #80 ; 0x50 f8d4 34e8 ldr.w r3, [r4, #1256] ; 0x4e8 <- stack canary 9313 str r3, [sp, #76] ; 0x4c f8d4 8004 ldr.w r8, [r4, #4] <- preempt count Co-developed-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
2021-09-27ARM: smp: Free up the TLS register while running in the kernelArd Biesheuvel2-3/+15
To prepare for a subsequent patch that stores the current task pointer in the user space TLS register while running in the kernel, modify the set_tls and switch_tls routines not to touch the register directly, and update the return to user space code to load the correct value. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
2021-09-27ARM: smp: Pass task to secondary_start_kernelKeith Packard4-5/+12
This avoids needing to compute the task pointer in this function, which will no longer be possible once we move thread_info off the stack. Signed-off-by: Keith Packard <keithpac@amazon.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
2021-09-27gcc-plugins: arm-ssp: Prepare for THREAD_INFO_IN_TASK supportArd Biesheuvel6-18/+2
We will be enabling THREAD_INFO_IN_TASK support for ARM, which means that we can no longer load the stack canary value by masking the stack pointer and taking the copy that lives in thread_info. Instead, we will be able to load it from the task_struct directly, by using the TPIDRURO register which will hold the current task pointer when THREAD_INFO_IN_TASK is in effect. This is much more straight-forward, and allows us to declutter this code a bit while at it. Note that this means that ARMv6 (non-v6K) SMP systems can no longer use this feature, but those are quite rare to begin with, so this is a reasonable trade off. Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
2021-09-26arm: dts: vexpress: Fix motherboard bus 'interrupt-map'Rob Herring6-186/+94
Commit 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress boards. The problem is #address-cells size changed, but interrupt-map was not updated. This results in the timer interrupt (and all the other motherboard interrupts) not getting mapped. As the 'interrupt-map' properties are all just duplicates across boards, just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi. Strictly speaking, 'interrupt-map' is dependent on the parent interrupt controller, but it's not likely we'll ever have a different parent than GICv2 on these old platforms. If there was one, 'interrupt-map' can still be overridden. Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org Fixes: 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") Cc: Guillaume Tucker <guillaume.tucker@collabora.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-arm-kernel@lists.infradead.org Reported-by: Reported-by: "kernelci.org bot" <bot@kernelci.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-09-25lib/string: Move helper functions out of string.cKees Cook1-0/+1
The core functions of string.c are those that may be implemented by per-architecture functions, or overloaded by FORTIFY_SOURCE. As a result, it needs to be built with __NO_FORTIFY. Without this, macros will collide with function declarations. This was accidentally working due to -ffreestanding (on some architectures). Make this deterministic by explicitly setting __NO_FORTIFY and move all the helper functions into string_helpers.c so that they gain the fortification coverage they had been missing. Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Andy Lavr <andy.lavr@gmail.com> Cc: Nathan Chancellor <nathan@kernel.org> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Kees Cook <keescook@chromium.org>
2021-09-24ARM: dts: sun7i: A20-olinuxino-lime2: Fix ethernet phy-modeBastien Roucariès1-1/+1
Commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config") sets the RX/TX delay according to the phy-mode property in the device tree. For the A20-olinuxino-lime2 board this is "rgmii", which is the wrong setting. Following the example of a900cac3750b ("ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode") the phy-mode is changed to "rgmii-id" which gets the Ethernet working again on this board. Signed-off-by: Bastien Roucariès <rouca@debian.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210916081721.237137-1-rouca@debian.org
2021-09-23ARM: gemini: add device tree for ssi1328Corentin Labbe2-0/+139
The SSI 1328 is a NAS box running a SL3516 SoC. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23ARM: gemini: add device tree for edimax NS2502Corentin Labbe2-0/+149
The edimax NS2502 is a NAS box running a SL3516 SoC. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23ARM: dts: gemini: add labels for USB, IDE, flash and ethernetCorentin Labbe1-6/+6
Adding label will help simplify boards's dts. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-22ARM: dts: BCM5301X: Add DT for Asus RT-AC88UArınç ÜNAL2-0/+201
Hardware Info ------------- Processor - Broadcom BCM4709C0KFEBG dual-core @ 1.4 GHz Switch - BCM53012 in BCM4709C0KFEBG & external RTL8365MB DDR3 RAM - 512 MB Flash - 128 MB (ESMT F59L1G81LA-25T) 2.4GHz - BCM4366 4×4 2.4/5G single chip 802.11ac SoC 5GHz - BCM4366 4×4 2.4/5G single chip 802.11ac SoC Ports - 8 Ports, 1 WAN Ports Tested on OpenWrt on kernel 5.10 built with DSA driver. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-22entry: rseq: Call rseq_handle_notify_resume() in tracehook_notify_resume()Sean Christopherson1-1/+0
Invoke rseq_handle_notify_resume() from tracehook_notify_resume() now that the two function are always called back-to-back by architectures that have rseq. The rseq helper is stubbed out for architectures that don't support rseq, i.e. this is a nop across the board. Note, tracehook_notify_resume() is horribly named and arguably does not belong in tracehook.h as literally every line of code in it has nothing to do with tracing. But, that's been true since commit a42c6ded827d ("move key_repace_session_keyring() into tracehook_notify_resume()") first usurped tracehook_notify_resume() back in 2012. Punt cleaning that mess up to future patches. No functional change intended. Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210901203030.1292304-3-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-09-22ARM: OMAP2+: Drop unused old auxdata for dra7x_evm_mmc_quirk()Tony Lindgren1-27/+0
This is no longer used as dra7 uses sdhci-omap instead of omap_hsmmc, and the quirk is already implemented in the sdhci-omap driver. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-09-22ARM: imx_v6_v7_defconfig: enable fbMarcel Ziswiler1-0/+1
Enable CONFIG_FB which is nowadays required for CONFIG_DRM_PANEL_LVDS, CONFIG_DRM_PANEL_SIMPLE, CONFIG_DRM_PANEL_SEIKO_43WVF1G, CONFIG_FB_MODE_HELPERS, CONFIG_BACKLIGHT_PWM, CONFIG_BACKLIGHT_GPIO, CONFIG_FRAMEBUFFER_CONSOLE, CONFIG_LOGO, CONFIG_FONTS, CONFIG_FONT_8x8 and CONFIG_FONT_8x16. Fixes: f611b1e7624c ("drm: Avoid circular dependencies for CONFIG_FB") Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22ARM: dts: imx6qdl-pico: Fix Ethernet supportFabio Estevam1-0/+11
Currently, it is no longer possible to retrieve a DHCP address on the imx6qdl-pico board. This issue has been exposed by commit f5d9aa79dfdf ("ARM: imx6q: remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs"). Fix it by describing the qca,clk-out-frequency property as suggested by the commit above. Fixes: 98670a0bb0ef14bbb3 ("ARM: dts: imx6qdl: Add imx6qdl-pico support") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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