| Age | Commit message (Collapse) | Author | Files | Lines |
|
Pull ARM SoC fixes from Arnd Bergmann:
"Here are a couple of bug fixes, mostly for devicetree files
NXP i.MX:
- Use correct voltage on some i.MX8M board device trees to avoid
hardware damage
- Code fixes for a compiler warning and incorrect reference counting,
both harmless.
- Fix the i.MX8M SoC driver to correctly identify imx8mp
- Fix watchdog configuration in imx6ul-kontron device tree.
Broadcom:
- A small regression fix for the Raspberry-Pi firmware driver
- A Kconfig change to use the correct timer driver on Northstar
- A DT fix for the Luxul XWC-2000 machine
- Two more DT fixes for NSP SoCs
STmicroelectronics STI
- Revert one broken patch for L2 cache configuration
ARM Versatile Express:
- Fix a regression by reverting a broken DT cleanup
TEE drivers:
- MAINTAINERS: change tee mailing list"
* tag 'arm-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
Revert "ARM: sti: Implement dummy L2 cache's write_sec"
soc: imx8m: fix build warning
ARM: imx6: add missing put_device() call in imx6q_suspend_init()
ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram()
soc: imx8m: Correct i.MX8MP UID fuse offset
ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain
ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2
arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range
ARM: dts: NSP: Correct FA2 mailbox node
ARM: bcm2835: Fix integer overflow in rpi_firmware_print_firmware_revision()
MAINTAINERS: change tee mailing list
ARM: dts: NSP: Disable PL330 by default, add dma-coherent property
ARM: bcm: Select ARM_TIMER_SP804 for ARCH_BCM_NSP
ARM: dts: BCM5301X: Add missing memory "device_type" for Luxul XWC-2000
arm: dts: vexpress: Move mcc node back into motherboard node
|
|
Pull EFI fixes from Ingo Molnar:
- Fix build regression on v4.8 and older
- Robustness fix for TPM log parsing code
- kobject refcount fix for the ESRT parsing code
- Two efivarfs fixes to make it behave more like an ordinary file
system
- Style fixup for zero length arrays
- Fix a regression in path separator handling in the initrd loader
- Fix a missing prototype warning
- Add some kerneldoc headers for newly introduced stub routines
- Allow support for SSDT overrides via EFI variables to be disabled
- Report CPU mode and MMU state upon entry for 32-bit ARM
- Use the correct stack pointer alignment when entering from mixed mode
* tag 'efi-urgent-2020-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
efi/libstub: arm: Print CPU boot mode and MMU state at boot
efi/libstub: arm: Omit arch specific config table matching array on arm64
efi/x86: Setup stack correctly for efi_pe_entry
efi: Make it possible to disable efivar_ssdt entirely
efi/libstub: Descriptions for stub helper functions
efi/libstub: Fix path separator regression
efi/libstub: Fix missing-prototype warning for skip_spaces()
efi: Replace zero-length array and use struct_size() helper
efivarfs: Don't return -EINTR when rate-limiting reads
efivarfs: Update inode modification time for successful writes
efi/esrt: Fix reference count leak in esre_create_sysfs_entry.
efi/tpm: Verify event log header before parsing
efi/x86: Fix build with gcc 4
|
|
i.MX fixes for 5.8:
- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
trees.
- Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
- Fix watchdog configuration in imx6ul-kontron device tree.
- Fix one build warning seen on building soc-imx8m driver with
x86_64-randconfig.
- Add missing put_device() call for a couple of mach-imx PM functions.
* tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx8m: fix build warning
ARM: imx6: add missing put_device() call in imx6q_suspend_init()
ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram()
soc: imx8m: Correct i.MX8MP UID fuse offset
ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain
ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2
arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range
Link: https://lore.kernel.org/r/20200624111725.GA24312@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This pull request contains Broadcom ARM-based SoCs machine/Kconfig fixes
for 5.8, please pull the following:
- Matthew adds a missing select to permit the use of the standard ARM
SP804 timers on Norsthstar Plus (NSP)
* tag 'arm-soc/for-5.8/soc-fixes' of https://github.com/Broadcom/stblinux:
ARM: bcm: Select ARM_TIMER_SP804 for ARCH_BCM_NSP
Link: https://lore.kernel.org/r/20200619202250.19029-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.8, please pull the following:
- Rafal adds a missing 'device_type' property to the Luxul XWC-2000
required for the memory nodes to be correctly parsed by Linux
- Matthew provides two fixes for the NSP SoCs, one to disable the PL330
DMA controller by default since it can be left in reset by the
bootloader and the second to correct the flow accelerator mailbox node
* tag 'arm-soc/for-5.8/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: NSP: Correct FA2 mailbox node
ARM: dts: NSP: Disable PL330 by default, add dma-coherent property
ARM: dts: BCM5301X: Add missing memory "device_type" for Luxul XWC-2000
Link: https://lore.kernel.org/r/20200619202250.19029-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This reverts commit 7b8e0188fa717cd9abc4fb52587445b421835c2a.
Initially, STiH410-B2260 was supposed to be secured, that's why
l2c_write_sec was stubbed to avoid secure register access from
non secure world.
But by default, STiH410-B2260 is running in non secure mode,
so L2 cache register accesses are authorized, l2c_write_sec stub
is not needed.
With this patch, L2 cache is configured and performance are enhanced.
Link: https://lore.kernel.org/r/20200618172456.29475-1-patrice.chotard@st.com
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Few dts fixes for omaps for v5.8
Few fixes for various devices:
- Prevent pocketgeagle header line signal from accidentally setting
micro-SD write protection signal by removing the default mux
- Fix NFSroot flakeyness after resume for duover by switching the
smsc911x gpio interrupt to back to level sensitive
- Fix regression for omap4 clockevent source after recent system
timer changes
- Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
phy-mode
* tag 'omap-for-v5.8/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode
ARM: dts: Fix omap4 system timer source clocks
ARM: dts: Fix duovero smsc interrupt for suspend
ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect
Link: https://lore.kernel.org/r/pull-1592499282-121092@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Missed sdhci patch for am3 and am4
I forgot to send a pull request earlier for converting am3 and am4 to
use sdhci-omap driver instead of the old omap_hsmmc driver.
There was a display subsystem related suspend and resume regression found
recently and looks like I forgot to send a pull request for this patch
while debugging the regression. This patch has been tested without the
display subsystem, and has been in Linux next for several weeks now, so
would be good to have merged for v5.8.
* tag 'omap-for-v5.8/dt-missed-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Move am33xx and am43xx mmc nodes to sdhci-omap driver
Link: https://lore.kernel.org/r/pull-1591637467-607254@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Fixes for omaps for v5.8
The recent display subsystem (DSS) related platform data changes caused
display related regressions for suspend and resume. Looks like I only
tested suspend and resume before dropping the legacy platform data, and
forgot to test it after dropping it. Turns out the main issue was that
we no longer have platform code calling pm_runtime_suspend for DSS like
we did for the legacy platform data case, and that fix is still being
discussed on the dri-devel list and will get merged separately. The DSS
related testing exposed a pile other other display related issues that
also need fixing though:
- Fix ti-sysc optional clock handling and reset status checks
for devices that reset automatically in idle like DSS
- Ignore ti-sysc clockactivity bit unless separately requested
to avoid unexpected performance issues
- Init ti-sysc framedonetv_irq to true and disable for am4
- Avoid duplicate DSS reset for legacy mode with dts data
- Remove LCD timings for am4 as they cause warnings now that we're
using generic panels
Then there is a pile of other fixes not related to the DSS:
- Fix omap_prm reset deassert as we still have drivers setting the
pm_runtime_irq_safe() flag
- Flush posted write for ti-sysc enable and disable
- Fix droid4 spi related errors with spi flags
- Fix am335x USB range and a typo for softreset
- Fix dra7 timer nodes for clocks for IPU and DSP
- Drop duplicate mailboxes after mismerge for dra7
* tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Revert "bus: ti-sysc: Increase max softreset wait"
ARM: dts: am437x-epos-evm: remove lcd timings
ARM: dts: am437x-gp-evm: remove lcd timings
ARM: dts: am437x-sk-evm: remove lcd timings
ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
ARM: dts: Fix am33xx.dtsi USB ranges length
bus: ti-sysc: Increase max softreset wait
ARM: OMAP2+: Fix legacy mode dss_reset
bus: ti-sysc: Fix uninitialized framedonetv_irq
bus: ti-sysc: Ignore clockactivity unless specified as a quirk
bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
ARM: dts: omap4-droid4: Fix spi configuration and increase rate
bus: ti-sysc: Flush posted write on enable and disable
soc: ti: omap-prm: use atomic iopoll instead of sleeping one
Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
ARMv8 Juno/Vexpress/Fast Models fix for v5.8
Partial revert of some recent fixes to silence DTC warning which broke
clocks on some Vexpress platforms resulting in boot issues.
* tag 'juno-fix-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm: dts: vexpress: Move mcc node back into motherboard node
Link: https://lore.kernel.org/r/20200609180447.GB5732@bogus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
CLASSD is present on SAMA5d2 SoCs.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200618154147.687878-1-codrin.ciubotariu@microchip.com
|
|
The PDMIC needs PDM microphones to work. sama5d2 xplained doesn't have
such microphones, so there is no reason to enable PDMIC and take the
pins since there is no-one using them.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200618152845.682723-1-codrin.ciubotariu@microchip.com
|
|
Add RTT. Allong with it enable GBPR as it is requested by RTT.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1591779936-18577-4-git-send-email-claudiu.beznea@microchip.com
|
|
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1591736054-568-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
|
Fix dtschema warning message by changing nodename to 'cache-controller':
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml
arch/arm/boot/dts/exynos4210-i9100.dt.yaml: l2-cache-controller@10502000:
$nodename:0: 'l2-cache-controller@10502000' does not match '
^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
|
|
Now that we have a clock driver for the clocks exposed by the firmware,
let's add the device tree nodes for it.
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/9a6f113140b3115150bfb18ecb248a48d58562cf.1592210452.git-series.maxime@cerno.tech
|
|
The SDHCI on Tegra30 is in fact not backwards-compatible with the
instantiation found on earlier SoCs. Drop the misleading compatible
string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The display controller on Tegra30 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
This was probably left there by mistake or perhaps was a typo in the
first place. Remove it.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The DSI output needs to specify a parent clock that will be used to
drive both the output and the display controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
SRAM nodes should be named sram@<unit-address> to match the bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Seaboard uses a non-existing, possibly obsoleted, binding for the
battery. Move to the standard binding which seems to be a super-
set of the odl binding.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
LED nodes should be named led-* to match the bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Unit-addresses should be numeric. This fixes a validation failure seen
using the json-schema tooling.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Simple panels can only have a single power supply. The second listed
supply is not needed because it is also the input supply of the first
supply and therefore will always be on at the same time.
In retrospect the panel probably doesn't qualify as simple since it
apparently does need both of these supplies, even if in the case of the
Medcom Wide it isn't necessary to explicitly hook them up.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Use commas rather than underscores to separate the various parts of the
unit-address in CPU OPPs to make them properly validate under the json-
schema bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The Tegra SDHCI controllers need to have a clock-names property
according to the bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
This is purely to make the json-schema validation tools happy because
they cannot deal with string arrays that may be in arbitrary order.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The memory controller exposes a set of memory client resets and needs to
specify the #reset-cells property in order to advertise the number of
cells needed to describe each of the resets.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Both Nyan boards as well as Venice2 are missing panel power supplies.
Add them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Run the micro-USB A/B port on Jetson TK1 in host mode by default.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.
While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Ethernet device should be named "ethernet@<unit-address>".
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Audio codecs need a #sound-dai-cells property, so add one to the audio
codecs on various Tegra-based boards that don't have one.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
USB PHYs must have a #phy-cells property, so add one to the Tegra USB
PHYs which don't have one.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The SDHCI controller instantiated on Tegra114 is not backwards-
compatible with the version on Tegra30, so remove the corresponding
compatible string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The parent clocks are determined by the output that will be used, not by
the display controller that drives the output. On previous generations a
simple RGB output used to be part of the display controller and hence an
explicit parent clock needed to be assigned to the display controller to
drive the RGB output. Starting with Tegra124, that RGB output has been
dropped and the parent clock can therefore be removed from the display
controller device tree nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Don't use gcc plugins for building arch/arm/vdso/vgettimeofday.c to
avoid unneeded instrumentation. As previously discussed[1]:
arm_ssp_per_task_plugin.c
32-bit ARM only (but likely needs disabling for 32-bit ARM vDSO?)
cyc_complexity_plugin.c
compile-time reporting only
latent_entropy_plugin.c
this shouldn't get triggered for the vDSO (no __latent_entropy
nor __init attributes in vDSO), but perhaps explicitly disabling
it would be a sensible thing to do, just for robustness?
randomize_layout_plugin.c
this shouldn't get triggered (again, lacking attributes), but
should likely be disabled too.
sancov_plugin.c
This should be tracking the KCOV directly (see
scripts/Makefile.kcov), which is already disabled here.
structleak_plugin.c
This should be fine in the vDSO, but there's no security
boundary here, so it wouldn't be important to KEEP it enabled.
[1] https://lore.kernel.org/lkml/20200610073046.GA15939@willie-the-truck/
Signed-off-by: Alexander Popov <alex.popov@linux.com>
Link: https://lore.kernel.org/r/20200624123330.83226-3-alex.popov@linux.com
Signed-off-by: Kees Cook <keescook@chromium.org>
|
|
if of_find_device_by_node() succeed, imx6q_suspend_init() doesn't have a
corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
if of_find_device_by_node() succeed, imx_suspend_alloc_ocram() doesn't
have a corresponding put_device(). Thus add a jump target to fix the
exception handling for this function implementation.
Fixes: 1579c7b9fe01 ("ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The display controller on Tegra114 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The instantiation of gr3d in Tegra114 is not backwards-compatible with
the version found on earlier chips. Remove the misleading compatible
string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The instantiation of gr2d in Tegra114 is not backwards-compatible with
the version found on earlier chips. While the hardware IP is identical,
the compatible string also describes the integration of the IP, which
in the case of Tegra114 is slightly different in that it's part of the
HEG power partition, whereas it wasn't previously.
Drop the misleading compatible string so that drivers that support the
older integrations cannot match on it. Since they wouldn't be able to
control the power partition, such driver wouldn't be able to access any
of the registers of the IP.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The host1x device tree bindings require the clock- and interrupt-names
properties to be present, so add them where missing.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The host1x is not a simple bus, so drop the corresponding compatible
string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use
that instead of the wrong vdd-supply property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use
that instead of the wrong vdd-supply property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
This property is not documented and will cause a validation failure.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The standard way to do this is to list out the regulators at the top
level. Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|