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There are cases where a context synchronization event is necessary
between an IRQ being raised and being handled, and there are races such
that we cannot rely upon the exception entry being subsequent to the
interrupt being raised. To fix this, we place an ISB between a read of
IAR and the subsequent invocation of an IRQ handler.
When EOI mode 1 is in use, we need to EOI an interrupt prior to invoking
its handler, and we have a write to EOIR for this. As this write to EOIR
requires an ISB, and this is provided by the gic_write_eoir() helper, we
omit the usual ISB in this case, with the logic being:
| if (static_branch_likely(&supports_deactivate_key))
| gic_write_eoir(irqnr);
| else
| isb();
This is somewhat opaque, and it would be a little clearer if there were
an unconditional ISB, with only the write to EOIR being conditional,
e.g.
| if (static_branch_likely(&supports_deactivate_key))
| write_gicreg(irqnr, ICC_EOIR1_EL1);
|
| isb();
This patch rewrites the code that way, with this logic factored into a
new helper function with comments explaining what the ISB is for, as
were originally laid out in commit:
39a06b67c2c1256b ("irqchip/gic: Ensure we have an ISB between ack and ->handle_irq")
Note that since then, we removed the IAR polling in commit:
342677d70ab92142 ("irqchip/gic-v3: Remove acknowledge loop")
... which removed one of the two race conditions.
For consistency, other portions of the driver are made to manipulate
EOIR using write_gicreg() and explcit ISBs, and the gic_write_eoir()
helper function is removed.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220513133038.226182-3-mark.rutland@arm.com
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In the event that random_get_entropy() can't access a cycle counter or
similar, falling back to returning 0 is really not the best we can do.
Instead, at least calling random_get_entropy_fallback() would be
preferable, because that always needs to return _something_, even
falling back to jiffies eventually. It's not as though
random_get_entropy_fallback() is super high precision or guaranteed to
be entropic, but basically anything that's not zero all the time is
better than returning zero all the time.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
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Delete no longer needed properties of MediaTek Larbs for MT2701.
* tag 'v5.18-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: dts: mediatek: Get rid of mediatek, larb for MM nodes
Link: https://lore.kernel.org/r/b4383f23-0adc-b9de-a1d9-abd1c2f82b27@gmail.com
This concludes a cleanup that was started back in 2019, with an
incompatible DT binding change. Kernels before 5.18 can no longer
use the updated dtb from 5.19, and the drivers no longer parse the
old properties, which breaks compatibility with older dtb files.
Link: https://lore.kernel.org/lkml/1546318276-18993-2-git-send-email-yong.wu@mediatek.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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AT91 & LAN966 DT #1 for 5.19:
- at91: DT compliance updates to gic and dataflash nodes
- lan966: addition to many basic nodes for various peripherals
- lan966: Kontron KSwitch D10: support for this new board
and its network switch
* tag 'at91-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: kswitch-d10: enable networking
ARM: dts: lan966x: add switch node
ARM: dts: lan966x: add serdes node
ARM: dts: lan966x: add reset switch reset node
ARM: dts: lan966x: add MIIM nodes
ARM: dts: lan966x: add hwmon node
ARM: dts: lan966x: add basic Kontron KSwitch D10 support
ARM: dts: lan966x: add flexcom I2C nodes
ARM: dts: lan966x: add flexcom SPI nodes
ARM: dts: lan966x: add all flexcom usart nodes
ARM: dts: lan966x: add missing uart DMA channel
ARM: dts: lan966x: add sgpio node
ARM: dts: lan966x: swap dma channels for crypto node
ARM: dts: lan966x: rename pinctrl nodes
ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
ARM: dts: at91: use generic node name for dataflash
Link: https://lore.kernel.org/r/20220513162338.87717-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pull misc fixes from Andrew Morton:
"Seven MM fixes, three of which address issues added in the most recent
merge window, four of which are cc:stable.
Three non-MM fixes, none very serious"
[ And yes, that's a real pull request from Andrew, not me creating a
branch from emailed patches. Woo-hoo! ]
* tag 'mm-hotfixes-stable-2022-05-11' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
MAINTAINERS: add a mailing list for DAMON development
selftests: vm: Makefile: rename TARGETS to VMTARGETS
mm/kfence: reset PG_slab and memcg_data before freeing __kfence_pool
mailmap: add entry for martyna.szapar-mudlaw@intel.com
arm[64]/memremap: don't abuse pfn_valid() to ensure presence of linear map
procfs: prevent unprivileged processes accessing fdinfo dir
mm: mremap: fix sign for EFAULT error return value
mm/hwpoison: use pr_err() instead of dump_page() in get_any_page()
mm/huge_memory: do not overkill when splitting huge_zero_page
Revert "mm/memory-failure.c: skip huge_zero_page in memory_failure()"
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mvebu arm for 5.19 (part 1)
Fix typos in comment on orion5x files
* tag 'mvebu-arm-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
orion5x: fix typos in comments
Link: https://lore.kernel.org/r/87o801r2ss.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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mvebu dt for 5.19 (part 1)
Add the crypto module atsha204a node for the turis omnia (Armada 385 bases)
* tag 'mvebu-dt-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: turris-omnia: Add atsha204a node
Link: https://lore.kernel.org/r/87lev5r2rg.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable all the necessary network related nodes, wire the pinctrl
configurations, add the PHYs and connect them to the corresponding
network ports.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-14-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add the switch node and its 8 children ports. All are disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-13-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add the SerDes node. On the LAN966x SoC these SerDes are used to connect
network PHYs.
By default, that node is disabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-12-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add the switch reset node which will later be used by the switch driver.
The switch reset also resets the GPIO controller and the SGPIO
controller, thus it also has to be connectected to these nodes. This way
the reset will only issued once for the first device requesting the
reset.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-11-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add the MDIO controller nodes. The integrated PHYs are connected to the
second controller. This controller also takes care of the resets of the
integrated PHYs, thus it has two memory regions. The first controller
is routed to the external MDIO/MDC pins.
By default, they are disabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-10-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add the monitoring node which covers the temperature sensor as well as
the PWM controller and the FAN tacho input.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-9-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add basic support for the Kontron KSwitch D10 MMT. It comes in two
variants: "6G-2GS" which features 6 Gigabit copper ports and two SFP
cages and "8G" which features 6 Gigbabit copper ports (where two are
2.5G capable).
For now the following is supported and working:
- Kernel console
- SFP cages
- SPI
- SGPIO
- Watchdog
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
[claudiu.beznea: fixed conflict on Makefile]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-8-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add all I2C nodes of the flexcom IP blocks. The driver supports
FIFO, DMA or both combined. But the latter isn't working correctly.
Thus, skip the fifo-size property for now. DMA is doing single byte
reads in this case.
Keep the nodes disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-7-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add all the SPI nodes for the flexcom IP block. Keep them
disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-6-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add all the remaining usart nodes for the flexcom block. Although the
DMA channels are specified, DMA is not enabled by default because break
detection doesn't work with DMA.
Keep the nodes disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-5-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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The usart node of the flexcom3 block is missing the DMA channels. Add
it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-4-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Add the device tree node for the SGPIO IP block reused from the
SparX-5. Keep the node disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-3-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order
of the channels. Swap them to pass devicetree validation.
Fixes: 290deaa10c50 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-2-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220420194230.3415663-1-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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interrupt-parent is not to be used as a boolean property.
It is already present in the DT in the proper way it's supposed to be used:
interrupt-parent = <&gic>;
This is also reported by dtbs_check:
arch/arm/boot/dts/at91-sama7g5ek.dtb: interrupt-controller@e8c11000: interrupt-parent: True is not of type 'array'
From schema: /.local/lib/python3.8/site-packages/dtschema/schemas/interrupts.yaml
Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220503133127.64320-1-eugen.hristev@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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The node names should be generic, so use "flash" for dataflash nodes and
for cfi-flash.
Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220412105013.249793-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Crypto module atsha204a is available at i2c address 0x64. Module is used
for symmetric cryptography and provides also hardware random number
generator and OTP storage for device serial number and MAC addresses.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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AT91 & POLARFIRE SoC #1 for 5.19:
- Power Management: add possibility to implement
specific pm quirks for some SoCs
- Kconfig update for AT91 PIT64 and LAN966 low-level debugging
- sama5d2: add secure calls to OP-TEE and secure suspend
* tag 'at91-soc-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: debug: add lan966 support
ARM: at91: pm: add support for sama5d2 secure suspend
ARM: at91: add code to handle secure calls
ARM: at91: Kconfig: implement PIT64B selection
ARM: at91: pm: add quirks for pm
ARM: at91: pm: use kernel documentation style
ARM: at91: pm: introduce macros for pm mode replacement
ARM: at91: pm: keep documentation inline with structure members
Link: https://lore.kernel.org/r/20220513121701.77683-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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AC'97 was quite commonly used on at least i.MX designs so enable the
glue code that allows use of AC'97 with ASoC based designs to improve
testing coverage.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220513120632.168148-1-broonie@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- Enable essential PMIC and regulatro drivers for MT8195.
- Enable Arm arch timer for MT7629.
* tag 'v5.18-next-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: mediatek: select arch timer for mt7629
arm64: defconfig: enable some mt6360 PMIC drivers
arm64: defconfig: enable MT6359 regulator driver
Link: https://lore.kernel.org/r/3a6e5606-7b89-2ad8-7b45-21d3a4e9e706@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add support for low-level debugging on FLEXCOM USART of
LAN966 SoC.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220513092530.19213-1-kavyasree.kotagiri@microchip.com
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Comment typo fix.
* tag 'v5.19-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: fix typos in comments
Link: https://lore.kernel.org/r/4421093.ElGaqSPkdT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Naming and flag corrections.
* tag 'v5.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: rename pcfg_pull_default node name on rk3036
ARM: dts: rockchip: use generic node name for dma rk3036/rk322x
ARM: dts: rockchip: correct interrupt flags on rk3188 boards
Link: https://lore.kernel.org/r/6919636.31r3eYUQgx@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This reverts commit 90103611d573, which caused a new DTC warning
arch/arm/boot/dts/bcm953012hr.dts:57.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/bcm953012hr.dts:62.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@200000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/bcm953012hr.dts:66.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@600000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/bcm953012hr.dts:70.3-33: Warning (reg_format): /nand-controller@18028000/nand@0/partition@1000000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/bcm953012hr.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm953012hr.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm953012hr.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm953012hr.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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When running with OP-TEE, the suspend control is handled securely.
Suspend can be entered using PSCI support. Since the sama5d2 supports
multiple suspend modes, add a new CONFIG_ATMEL_SECURE_PM which will
send a SMC call to select the suspend mode at init time.
"atmel.pm_modes" boot argument is still supported for compatibility
purposes but the standby value is actually ignored since PSCI suspend
is used and it only support one mode (suspend).
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Since OP-TEE now has a more complete support for sama5d2, add necessary
code to perform SMC calls. The detection of OP-TEE is based on a
specific device-tree node path (/firmware/optee) such has done by some
other SoC. A check is added to avoid doing SMC calls without having
OP-TEE.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Implement PIT64B selection thus it will be available for the necessary
targets (at the moment SAM9X60 and SAMA7G5) w/o the necessity to
specify it via defconfig. With this the current CONFIG_TIMER_OF
dependency of PIT64B driver could be removed.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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SoCs supporting ULP0 or ULP1 modes and variants of Cadence Ethernet IP
(controlled by macb driver) may behave buggy when Wake-on-Lan (WoL) is
configured and WoL packet is received while in ULP0/ULP1. On some SoCs
Ethernet interface is not working after resume. On other SoCs the CPU
goes to abort on resume path when switching execution from internal SRAM
to DRAM. For ULP1 + WoL the issue is related a particular restart
sequence of the internal clocks when resuming. These clocks are
automatically managed by PMC and may happen that GMAC peripheral clock
is restarted few clock cycles before internal clocks causing blocking
of Ethernet's DMA. As a consequence Ethernet TX transactions are stopped
and RX transactions are partially stopped (packets are received by MAC,
RX counters incremented but the data is not transferred to DRAM). The
workaround for this is to disable Ethernet's peripheral clock when
going to ULP1. Same behavior has been reproduced on ULP0 for some
platforms (SAMA5D2, SAMA5D3) and the same workaround solves the issue.
The problem has been solved on pm.c as quirk to avoid polluting the
MACB driver with AT91 specific issues as this driver is generic to
multiple vendors.
At probe pointers to struct device_node are retrieved and on the
at91_pm_enter() the quirk specifics are applied: for all Ethernet
interfaces that were parsed the peripheral clocks are disabled. A
special handling is done for modes in dns_modes mask as these are
considered modes that blocks the system if WoL packet are received
but for which applying quirk will lead to not waking up on WoL
packets: in situation where Ethernet interface(s) has suspend mode
in dns_modes mask and Ethernet interface(s) is the only available
wakeup source the suspend is canceled.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Use kernel documentation style. Along with it fix the naming of
struct at91_pm_sfrbu_regs in documentation.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Introduce macros to replace standby/suspend mode if they depends on
controllers that failed to map (or other errors). Macros keep track
of the complementary mode to avoid having set the same AT91 PM mode
for both suspend and standby.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Move documentation of bu to keep the same order as in the structure
itself.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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swiotlb-xen uses very different ways to allocate coherent memory on x86
vs arm. On the former it allocates memory from the page allocator, while
on the later it reuses the dma-direct allocator the handles the
complexities of non-coherent DMA on arm platforms.
Unfortunately the complexities of trying to deal with the two cases in
the swiotlb-xen.c code lead to a bug in the handling of
DMA_ATTR_NO_KERNEL_MAPPING on arm. With the DMA_ATTR_NO_KERNEL_MAPPING
flag the coherent memory allocator does not actually allocate coherent
memory, but just a DMA handle for some memory that is DMA addressable
by the device, but which does not have to have a kernel mapping. Thus
dereferencing the return value will lead to kernel crashed and memory
corruption.
Fix this by using the dma-direct allocator directly for arm, which works
perfectly fine because on arm swiotlb-xen is only used when the domain is
1:1 mapped, and then simplifying the remaining code to only cater for the
x86 case with DMA coherent device.
Reported-by: Rahul Singh <Rahul.Singh@arm.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Rahul Singh <rahul.singh@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Tested-by: Rahul Singh <rahul.singh@arm.com>
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Obtain the new INTEL_FAM6 stuff required.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
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Many architectures have similar install.sh scripts.
The first half is really generic; it verifies that the kernel image
and System.map exist, then executes ~/bin/${INSTALLKERNEL} or
/sbin/${INSTALLKERNEL} if available.
The second half is kind of arch-specific; it copies the kernel image
and System.map to the destination, but the code is slightly different.
Factor out the generic part into scripts/install.sh.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nicolas Schier <n.schier@avm.de>
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The semantics of pfn_valid() is to check presence of the memory map for a
PFN and not whether a PFN is covered by the linear map. The memory map
may be present for NOMAP memory regions, but they won't be mapped in the
linear mapping. Accessing such regions via __va() when they are
memremap()'ed will cause a crash.
On v5.4.y the crash happens on qemu-arm with UEFI [1]:
<1>[ 0.084476] 8<--- cut here ---
<1>[ 0.084595] Unable to handle kernel paging request at virtual address dfb76000
<1>[ 0.084938] pgd = (ptrval)
<1>[ 0.085038] [dfb76000] *pgd=5f7fe801, *pte=00000000, *ppte=00000000
...
<4>[ 0.093923] [<c0ed6ce8>] (memcpy) from [<c16a06f8>] (dmi_setup+0x60/0x418)
<4>[ 0.094204] [<c16a06f8>] (dmi_setup) from [<c16a38d4>] (arm_dmi_init+0x8/0x10)
<4>[ 0.094408] [<c16a38d4>] (arm_dmi_init) from [<c0302e9c>] (do_one_initcall+0x50/0x228)
<4>[ 0.094619] [<c0302e9c>] (do_one_initcall) from [<c16011e4>] (kernel_init_freeable+0x15c/0x1f8)
<4>[ 0.094841] [<c16011e4>] (kernel_init_freeable) from [<c0f028cc>] (kernel_init+0x8/0x10c)
<4>[ 0.095057] [<c0f028cc>] (kernel_init) from [<c03010e8>] (ret_from_fork+0x14/0x2c)
On kernels v5.10.y and newer the same crash won't reproduce on ARM because
commit b10d6bca8720 ("arch, drivers: replace for_each_membock() with
for_each_mem_range()") changed the way memory regions are registered in
the resource tree, but that merely covers up the problem.
On ARM64 memory resources registered in yet another way and there the
issue of wrong usage of pfn_valid() to ensure availability of the linear
map is also covered.
Implement arch_memremap_can_ram_remap() on ARM and ARM64 to prevent access
to NOMAP regions via the linear mapping in memremap().
Link: https://lore.kernel.org/all/Yl65zxGgFzF1Okac@sirena.org.uk
Link: https://lkml.kernel.org/r/20220426060107.7618-1-rppt@kernel.org
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Reported-by: "kernelci.org bot" <bot@kernelci.org>
Tested-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Will Deacon <will@kernel.org>
Cc: <stable@vger.kernel.org> [5.4+]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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i.MX ARM device tree update for 5.19:
- New board support: PHYTEC phyGATE-Tauri-S, TQ-Systems MBa6UL,
LS1021A IoT board, Toradex Iris and Aster carrier, i.MX7D SMEGW01,
i.MXRT1050 EVK, Bosch ACC board.
- A series from Alexander Stein to update i.MX51 based digi-connectcore
board, regarding to DMA of UART devices, PMIC voltages, USB
vbus-supply and usbphy.
- A series of changes from David Jander and Oleksij Rempel to remove
prototype specific deprecated code not used in production from
i.MX6Q/DL Vicut1 board, and unify Vicut1 and Victgo variants to reduce
maintaining overhead.
- Quite some changes from different people to update imx6ull-colibri board
on various aspects, touchscreen, device tree overlays, NAND BCH geometry,
GPIO line names, FEC phy-supply, etc.
- A couple of changes from Fabio Estevam to switch imx6dl-plybas and
imx6ul-kontron-n6x1x-s to use standard 'uart-has-rtscts' property.
- A couple of patches from Li Yang to update IFC device compatible and
node name for LayerScape SoCs.
- Disable USB host to work around boot issue on imx6qdl-udoo board.
- A series from Max Krummenacher to update Colibri i.MX6DL device trees,
drop dedicated v1.1 DT, disable add-on accessories, cleanups, etc.
- Various random and small updates on i.MX28 and i.MX6 boards.
* tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (77 commits)
ARM: dts: imx6ull-colibri: improve pinctrl node names
ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsi
ARM: dts: imx6ull-colibri: add/update some comments
ARM: dts: imx6ull-colibri: fix nand bch geometry
ARM: dts: imx6ull-colibri: add support for toradex aster carrier boards
ARM: dts: imx6ull-colibri: add support for toradex iris carrier boards
ARM: dts: imx6ull-colibri: add gpio-line-names
ARM: dts: imx6ull-colibri: update device trees to support overlays
ARM: dts: imx6ull-colibri: update usdhc1 pixmux and signaling
ARM: dts: imx6ull-colibri: add touchscreen device nodes
ARM: dts: imx6ull-colibri: add phy-supply to fec
ARM: dts: imx6ull-colibri: change touch i2c parameters
ARM: dts: imx6ull-colibri: use pull-down for adc pins
ARM: dts: Add bosch acc board
ARM: dts: imx: Add i.MXRT1050-EVK support
ARM: dts: imx7d-smegw01: Add support for i.MX7D SMEGW01 board
ARM: dts: imx6qdl-udoo: Disable USB host to work around boot issues
ARM: dts: imx27: use new 'dma-channels' property
ARM: dts: imx6qdl-phytec: Add LED labels
ARM: dts: ls1021a: reduce the interrupt-map-mask
...
Link: https://lore.kernel.org/r/20220508033843.2773685-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Qualcomm ARM DT updates for v5.19
This contains a long overdue overhaul of the MSM8974 DeviceTrees,
aligning the style, structure and naming with what we've learned since
the introduction of this platform.
On top of this the Sony Rhine platform gained I2C masters, NFC and
pstore support and the Fairphone 2 gained touchscreen support.
For the new SDX65 platform reserved-memory nodes, rpmpd, SPMI, CPU
clocks, SDHCI controller, SMMU and TCSR mutex was added. As was the
initial DeviceTree for the related PMX65 PMIC.
MSM8226 gained VADC and RTC support and support for the ASUS ZenWatch 2
was added.
* tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (62 commits)
ARM: dts: qcom: msm8974-FP2: Add supplies for remoteprocs
ARM: dts: qcom: msm8974-FP2: Configure charger
ARM: dts: qcom: msm8974-FP2: Add support for touchscreen
ARM: dts: qcom: sdx55: Remove ipa interconnect node
ARM: dts: qcom: msm8974: Add missing license headers
ARM: dts: qcom: msm8974-FP2: Add mmc* aliases
ARM: dts: qcom: msm8974-FP2: We're msm8974pro
ARM: dts: qcom-msm8974*: Remove unnecessary include
ARM: dts: qcom-msm8974-rhine: Add pstore node
ARM: dts: qcom-msm8974-rhine: Add NFC and enable I2C hosts
ARM: dts: qcom-msm8974*: Clean up old GPIO declarations
ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI
ARM: dts: qcom-msm8974*: Enable IMEM unconditionally
ARM: dts: qcom-msm8974: Sort and clean up nodes
ARM: dts: qcom-msm8974: Convert ADSP to a MMIO device
ARM: dts: qcom-msm8974pro-*: Use the 8974pro name in DT filenames
ARM: dts: qcom-msm8974pro: Use &labels
ARM: dts: qcom-msm8974-castor: Use &labels
ARM: dts: qcom-msm8974-{"hon","am"}ami: Commonize and modernize the DTs
ARM: dts: qcom-msm8974-klte: Use &labels
...
Link: https://lore.kernel.org/r/20220509172125.313259-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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HiSilicon ARMv7 SoC updates for v5.19
- Add of_node_put to avoid the refcount leak
* tag 'hisi-armv7soc-for-5.19' of https://github.com/hisilicon/linux-hisi:
ARM: hisi: Add missing of_node_put after of_find_compatible_node
Link: https://lore.kernel.org/r/62762DF0.30602@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Qualcomm ARM defconfig updates for v5.19
This enables the Qualcomm random number generator and hardware crypto
drivers, as well as DebugFS support, in the qcom defconfig.
* tag 'qcom-defconfig-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: qcom_defconfig: enable debug fs support
ARM: qcom_defconfig: enable options for Qualcomm random number generator
Link: https://lore.kernel.org/r/20220509182209.317208-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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i.MX defconfig update for 5.19:
- Enable the WM8524 codec driver as module in arm64 defconfig for audio
support on imx8mn-evk board.
- Enable the ADC part of the STMPE MFD in imx_v6_v7_defconfig, as the
SoM Apalis/Colibri iMX6 use the ADC of a STMPE 811.
* tag 'imx-defconfig-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: defconfig: Enable the WM8524 codec driver
ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD
Link: https://lore.kernel.org/r/20220508033843.2773685-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The BeagleBone Black supports audio over HDMI, using a combination of the
DaVinci McASP (used for audio by a very large proportion of DaVinci systems
with audio support) and a TDA998x device driving the HDMI link (this is a
very widely used driver). Build both drivers as modules in multi_v7_defconfig
so they can be more easily included in testing.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220506222646.1671474-1-broonie@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- F1C100 improvements (SPI, MMC, timer, cpu, watchdog)
- SPI flash node for licheepi-nano
- enabled analogue audio on olinuxino-a64
- GPIO port regulators on teres-i
- remove undocumented property from nanopi
* tag 'sunxi-dt-for-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: nanopi: Remove input-name property
Link: https://lore.kernel.org/r/Yngton59OacOR2ht@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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