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2019-05-20ARM: dts: r7s9210: Add USB Host supportChris Brandt1-0/+66
Add EHCI and OHCI host support for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rskrza1: Add input switchesGeert Uytterhoeven1-0/+38
Add support for input switches SW1-3 on the Renesas RZ/A1 RSK+RZA1 development board. Note that this uses the IRQ interrupts, as the RZ/A1 GPIO controller does not include interrupt support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s72100: Add IRQC device nodeGeert Uytterhoeven1-0/+19
Enable support for the IRQC on RZ/A1H, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: shmobile: Remove GENERIC_PHY from shmobile_defconfigBiju Das1-1/+0
Remove the GENERIC_PHY config option from shmobile_defconfig, as it is selected by PHY_RCAR_GEN3_USB2. PHY_RCAR_GEN3_USB2 is enabled by the commit 0cd4f4f10245d1d9616e00245 ("ARM: shmobile: Enable PHY_RCAR_GEN3_USB2 in shmobile_defconfig"). Signed-off-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r8a779x: Configure PMIC IRQ pinmuxMarek Vasut6-1/+41
The PMIC IRQ line pin multiplexing configuration is missing from the DTs. Since the line is configured correctly by default, the system works fine. However, add the IRQ line pin multiplexing configuration for completeness. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: Add 48MHz USB clockChris Brandt1-0/+5
The RZ/A2M EVB has a 48MHz clock attached to USB_X1. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add USB clockChris Brandt1-0/+7
Add USB clock node. If present, this clock input must be 48MHz. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: add ethernet aliasesChris Brandt1-0/+2
Add ethernet aliases so u-boot can find the device nodes. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: Add SDHI supportChris Brandt1-0/+24
The RZ/A2M EVB supports 2 SD card slots. A micro SD slot on the CPU board, and a full SD card slot on the sub board. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: rza2mevb: Add Ethernet supportChris Brandt1-0/+50
The RZ/A2M EVB sub board has 2 Ethernet jacks on it. Set switch SW6_4 to ON to use Ethernet Ch-0 Set switch SW6_5 to ON to use Ethernet Ch-1 Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add SDHI supportChris Brandt1-0/+24
Add SDHI support for the R7S9210 (RZ/A2) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add RIIC supportChris Brandt1-0/+76
Add I2C support for the R7S9210 (RZ/A2) SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add Ethernet supportChris Brandt1-0/+25
Add Ethernet support for the RZ/A2 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: r7s9210: Add RSPIChris Brandt1-0/+45
Add RSPI support for RZ/A2 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20ARM: dts: sun8i-h3: Fix wifi in Beelink X2 DTJernej Skrabec1-0/+4
mmc1 node where wifi module is connected doesn't have properly defined power supplies so wifi module is never powered up. Fix that by specifying additional power supplies. Additionally, this STB may have either Realtek or Broadcom based wifi module. One based on Broadcom module also needs external clock to work properly. Fix that by adding clock property to wifi_pwrseq node. Fixes: e582b47a9252 ("ARM: dts: sun8i-h3: Add dts for the Beelink X2 STB") Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: r40: bananapi-m2-ultra: Remove regulator-always-onPablo Greco1-1/+0
Now that the regulators are tied to the GPIO bank, we can remove the unneeded regulator-always-on in reg_aldo2 Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: v40: bananapi-m2-berry: Add Bluetooth device nodePablo Greco1-0/+38
The AP6212 is based on the Broadcom BCM43430 or BCM43438. The WiFi side identifies as BCM43430, while the Bluetooth side identifies as BCM43438. The Bluetooth side is connected to UART3 in a 4 wire configuration. Same as the WiFi side, due to being the same chip and package, DLDO1 and DLDO2 regulator outputs from the PMIC provide overall power via VBAT and I/O power via VDDIO. The CLK_OUT_A clock output from the SoC provides the LPO low power clock at 32.768 kHz. This patch enables Bluetooth on this board, and also adds the missing LPO clock on the WiFi side. There is also a PCM connection for Bluetooth, but this is not covered here. The LPO clock is fed from CLK_OUT_A, which needs to be muxed on pin PI12. This can be represented in multiple ways. This patch puts the pinctrl property in the pin controller node. This is due to limitations in Linux, where pinmux settings, even the same one, can not be shared by multiple devices. Thus we cannot put it in both the WiFi and Bluetooth device nodes. Putting it the CCU node is another option, but Linux's CCU driver does not handle pinctrl. Also the pin controller is guaranteed to be initialized after the CCU, when clocks are available. And any other devices that use muxed pins are guaranteed to be initialized after the pin controller. Thus having the CLK_OUT_A pinmux reference be in the pin controller node is a good choice without having to deal with implementation issues. Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: v40: bananapi-m2-berry: Enable AHCIPablo Greco1-0/+18
Just like the Bananapi M2 Ultra, enable the ahci controller and the two regulators needed to activate it. Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: v40: bananapi-m2-berry: Enable HDMI outputPablo Greco1-0/+29
This patch adds the hdmi nodes to the Bananapi M2 Berry, the same way it was done to the Bananapi M2 Ultra Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC ethernet controllerPablo Greco1-0/+23
Just like the Bananapi M2 Ultra, the Bananapi M2 Berry has a Realtek RTL8211E RGMII PHY tied to the GMAC. The PMIC's DC1SW output provides power for the PHY, while the ALDO2 output provides I/O voltages on both sides. Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: v40: bananapi-m2-berry: Add GPIO pin-bank regulator suppliesPablo Greco1-0/+15
The bananapi-m2-berry has the PMIC providing voltage to all the pin-bank supply rails from its various regulator outputs, tie them to the pio node. Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: dts: sun8i: r40: bananapi-m2-ultra: Add GPIO pin-bank regulator suppliesPablo Greco1-0/+6
The bananapi-m2-ultra has the PMIC providing voltage to all the pin-bank supply rails from its various regulator outputs, tie them to the pio node. Signed-off-by: Pablo Greco <pgreco@centosproject.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-05-20ARM: imx: cpuidle-imx6sx: Restrict the SW2ISO increase to i.MX6SXFabio Estevam1-1/+2
Since commit 1e434b703248 ("ARM: imx: update the cpu power up timing setting on i.mx6sx") some characters loss is noticed on i.MX6ULL UART as reported by Christoph Niedermaier. The intention of such commit was to increase the SW2ISO field for i.MX6SX only, but since cpuidle-imx6sx is also used on i.MX6UL/i.MX6ULL this caused unintended side effects on other SoCs. Fix this problem by keeping the original SW2ISO value for i.MX6UL/i.MX6ULL and only increase SW2ISO in the i.MX6SX case. Cc: stable@vger.kernel.org Fixes: 1e434b703248 ("ARM: imx: update the cpu power up timing setting on i.mx6sx") Reported-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6sx-sdb: Assign corresponding power supply for LDOsAnson Huang3-3/+27
On i.MX6SX SDB board, vgen6 supplies vdd1p1/vdd2p5 LDO and sw2 supplies vdd3p0 LDO, this patch assigns corresponding power supply for vdd1p1/vdd2p5/vdd3p0 to avoid confusion by below log: vdd1p1: supplied by regulator-dummy vdd3p0: supplied by regulator-dummy vdd2p5: supplied by regulator-dummy With this patch, the power supply is more accurate: vdd1p1: supplied by VGEN6 vdd3p0: supplied by SW2 vdd2p5: supplied by VGEN6 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6sll-evk: Assign corresponding power supply for vdd3p0Anson Huang1-0/+4
On i.MX6SLL EVK board, sw2 supplies vdd3p0 LDO, this patch assigns corresponding power supply for vdd3p0 to avoid confusion by below log: vdd3p0: supplied by regulator-dummy With this patch, the power supply is more accurate: vdd3p0: supplied by SW2 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6sl-evk: Assign corresponding power supply for LDOsAnson Huang2-3/+15
On i.MX6SL EVK board, sw2 supplies vdd1p1/vdd2p5/vdd3p0 LDO, this patch assigns corresponding power supply for vdd1p1/vdd2p5/vdd3p0 to avoid confusion by below log: vdd1p1: supplied by regulator-dummy vdd3p0: supplied by regulator-dummy vdd2p5: supplied by regulator-dummy With this patch, the power supply is more accurate: vdd1p1: supplied by SW2 vdd3p0: supplied by SW2 vdd2p5: supplied by SW2 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx7d-sdb: Assign corresponding power supply for LDOsAnson Huang1-0/+8
On i.MX7D SDB board, sw2 supplies 1p0d/1p2 LDO, this patch assigns corresponding power supply for 1p0d/1p2 LDO to avoid confusion by below log: vdd1p0d: supplied by regulator-dummy vdd1p2: supplied by regulator-dummy With this patch, the power supply is more accurate: vdd1p0d: supplied by SW2 vdd1p2: supplied by SW2 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6qdl-sabresd: Assign corresponding power supply for LDOsAnson Huang2-3/+15
On i.MX6Q/DL SabreSD board, vgen5 supplies vdd1p1/vdd2p5 LDO and sw2 supplies vdd3p0 LDO, this patch assigns corresponding power supply for vdd1p1/vdd2p5/vdd3p0 to avoid confusion by below log: vdd1p1: supplied by regulator-dummy vdd3p0: supplied by regulator-dummy vdd2p5: supplied by regulator-dummy With this patch, the power supply is more accurate: vdd1p1: supplied by VGEN5 vdd3p0: supplied by SW2 vdd2p5: supplied by VGEN5 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6ul: add clock-frequency to CPU nodeAnson Huang2-0/+2
Add clock-frequency property to CPU node. Avoids warnings like "/cpus/cpu@0 missing clock-frequency property" for "arm,cortex-a7". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx7ulp-evk: Add backlight supportAnson Huang1-0/+20
This patch adds i.MX7ULP EVK board MIPI-DSI backlight support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx7ulp: Add tpm pwm supportAnson Huang1-0/+10
Add i.MX7ULP EVK board PWM support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx7s: Update coresight DT bindingsLeo Yan1-3/+3
CoreSight DT bindings have been updated, thus the old compatible strings are obsolete and the drivers will report warning if DTS uses these obsolete strings. This patch switches to the new bindings for CoreSight dynamic funnel and static replicator, so can dismiss warning during initialisation. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Fabio Estevam <festevam@gmail.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Update pinmux settings on M53MenloMarek Vasut1-38/+49
Update pinmux settings according to hardware team input. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Add GPIO line names on M53MenloMarek Vasut1-0/+72
Add meaningful GPIO line names for the board GPIOs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Add GPIO beeper on M53MenloMarek Vasut1-0/+12
Add GPIO beeper, to let the board produce beeps. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Add power GPIOs on M53MenloMarek Vasut1-0/+31
Add GPIO power button and GPIO poweroff, which is present on new hardware. These let the system power itself off on shutdown. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Select netdev trigger for Yellow LED on M53MenloMarek Vasut1-1/+1
The yellow LED is in the ethernet jack socket, bind it to netdev trigger to indicate ethernet activity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Add ethernet PHY reset on M53MenloMarek Vasut1-0/+1
Add ethernet PHY GPIO reset line, to let the kernel to reset the PHY. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Update USB configuration on M53MenloMarek Vasut1-4/+7
Turn USBH1 into Host and update the GPIO polarity of the regulator to match new hardware. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx53: Update UART configuration on M53MenloMarek Vasut1-0/+21
Enable flow control lines on UART1 and UART2, add matching pinmux entries. Add and enable UART3 with RS485 mode enabled on boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6qdl: Assign corresponding clocks instead of dummy clockAnson Huang1-2/+2
i.MX6Q/DL's WDOGs use IMX6QDL_CLK_IPG as clock root, assign IMX6QDL_CLK_IPG to them instead of IMX6QDL_CLK_DUMMY. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: dts: imx6sl: Assign corresponding clocks instead of dummy clockAnson Huang1-3/+3
i.MX6SL's KPP and WDOG use IMX6SL_CLK_IPG as clock root, assign IMX6SL_CLK_IPG to them instead of IMX6SL_CLK_DUMMY. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: imx_v6_v7_defconfig: Enable SIOX busUwe Kleine-König1-0/+3
Now that there is a board making use of this bus is available enable the siox code to increase compile coverage. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: imx_v6_v7_defconfig: Add GPIO_PCF857XAdam Ford1-0/+1
The imx6q-logicpd board has a PCF8575 connected to it, so this patch turns it on my default now. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-20ARM: rockchip: fix missing of_node_put calls in smp codeWen Yang2-2/+12
The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-rockchip/pm.c:269:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 259, but without a corresponding object release within this function. ./arch/arm/mach-rockchip/pm.c:275:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 259, but without a corresponding object release within this function ./arch/arm/mach-rockchip/platsmp.c:281:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 272, but without a corresponding object release within this function. ./arch/arm/mach-rockchip/platsmp.c:285:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 272, but without a corresponding object release within this function. ./arch/arm/mach-rockchip/platsmp.c:289:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 272, but without a corresponding object release within this function. ./arch/arm/mach-rockchip/platsmp.c:303:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 294, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Suggested-by: Heiko Stuebner <heiko@sntech.de> Cc: Russell King <linux@armlinux.org.uk> Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-20ARM: dts: raise GPU trip point temperature for speedy to 80 degCMatthias Kaehlcke1-0/+4
Raise the temperature of the GPU thermal trip point for speedy to 80°C. This is the value used by the downstream Chrome OS 3.14 kernel, the 'official' kernel for speedy. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-20ARM: dts: rockchip: raise GPU trip point temperatures for veyronMatthias Kaehlcke2-0/+12
The values match those used by the downstream Chrome OS 3.14 kernel, the 'official' kernel for veyron devices. Keep the critical trip point for speedy at 90°C as in the downstream configuration. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-20ARM: dts: rockchip: raise CPU trip point temperature for veyron to 100 degCMatthias Kaehlcke2-0/+9
This value matches what is used by the downstream Chrome OS 3.14 kernel, the 'official' kernel for veyron devices. Keep the temperature for 'speedy' at 90°C, as in the downstream kernel. Increase the temperature for a hardware shutdown to 125°C, which matches the downstream configuration and gives the system a chance to shut down orderly at the criticial trip point. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-20ARM: dts: rockchip: Make rk3288-veyron-minnie run at hs200Douglas Anderson1-4/+0
As some point hs200 was failing on rk3288-veyron-minnie. See commit 984926781122 ("ARM: dts: rockchip: temporarily remove emmc hs200 speed from rk3288 minnie"). Although I didn't track down exactly when it started working, it seems to work OK now, so let's turn it back on. To test this, I booted from SD card and then used this script to stress the enumeration process after fixing a memory leak [1]: cd /sys/bus/platform/drivers/dwmmc_rockchip for i in $(seq 1 3000); do echo "========================" $i echo ff0f0000.dwmmc > unbind sleep .5 echo ff0f0000.dwmmc > bind while true; do if [ -e /dev/mmcblk2 ]; then break; fi sleep .1 done done It worked fine. [1] https://lkml.kernel.org/r/20190503233526.226272-1-dianders@chromium.org Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-05-20ARM: dts: rockchip: Make rk3288-veyron-mickey's emmc work againDouglas Anderson1-4/+0
When I try to boot rk3288-veyron-mickey I totally fail to make the eMMC work. Specifically my logs (on Chrome OS 4.19): mmc_host mmc1: card is non-removable. mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0) mmc1: switch to bus width 8 failed mmc1: switch to bus width 4 failed mmc1: new high speed MMC card at address 0001 mmcblk1: mmc1:0001 HAG2e 14.7 GiB mmcblk1boot0: mmc1:0001 HAG2e partition 1 4.00 MiB mmcblk1boot1: mmc1:0001 HAG2e partition 2 4.00 MiB mmcblk1rpmb: mmc1:0001 HAG2e partition 3 4.00 MiB, chardev (243:0) mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0) mmc1: switch to bus width 8 failed mmc1: switch to bus width 4 failed mmc1: tried to HW reset card, got error -110 mmcblk1: error -110 requesting status mmcblk1: recovery failed! print_req_error: I/O error, dev mmcblk1, sector 0 ... When I remove the '/delete-property/mmc-hs200-1_8v' then everything is hunky dory. That line comes from the original submission of the mickey dts upstream, so presumably at the time the HS200 was failing and just enumerating things as a high speed device was fine. ...or maybe it's just that some mickey devices work when enumerating at "high speed", just not mine? In any case, hs200 seems good now. Let's turn it on. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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