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2014-04-02x86: Fix dumpstack_64 irq stack handlingSteven Rostedt (Red Hat)1-9/+10
Commit 2223f6f6eeaa "x86: Clean up dumpstack_64.c code" changed the irq_stack processing a little from what it was before. The irq_stack_end variable needed to be cleared after its first use. By setting irq_stack to the per cpu irq_stack and passing that to analyze_stack(), and then clearing it after it is processed, we can get back the original behavior. Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-04-02x86: Fix dumpstack_64 to keep state of "used" variable in loopSteven Rostedt (Red Hat)1-5/+5
Commit 2223f6f6eeaa "x86: Clean up dumpstack_64.c code" moved the used variable to a local within the loop, but the in_exception_stack() depended on being non-volatile with the ability to change it. By always re-initializing the "used" variable to zero, it would cause the in_exception_stack() to return the same thing each time, and cause the dump_stack loop to go into an infinite loop. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-04-01dt: Remove dangling "select PROC_DEVICETREE"Grant Likely1-1/+0
CONFIG_PROC_DEVICETREE has been removed from the tree. This commit removes a dangling select of the config symbol. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: Paul Bolle <pebolle@tiscali.nl> Cc: Rob Herring <rob.herring@linaro.org>
2014-04-01avr32: replace simple_strtoul() with kstrtoul()Ramkumar Ramachandra1-22/+26
simple_strtoul() is marked for obsoletion; use the newer and more pleasant kstrtoul() in its place. Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Signed-off-by: Ramkumar Ramachandra <artagnon@gmail.com> Signed-off-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
2014-03-31x86: Adjust irq remapping quirk for older revisions of 5500/5520 chipsetsNeil Horman1-9/+6
Commit 03bbcb2e7e2 (iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets) properly disables irq remapping on the 5500/5520 chipsets that don't correctly perform that feature. However, when I wrote it, I followed the errata sheet linked in that commit too closely, and explicitly tied the activation of the quirk to revision 0x13 of the chip, under the assumption that earlier revisions were not in the field. Recently a system was reported to be suffering from this remap bug and the quirk hadn't triggered, because the revision id register read at a lower value that 0x13, so the quirk test failed improperly. Given this, it seems only prudent to adjust this quirk so that any revision less than 0x13 has the quirk asserted. [ tglx: Removed the 0x12 comparison of pci id 3405 as this is covered by the <= 0x13 check already ] Signed-off-by: Neil Horman <nhorman@tuxdriver.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: x86@kernel.org Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1394649873-14913-1-git-send-email-nhorman@tuxdriver.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-31MIPS: CPC: Use __raw_ memory access functionsPaul Burton1-2/+2
The CPC registers use native endianness, so using plain readl & writel will produce incorrect results on big endian systems. Reported-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Reported-by: Keng Koh <keng.koh@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6657/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: CM: use __raw_ memory access functionsPaul Burton1-2/+2
The CM registers use native endianness, so using plain readl & writel will produce incorrect results on big endian systems. Reported-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6656/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Fix warning when including smp-ops.h with CONFIG_SMP=nPaul Burton1-3/+3
The gic_send_ipi_mask function declared in smp-ops.h takes a struct cpumask argument, but linux/cpumask.h is only included within an #ifdef CONFIG_SMP. Move the gic_ function declarations within that #ifdef too to fix warnings during build such as: In file included from arch/mips/fw/arc/init.c:15:0: /mnt/buildbot/kernel/mips/slave/mips-linux__allno_/build/arch/mips/include/asm/smp-ops.h:62:44: warning: 'struct cpumask' declared inside parameter list [enabled by default] extern void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action); Reported-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6655/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Malta: GIC IPIs may be used without MTPaul Burton1-8/+11
It's perfectly valid to use SMP on a non-MT CPU and use the GIC for IPIs. Set them up conditional upon CONFIG_MIPS_GIC_IPI rather than CONFIG_MIPS_MT_SMP. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Paul Burton <paul.burton@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/6654/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: smp-mt: Use common GIC IPI implementationPaul Burton2-22/+2
Rather than duplicating the GIC IPI send function, share the one already used by CONFIG_MIPS_CPS & CONFIG_MIPS_CMP. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Paul Burton <paul.burton@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/6653/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: smp-cmp: Remove incorrect core number probePaul Burton1-2/+1
This probing is already done by decode_configs as part of cpu_probe, and furthermore the implementation here was incorrect for any MT core with a number of VPEs other than 2. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6650/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Fix gigaton of warning building with microMIPS.Ralf Baechle18-84/+84
With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III mode through .set mips3 results in *lots* of warnings like {standard input}: Assembler messages: {standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension during a kernel build. Fixed by using .set arch=r4000 instead. This breaks support for building the kernel with binutils 2.13 which was supported for 32 bit kernels only anyway and 2.14 which was a bad vintage for MIPS anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Fix core number detection for MT coresPaul Burton1-1/+5
In cores which implement the MT ASE, the CPUNum in the EBase register is a concatenation of the core number & the VPE ID within that core. In order to retrieve the correct core number CPUNum must be shifted appropriately to remove the VPE ID bits. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6666/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: MT: core_nvpes function to retrieve VPE countPaul Burton1-0/+11
This function simply returns the number of VPEs present in the current core, or 1 if the core does not implement the MT ASE. In SMP kernels this will typically equal smp_num_siblings, however it will also be usable in UP kernels and helps prepare for the possibility of a heterogenous system where the VPE count is not the same across all cores. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6665/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Provide empty mips_mt_set_cpuoptions when CONFIG_MIPS_MT=nPaul Burton1-0/+5
Both the CONFIG_MIPS_CPS & CONFIG_MIPS_CMP SMP implementations call mips_mt_set_cpuoptions when preparing to start secondary CPUs. However both may be used without MT. Provide an empty inline function to prevent a link error in this case. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6647/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Lasat: Replace del_timer by del_timer_syncJulia Lawall1-1/+1
Use del_timer_sync to ensure that the timer is stopped on all CPUs before the driver exists. This change was suggested by Thomas Gleixner The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ declarer name module_exit; identifier ex; @@ module_exit(ex); @@ identifier r.ex; @@ ex(...) { <... - del_timer + del_timer_sync (...) ...> } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Cc: kernel-janitors@vger.kernel.org Cc: tglx@linutronix.de Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31MIPS: Malta: Setup PM I/O region on bootPaul Burton2-0/+18
This patch ensures that the kernel sets a sane base address for the PIIX4 PM I/O register region during boot. Without this the kernel may not successfully claim the region as a resource if the bootloader didn't configure the region. With this patch the kernel will always succeed with: pci 0000:00:0a.3: quirk: [io 0x1000-0x103f] claimed by PIIX4 ACPI The lack of the resource claiming is easily reproducible without this patch using current versions of QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Tested-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6641/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>