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2012-12-13blackfin: anomaly: add anomaly 16000030 for bf5xxSonic Zhang1-0/+1
Drivers common to both bf5xx and bf60x chip families may use this anomaly id. So add it to bf5xx header files also. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-08-17blackfin: add platform device for ad1836 machine driverScott Jiang1-0/+20
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-07-24bf561: add capabilities in adv7183_inputsScott Jiang1-0/+3
Add capabilities in adv7183_inputs to indicate that S_STD is supported. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-06-01Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtdLinus Torvalds1-3/+0
Pull mtd update from David Woodhouse: - More robust parsing especially of xattr data in JFFS2 - Updates to mxc_nand and gpmi drivers to support new boards and device tree - Improve consistency of information about ECC strength in NAND devices - Clean up partition handling of plat_nand - Support NAND drivers without dedicated access to OOB area - BCH hardware ECC support for OMAP - Other fixes and cleanups, and a few new device IDs Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to added include files next to each other. * tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits) mtd: mxc_nand: move ecc strengh setup before nand_scan_tail mtd: block2mtd: fix recursive call of mtd_writev mtd: gpmi-nand: define ecc.strength mtd: of_parts: fix breakage in Kconfig mtd: nand: fix scan_read_raw_oob mtd: docg3 fix in-middle of blocks reads mtd: cfi_cmdset_0002: Slight cleanup of fixup messages mtd: add fixup for S29NS512P NOR flash. jffs2: allow to complete xattr integrity check on first GC scan jffs2: allow to discriminate between recoverable and non-recoverable errors mtd: nand: omap: add support for hardware BCH ecc ARM: OMAP3: gpmc: add BCH ecc api and modes mtd: nand: check the return code of 'read_oob/read_oob_raw' mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw' mtd: m25p80: Add support for Winbond W25Q80BW jffs2: get rid of jffs2_sync_super jffs2: remove unnecessary GC pass on sync jffs2: remove unnecessary GC pass on umount jffs2: remove lock_super mtd: gpmi: add gpmi support for mx6q ...
2012-05-21blackfin: license: Change ADI BSD licenseSonic Zhang2-3/+2
Change ADI BSD license to standart 3 clause BSD license for some blackfin arch code requested by ADI Legal. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-05-13blackfin: Use the plat_nand default partition parserH Hartley Sweeten1-3/+0
Use the default partition parser, cmdlinepart, provided by the plat_nand driver. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-21bf561: add ppi DLEN macro for 10bits to 16bitsScott Jiang1-0/+7
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-03-21blackfin: bf561: forgot CSYNC in get_core_lock_noflushBob Liu1-0/+7
SMP kgdb runs into dead loop without this CSYNC when one core single steps over get_core_lock_noflush and the other executes get_core_lock as a slave node. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-03-21BF561 MDMA : fixed BF561 DMA MMRs definition mismatchSteven Miao1-110/+110
MDMA io base defined in arch/blackfin/mach-bf561/dma.c do not match the definition of MDMA MMRs in arch/blackfin/mach-bf561/include/mach/defBF561.h Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-01-09blackfin: bf561: add adv7183 capture supportBob Liu1-0/+95
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-01-09blackfin: i2c-lcd: change default clock rateAaron Wu1-1/+1
Change default clock rate of GPIO based I2C operation for BF533 and BF561 to bring up the I2C interface LCD display Signed-off-by: Aaron Wu <Aaron.Wu@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-01-09blackfin: config: update macro SPI_BFIN in board fileSonic Zhang3-7/+7
Macro name for spi controller driver has been modified, so update default board file accordingly. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-01-09blackfin: smp: cleanup smp codeBob Liu2-2/+4
move idle task point to percpu blackfin_cpudata and add smp_timer_broadcast interface. enable SUPPLE_1_WAKEUP and add BFIN_IPI_TIMER ipi support. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-01-09blackfin: smp: add suspend and wakeup irq flagsBob Liu1-1/+2
Add IRQF_NO_SUSPEND | IRQF_FORCE_RESUME to irq flags, supplement irq should not be disabled when system do suspend. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2011-11-14Blackfin: add serial TX IRQ in individual platform resourceSonic Zhang4-4/+24
The serial TX IRQ is not simply (RX IRQ + 1) on some Blackfin chips, so move the values to the platform resources. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bob Liu <lliubbo@gmail.com>
2011-10-26Blackfin: irq: remove IRQF_DISABLEDYong Zhang2-2/+2
This flag is a NOOP and can be removed now. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Acked-by: Bob Liu <lliubbo@kernel.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: gpio: punt unused GPIO_# definesMike Frysinger1-3/+3
These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: update anomaly lists to latest public infoMike Frysinger1-60/+72
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: optimize double fault boot checkingMike Frysinger1-24/+12
This moves the double fault data used at boot time into a single struct which can then easily be addressed with indexed loads rather than having to explicitly load multiple addresses. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: SMP: optimize start up code a bitMike Frysinger1-78/+54
This just imports all of the optimization work done in the common startup code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: boards: clean up redundant/dead spi resourcesMike Frysinger3-62/+0
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: net2272: move pin setup to boards filesMike Frysinger2-0/+46
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Blackfin: mach/bfin_serial_5xx.h: punt now-unused headerMike Frysinger1-52/+0
Now that the serial code has been unified in bfin_serial.h, and the Blackfin UART driver pushed its resources to the boards files, we don't need these headers anymore. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-27Merge git://git.infradead.org/mtd-2.6Linus Torvalds1-4/+0
* git://git.infradead.org/mtd-2.6: (97 commits) mtd: kill CONFIG_MTD_PARTITIONS mtd: remove add_mtd_partitions, add_mtd_device and friends mtd: convert remaining users to mtd_device_register() mtd: samsung onenand: convert to mtd_device_register() mtd: omap2 onenand: convert to mtd_device_register() mtd: txx9ndfmc: convert to mtd_device_register() mtd: tmio_nand: convert to mtd_device_register() mtd: socrates_nand: convert to mtd_device_register() mtd: sharpsl: convert to mtd_device_register() mtd: s3c2410 nand: convert to mtd_device_register() mtd: ppchameleonevb: convert to mtd_device_register() mtd: orion_nand: convert to mtd_device_register() mtd: omap2: convert to mtd_device_register() mtd: nomadik_nand: convert to mtd_device_register() mtd: ndfc: convert to mtd_device_register() mtd: mxc_nand: convert to mtd_device_register() mtd: mpc5121_nfc: convert to mtd_device_register() mtd: jz4740_nand: convert to mtd_device_register() mtd: h1910: convert to mtd_device_register() mtd: fsmc_nand: convert to mtd_device_register() ... Fixed up trivial conflicts in - drivers/mtd/maps/integrator-flash.c: removed in ARM tree - drivers/mtd/maps/physmap.c: addition of afs partition probe type clashing with removal of CONFIG_MTD_PARTITIONS
2011-05-25Blackfin: don't touch cpu_possible_map and cpu_present_map directlyKOSAKI Motohiro1-4/+10
We plan to remove cpu_possible_map and cpu_present_map later and we have proper init_cpu_possible() and init_cpu_present() APIs. Therefore this patch rewrites platform_init_cpus and platform_prepare_cpus by their APIs. Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: bf548-ezkit/bf561-ezkit: update nor flash layoutMike Frysinger1-1/+9
Both the BF548-EZKIT and the BF561-EZKIT use top boot flashes, so now that Das U-Boot uses the last small sector for its environment, update their nor layout in the kernel accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: update anomaly lists to latest public infoMike Frysinger1-3/+12
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: SMP: fix cpudata cache setupMike Frysinger1-3/+0
After some cache setup reordering changesets, the blackfin_cpudata init was left behind. While cpu0's data was correct, cpu1's data was not. Not that big of a deal as these are only used in the cpuinfo output, but should still be fixed. So move the setup of these fields to the common cache setup function to avoid this happening again in the future. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: bf533/bf537/bf561: convert to BFIN_IRQ helperMike Frysinger1-65/+64
This brings the parts in line with newer ones, and makes things easier to read at a glance. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: clean up style in irq definesMike Frysinger1-225/+154
These files had a lot of whitespace damage, mostly due to copying and pasting original files that had damage. The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so punt them all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: unify core IRQ definitionsMike Frysinger1-116/+1
Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25mtd: bfin: convert to mtd_device_register()Jamie Iles1-4/+0
Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS preprocessor conditionals as partitioning is always available. Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2011-03-29bfin: Final irq cleanupThomas Gleixner1-3/+3
Use the trigger type in irq_data and check level type instead of looking at desc->handle_irq. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: uclinux-dist-devel@blackfin.uclinux.org
2011-03-22Blackfin: SMP: flush CoreB cache when shutting downGraf Yang1-0/+9
When CoreB wakes up, it needs to read variables that CoreA might have modified, and might be in CoreB's cache. So kill CoreB's cache before going to sleep so that when we wake up, we are in a coherent state. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: convert to irq chip functionsMike Frysinger1-1/+5
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: use proper wrapper functions for modifying irq statusThomas Gleixner1-1/+1
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: work around anomaly 05000491Sonic Zhang2-10/+6
In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: implement cpu_freq supportGraf Yang2-29/+18
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: avoid section mismatch warningsSonic Zhang1-1/+1
Since coreb_trampoline_start() calls coreb_start(), they need to be in the same section. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: boards: add missing "static" to peripheral listsMike Frysinger4-4/+4
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: kgdb: apply anomaly 257 work aroundSonic Zhang1-1/+5
When run kgdb testing, it looks like coreb hangs in single step or trap exception without handling anomaly 05000257 properly on bf561 v0.5. But, the anomaly list says it apply to bf561 v0.4 and bellow. Apply its work around to 0.5 temporarily until the behavior and the root cause can be confirmed by the hardware team. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: kgdb: flush core internal write buffer before flushinvSonic Zhang1-0/+5
KGDB single step in SMP kernel may hang forever in flushinv without a CSYNC ahead. This is because the core internal write buffers need to be flushed before invalidating the data cache to make sure the insn fetch is not out of sync. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bf561: SMP: add multicore pll handlersMike Frysinger1-0/+53
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: unify pll.h headersMike Frysinger1-63/+1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: rewrite IPI handling to avoid memory allocationYi Li2-14/+19
Currently, sending an interprocessor interrupt (IPI) requires building up a message dynamically which means memory allocation. But often times, we will want to send an IPI in low level contexts where allocation is not possible which may lead to a panic(). So create a per-cpu static array for the message queue and use that instead. Further, while we have two supplemental interrupts, we are currently only using one of them. So use the second one for the most common IPI message of all -- smp_send_reschedule(). This avoids ugly contention for locks which in turn would require an IPI message ... In general, this improves SMP performance, and in some cases allows the SMP port to work in places it wouldn't before. Such as the PREEMPT_RT state where the slab is protected by a per-cpu spin lock. If the slab kmalloc/kfree were to put the task to sleep, and that task was actually the IPI handler, then the system falls down yet again. After running some various stress tests on the system, the static limit of 5 messages seems to work. On the off chance even this overflows, we simply panic(), and we can review that scenario to see if the limit needs to be increased a bit more. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bf561: fix mem_map.h SMP overridesGraf Yang1-7/+9
The BF561 mem_map.h header has the __ASSEMBLY__/CONFIG_SMP checks out of order which leads to build errors for assembly code that happens to include this file. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: tweak platform_request_ipi() usageGraf Yang2-2/+4
This function takes an irq_handler_t function, but the prototype in the header doesn't match the function definition. This is due to the smp headers needing to avoid circular dependencies. So change the function to take a simple pointer. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bf561: update a few more SIC_SYSCR locationsMike Frysinger2-14/+14
Looks like I missed a few new spots when renaming the SICA macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: drop asm/irq.h include from mach headersMike Frysinger1-3/+0
These were only included because of the irq handling of the PLL funcs, and those PLL funcs have been moved out into their own header now. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: clean up mach header includesMike Frysinger3-21/+9
The main asm/blackfin.h header will pull in mach/blackfin.h to get all the fun Blackfin defines. So having any of the sub-mach headers trying to include asm/blackfin.h makes no sense -- punt it. The mach/blackfin.h header takes care of including the part-specific def headers which in turn will include any other needed def file. Similarly, it takes care of pulling in the part-specific cdef header. So move this logic out of the blackfin.h when necessary. Further, make sure the cdef headers do not waste time including the def headers again. Since all parts need the common def/cdef headers, move this logic out of the part-specific headers and into the mach/blackfin.h file. Finally, we need to split the BF539 def header since the BF538 does not have MXVR and we don't want to expose those MMRs. So now all parts should have the same behavior: mach/blackfin.h asm/def_LPBlackfin.h part-specific def.h if ! asm asm/cdef_LPBlackfin.h part-specific cdef.h And the sub def/cdef headers only tail into what they need. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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