linux-dev - Linux kernel development work

Age	Commit message (Collapse)	Author	Files	Lines
2010-05-06	microblaze: Define correct L1_CACHE_SHIFT value	Michal Simek	1	-1/+1
	Microblaze cacheline length is configurable and current cpu uses two cacheline length 4 and 8. We are taking conservative maximum value to be sure that cacheline alignment is satisfied for all cases. Here is the calculation for cacheline lenght 8 32bit=4Byte values which is corresponding with SHIFT 5. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14	microblaze: Move cache macro from cache.h to cacheflush.h	Michal Simek	1	-16/+0
	Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-04-23	microblaze: Remove uncache shadow condition	Michal Simek	1	-5/+0
	Uncached shadow feature is not supported in current kernel code that's why I removed it. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27	microblaze_v8: cache support	Michal Simek	1	-0/+45
	Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>