linux-dev - Linux kernel development work

Age	Commit message (Collapse)	Author	Files	Lines
2011-09-21	MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD	Wu Zhangjin	1	-0/+1
	Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30	cpumask: remove references to struct irqaction's mask field.	Rusty Russell	1	-1/+0
	Impact: cleanup It's unused, since about 1995. So remove all initialization of it in preparation for actually removing the field. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Thomas Gleixner <tglx@linutronix.de>
2007-10-11	[MIPS] Add GT641xx IRQ routines.	Yoichi Yuasa	1	-87/+31
	Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11	[MIPS] cleanup struct irqaction initializers	Thomas Gleixner	1	-1/+3
	Signed-off-by: Thomas Gleixner <tglx@linutronix.de> CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-04-27	[MIPS] Cobalt: clean up include files	Yoichi Yuasa	1	-1/+1
	Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
2007-02-06	[MIPS] Define MIPS_CPU_IRQ_BASE in generic header	Atsushi Nemoto	1	-1/+1
	The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30	[MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITE	Yoichi Yuasa	1	-17/+14
	This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-09	[MIPS] Cleanup unnecessary <asm/ptrace.h> inclusions.	Ralf Baechle	1	-1/+0
	Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-08	[MIPS] Complete fixes after removal of pt_regs argument to int handlers.	Ralf Baechle	1	-32/+19
	Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19	[MIPS] Rewrite all the assembler interrupt handlers to C.	Ralf Baechle	1	-5/+1
	Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07	[MIPS] Rename include/asm-mips/cobalt to include/asm-mips/mach-cobalt.	Ralf Baechle	1	-1/+1
	Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29	Resurrect Cobalt support for 2.6.	Ralf Baechle	1	-38/+73
	Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-04-16	Linux-2.6.12-rc2	Linus Torvalds	1	-0/+102
	Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!