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2012-08-24MIPS: BCM63XX: remove bogus ENETSW_TXDMA interrupts from BCM6328Jonas Gorski1-4/+4
These were erroneously copied from BCM6368. BCM6328 does not expose the ENETSW_TXDMA interrupts, and BCM_6328_HIGH_IRQ_BASE + 7 is actually used for the second UART. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4090/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-24MIPS: BCM63XX: use a switch for external irq configMaxime Bizon1-3/+11
Makes the code a bit more readable and easier to add support for new chips. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4093/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-24MIPS: BCM63XX: don't write to the chipid register on rebootMaxime Bizon1-0/+3
While harmless, it is bad style to do so. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4092/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-24MIPS: BCM63XX: add external irq support for BCM6345Maxime Bizon3-2/+10
Add the missing definitions for BCM6345. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4091/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-23MIPS: PCI: Use PCI Express Capability accessorsJiang Liu1-10/+5
Use PCI Express Capability access functions to simplify MIPS PCIe code. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David Daney <david.daney@cavium.com>
2012-08-23MIPS: pci-ar724x: avoid data bus error due to a missing PCIe moduleGabor Juhos1-0/+22
If the controller has no PCIe module attached, accessing of the device configuration space causes a data bus error. Avoid this by checking the status of the PCIe link in advance, and indicate an error if the link is down. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4293/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-23MIPS: lantiq: adds support for gptu timersJohn Crispin2-1/+215
Lantiq socs have a General Purpose Timer Unit (GPTU). This driver allows us to initialize the timers. The voice firmware needs these timers as a reference. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4236/
2012-08-23MIPS: lantiq: enable pci clk conditional for xrx200 SoCJohn Crispin1-1/+2
The xrx200 SoC family has the same PCI clock register layout as the AR9. Enable the same quirk as for AR9 Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4235/
2012-08-23MIPS: lantiq: falcon clocks were not enabled properlyJohn Crispin1-0/+1
As a result of a non populated ->bits field inside the clock struct, the clock domains were never powered on the Falcon. Until now we only used domains that were also used and powered by the bootloader. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4234/
2012-08-23MIPS: lantiq: adds support for nmi and ejtag bootrom vectorsJohn Crispin1-0/+5
Register nmi and ejtag bootrom vectors for FALC-ON SoC. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4238/
2012-08-23MIPS: lantiq: external irq sources are not loaded properlyJohn Crispin1-1/+1
Support for the external interrupt unit was broken when the code was converted to devicetree support. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4231/
2012-08-23MIPS: lantiq: dont register irq_chip for the irq cascadeJohn Crispin1-0/+3
We dont want to register the irq_chip for the MIPS IRQ cascade. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4230/
2012-08-23MIPS: lantiq: timer irq can be different to 7John Crispin1-3/+16
The SVIP SoC has its timer IRQ on a different IRQ than 7. Fix up the irq code to be able to handle this. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4229/
2012-08-23MIPS: lantiq: split up IRQ IM rangesJohn Crispin3-28/+36
Up to now all our SoCs had the 5 IM ranges in a consecutive order. To accomodate the SVIP we need to support IM ranges that are scattered inside the register range. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4237/
2012-08-22MIPS: OCTEON: Add register definitions for SPI host hardware.David Daney1-0/+328
Needed by SPI driver. Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/3796/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: Fix build error for non-malta VSMP kernelAnoop P A1-0/+2
VSMP kernel build for non-malta platforms fails with following error LD init/built-in.o LD .tmp_vmlinux1 arch/mips/built-in.o: In function `vsmp_init_secondary': smp-mt.c:(.cpuinit.text+0x23cc): undefined reference to `gic_present' smp-mt.c:(.cpuinit.text+0x23d0): undefined reference to `gic_present' make: *** [.tmp_vmlinux1] Error 1 gic_present variable is declared only if IRQ_GIC is selected. Signed-off-by: Anoop P A <anoop.pa@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/2039/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: introduce CPU_R4K_CACHE_TLBFlorian Fainelli2-16/+5
R4K-style CPUs having common code to support their caches and tlb have this boolean defined by default. Allows us to remove some lines in arch/mips/mm/Makefile. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/3328/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: introduce CPU_R4K_FPUFlorian Fainelli2-18/+5
R4K-style CPUs have this boolean defined by default. Allows us to remove some lines in arch/mips/kernel/Makefile. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/3330/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: introduce CPU_GENERIC_DUMP_TLBFlorian Fainelli2-20/+5
Allows us not to duplicate more lines in arch/mips/lib/Makefile. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/3329/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: Netlogic: XLP defconfig updateJayachandran C1-43/+90
Enable more devices and options for XLP default configuration: - Serial ports from FDT - NOR Flash support and partitions from FDT - PCI and PCI bus support and devices - SATA, e1000e, sky2 - I2C ocores controller and devices - ds1374, lm90 - Misc options such as RTC, partition formats etc. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
2012-08-22MIPS: Netlogic: Add support for built in DTBJayachandran C5-1/+32
Provide a config option to embed a device tree for XLP evaluation boards. This DTB will be used if the firmware does not pass in a device tree pointer. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4103/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: Netlogic: Move serial ports to device treeJayachandran C3-109/+22
Add the serial ports to the device tree and remove the platform code for adding them. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4098/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: Netlogic: DTS file for XLP boardsGanesan Ramalingam1-0/+103
Add a basic DTS file netlogic/dts/nlm_xlp.dts which contains memory, i2c devices, NOR flash and command line arguments. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4100/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: Netlogic: merge of.c into setup.cJayachandran C3-35/+20
Move the function device_tree_init() from netlogic/xlp/of.c to setup.c, and remove the wrapper functions reserve_mem_mach() and free_mem_mach(). Remove file netlogic/xlp/of.c, and the Makefile entry for it. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4097/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: lantiq: explicitly enable clkout generationJohn Crispin1-0/+2
Previously we relied on the bootloader to have enabled this bit. However some bootloaders seem to not enable this for us. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4120/
2012-08-17MIPS: Malta: Delete duplicate PCI fixup.Ralf Baechle1-13/+0
2ec8663f9c03a96f2c328c7c483603c31d62ad37 (lmo) rsp. 497e5ff03f58583ada469db8a1aa34eced9dd63e (kernel.org) [MIPS: Malta: Move PIIX4 PCI fixup to where it belongs.] attempted to move this PCI fixup but really only added it at it's new location without deleting the old instance. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: ath79: don't hardcode the unavailability of the DSP ASEGabor Juhos1-1/+0
The ath79 platform code allows to run a single kernel image on various SoCs which are based on the 24Kc and 74Kc cores. The current code explicitely disables the DSP ASE, but that is available in the 74Kc core. Remove the override in order to let the kernel to detect the availability of the DSP ASE at runtime. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4222/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Synchronize MIPS count one CPU at a timeJayachandran C3-21/+17
The current implementation of synchronise_count_{master,slave} blocks slave CPUs in early boot until all of them come up. This no longer works because blocking a CPU with interrupts off after notifying the CPU to be online causes problems with the current kernel. Specifically, after the workqueue changes (commit a08489c569dc1 "Pull workqueue changes from Tejun Heo") the CPU_ONLINE notification callback workqueue_cpu_up_callback() will hang on wait_for_completion(&idle_rebind.done), if the slave CPUs are blocked for synchronize_count_slave(). The changes are to update synchronize_count_{master,slave}() to handle one CPU at a time and to call synchronise_count_master() in __cpu_up() so that the CPU_ONLINE notification goes out only after the COP0 COUNT register is synchronized. [ralf@linux-mips.org: This matter only to those few platforms which are using the cp0 counter as their clocksource which are XLP, XLR and MIPS' CMP solution.] Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4216/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348.Florian Fainelli3-3/+16
BCM6338 and BCM6348 have a message control register width of 8 bits, instead of 16-bits like what the SPI driver assumes right now. Also the SPI message type shift value of 14 is actually 6 for these SoCs. This resulted in transmit FIFO corruption because we were writing 16-bits to an 8-bits wide register, thus spanning on the first byte of the transmit FIFO, which had already been filed in bcm63xx_spi_fill_txrx_fifo(). Fix this by passing the message control register width and message type shift through platform data back to the SPI driver so that it can use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Cc: jonas.gorski@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/3983/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Module: Deal with malformed HI16/LO16 relocation sequences.Ralf Baechle1-7/+28
In case a series of R_MIPS_HI16 relocations was not followed by an R_MIPS_LO16 relocation we were leaking the hi16 relocation chain. Handle that error and return an error. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Fix race condition in module relocation code.Ralf Baechle2-7/+7
The relocation code was essentially taken from the 2.4 modutils which perform relocation in userspace. In 2.6 relocation of multiple modules may be performed in parallel by the in-kernel loader so the global variable mips_hi16_list won't fly anymore. Fix race by moving it into mod_arch_specific. [ralf@linux-mips.org: folded in Tony's followup fix. Thanks Tony!] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/4189/
2012-08-17MIPS: Fix memory leak in error path of HI16/LO16 relocation handling.Ralf Baechle1-2/+7
Commit 6f5d2e970452b5c86906adcb8e7ad246f535ba39 (lmo) / 477c4b07406357ad93d0e32788dbf3ee814eadaa (kernel.org) [[MIPS: VPE: Free relocation chain on error.] fixed the same issue in the vpe loader in 2009 but back then the same bug in module.c went unfixed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Akhilesh Kumar <akhilesh.lxr@gmail.com>
2012-08-17MIPS: MTX-1: Add udelay to mtx1_pci_idselBruno Randolf1-0/+2
Without this udelay(1) PCI idsel does not work correctly on the "singleboard" (T-Mobile Surfbox) for the MiniPCI device. The result is that PCI configuration fails and the MiniPCI card is not detected correctly. Instead of PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff] pci_bus 0000:00: root bus resource [io 0x1000-0xffff] pci 0000:00:03.0: BAR 0: assigned [mem 0x40000000-0x4000ffff] pci 0000:00:00.0: BAR 0: assigned [mem 0x40010000-0x40010fff] pci 0000:00:00.1: BAR 0: assigned [mem 0x40011000-0x40011fff] We see only the CardBus device: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff] pci_bus 0000:00: root bus resource [io 0x1000-0xffff] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x40000fff] pci 0000:00:00.1: BAR 0: assigned [mem 0x40001000-0x40001fff] Later the device driver shows this error: ath5k 0000:00:03.0: cannot remap PCI memory region ath5k: probe of 0000:00:03.0 failed with error -5 I assume that the logic chip which usually supresses the signal to the CardBus card has some settling time and without the delay it would still let the Cardbus interfere with the response from the MiniPCI card. What I cannot explain is why this behaviour shows up now and not in earlier kernel versions before. Maybe older PCI code was slower? Signed-off-by: Bruno Randolf <br1@einfach.org> Cc: linux-mips@linux-mips.org Cc: manuel.lauss@googlemail.com Cc: florian@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/4087/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: ath79: select HAVE_CLKGabor Juhos1-0/+1
It is needed in order to get rid of the following errors: arch/mips/ath79/clock.c:353:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/ath79/clock.c:377:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/ath79/clock.c:383:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/ath79/clock.c:388:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/ath79/clock.c:394:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4170/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240Gabor Juhos1-0/+2
The currently assigned IRQ number to the OHCI controller is incorrect for the AR7240 SoC, and that leads to the following error message from the OHCI driver: ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ath79-ohci ath79-ohci: Atheros built-in OHCI controller ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1 ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000 hub 1-0:1.0: USB hub found hub 1-0:1.0: 1 port detected usb 1-1: new full-speed USB device number 2 using ath79-ohci ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ. Fix this by using the correct IRQ number. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4168/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: ath79: Fix number of GPIO lines for AR724[12]Gabor Juhos2-3/+6
The AR724[12] SoCs have more GPIO lines than the AR7240. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Cc: linux-mips@linux-mips.org Patchwork: https://http://patchwork.linux-mips.org/patch/4167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Octeon: Fix broken interrupt controller code.David Daney2-55/+44
Since 3.6.0-rc1, We are getting many messages like: WARNING: at kernel/irq/irqdomain.c:444 irq_domain_associate_many+0x23c/0x260() Modules linked in: Call Trace: [<ffffffff814cb698>] dump_stack+0x8/0x34 [<ffffffff81133d00>] warn_slowpath_common+0x78/0xa8 [<ffffffff81187e44>] irq_domain_associate_many+0x23c/0x260 [<ffffffff81187f38>] irq_create_mapping+0xd0/0x220 [<ffffffff81188104>] irq_create_of_mapping+0x7c/0x158 [<ffffffff813e5f08>] irq_of_parse_and_map+0x28/0x40 . . . Both the CIU and GPIO interrupt domains were somewhat screwed up. For the CIU domain, we need to call irq_domain_associate() for each of the preassigned irq numbers. For the GPIO domain, we were applying the register bit offset in octeon_irq_gpio_xlat, but it should be done in octeon_irq_gpio_map instead. Also: Reserve all 8 'core' irqs for the 'core' irq_chip so that they don't get used by the other domains. Remove unused OCTEON_IRQ_* symbols. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4190/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-14MIPS: OCTEON: Fix breakage due to 8250 changes.David Daney1-15/+15
The changes in linux-next removing serial8250_register_port() cause OCTEON to fail to compile. Lets make OCTEON use the new serial8250_register_8250_port() instead. Signed-off-by: David Daney <david.daney@cavium.com> Cc: Alan Cox <alan@linux.intel.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-08-01Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds14-72/+108
Pull MIPS updates from Ralf Baechle: "The lion share of this pull request are fixes for clk-related breakage caused by other changes during this merge window. For some platforms the fix was as simple as selecting HAVE_CLK, for others like the Loongson 2 significant restructuring was required. The remainder are changes required to get the Lantiq code to work again." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Loongson 2: Sort out clock managment. MIPS: Loongson 1: more clk support and add select HAVE_CLK MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: Lantiq: Platform specific CLK fixup MIPS: Lantiq: Add device_tree_init function MIPS: Lantiq: Fix interface clock and PCI control register offset
2012-08-01MIPS: Loongson 2: Sort out clock managment.Ralf Baechle7-51/+33
For unexplainable reasons the Loongson 2 clock API was implemented in a module so fixing this involved shifting large amounts of code around. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: Loongson 1: more clk support and add select HAVE_CLKYoichi Yuasa2-0/+17
This fixes a redefinition of clk_*: arch/mips/loongson1/common/clock.c:23:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/loongson1/common/clock.c:41:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here make[3]: *** [arch/mips/loongson1/common/clock.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Acked-by: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLKYoichi Yuasa1-0/+1
arch/mips/txx9/generic/setup.c:87:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/txx9/generic/setup.c:97:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/txx9/generic/setup.c:103:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/txx9/generic/setup.c:108:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/txx9/generic/setup.c:114:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here make[3]: *** [arch/mips/txx9/generic/setup.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4142/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLKYoichi Yuasa1-0/+1
arch/mips/bcm63xx/clk.c:249:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/bcm63xx/clk.c:259:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/bcm63xx/clk.c:268:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/bcm63xx/clk.c:275:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/bcm63xx/clk.c:302:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here make[2]: *** [arch/mips/bcm63xx/clk.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4141/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLKYoichi Yuasa1-0/+1
arch/mips/ar7/clock.c:420:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/ar7/clock.c:426:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/ar7/clock.c:431:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/ar7/clock.c:437:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/ar7/clock.c:454:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here make[2]: *** [arch/mips/ar7/clock.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4140/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: Lantiq: Platform specific CLK fixupJohn Crispin1-0/+5
As we use CLKDEV_LOOKUP but dont have support for COMMON_CLK yet, we need to provide our own version of of_clk_get_from_provider(). Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4117/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: Lantiq: Add device_tree_init functionJohn Crispin1-0/+22
Add a lantiq specific version of device_tree_init. The generic MIPS version was removed by. commit 594e966bc412d64eec9282d28ce511bdd62fea39 Author: David Daney <david.daney@cavium.com> Date: Thu Jul 5 18:12:38 2012 +0200 MIPS: Prune some target specific code out of prom.c Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4116/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01MIPS: Lantiq: Fix interface clock and PCI control register offsetJohn Crispin1-21/+28
The XRX200 based SoC have a different register offset for the interface clock and PCI control registers. This patch detects the SoC and sets the register offset at runtime. This make PCI work on the VR9 SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4113/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-31mips: zero out pg_data_t when it's allocatedMinchan Kim1-0/+1
This patch is preparation for the next patch which removes the zeroing of the pg_data_t in core MM. All archs except MIPS already do this. Signed-off-by: Minchan Kim <minchan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-30Merge branch 'akpm' (Andrew's patch-bomb)Linus Torvalds2-1/+2
Merge Andrew's first set of patches: "Non-MM patches: - lots of misc bits - tree-wide have_clk() cleanups - quite a lot of printk tweaks. I draw your attention to "printk: convert the format for KERN_<LEVEL> to a 2 byte pattern" which looks a bit scary. But afaict it's solid. - backlight updates - lib/ feature work (notably the addition and use of memweight()) - checkpatch updates - rtc updates - nilfs updates - fatfs updates (partial, still waiting for acks) - kdump, proc, fork, IPC, sysctl, taskstats, pps, etc - new fault-injection feature work" * Merge emailed patches from Andrew Morton <akpm@linux-foundation.org>: (128 commits) drivers/misc/lkdtm.c: fix missing allocation failure check lib/scatterlist: do not re-write gfp_flags in __sg_alloc_table() fault-injection: add tool to run command with failslab or fail_page_alloc fault-injection: add selftests for cpu and memory hotplug powerpc: pSeries reconfig notifier error injection module memory: memory notifier error injection module PM: PM notifier error injection module cpu: rewrite cpu-notifier-error-inject module fault-injection: notifier error injection c/r: fcntl: add F_GETOWNER_UIDS option resource: make sure requested range is included in the root range include/linux/aio.h: cpp->C conversions fs: cachefiles: add support for large files in filesystem caching pps: return PTR_ERR on error in device_create taskstats: check nla_reserve() return sysctl: suppress kmemleak messages ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSION ipc: compat: use signed size_t types for msgsnd and msgrcv ipc: allow compat IPC version field parsing if !ARCH_WANT_OLD_COMPAT_IPC ipc: add COMPAT_SHMLBA support ...
2012-07-30ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSIONWill Deacon2-1/+1
Rather than #define the options manually in the architecture code, add Kconfig options for them and select them there instead. This also allows us to select the compat IPC version parsing automatically for platforms using the old compat IPC interface. Reported-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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