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path: root/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts (follow)
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2010-05-24powerpc/85xx: Change MPC8572DS camp dtses for MSI sharingLi Yang1-5/+2
Enable the sharing of MSI interrupt through AMP OSes in the mpc8572ds dtses. Signed-off-by: Zhao Chenhui <b26998@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/fsl: Removed reg property from 85xx/86xx soc nodeKumar Gala1-1/+0
Between the addition of the ecm/mcm law nodes and the fact that the get_immrbase() has been using the range property of the SoC to determine the base address of CCSR space we no longer need the reg property at the soc node level. It has been ill specified and varied between device trees to cover either the {e,m}cm-law node, some odd subset of CCSR space or all of CCSR space. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/fsl: Remove cell-index from PCI nodesKumar Gala1-1/+0
The cell-index property isn't used on PCI nodes and is ill defined. Remove it for now and if someone comes up with a good reason and consistent definition for it we can add it back Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-11powerpc/85xx: Fix MPC8572DS PCI protected interrupt sourcesTed Peters1-1/+1
The PCI irqs for the protected sources where not correct for PCI PHBs Signed-off-by: Ted Peters <ted.peters@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-11powerpc/85xx: Fixed PCI IO region sizes in mpc8572ds*.dtsKumar Gala1-2/+2
The PCI IO region sizes where incorrectly set to 1M instead of 64k. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-07powerpc/85xx: Fix PCIe error interruptsKumar Gala1-1/+1
The PCIe interrupts for 8544ds and 8572ds were incorrect. The 8572 case was found by Liu Yu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-12-03powerpc/85xx: Create dts for each core in CAMP mode for MPC8572DSHaiying Wang1-0/+234
This patch creates the dts files for each core and splits the devices between the two cores for MPC8572DS. core0 has memory, L2, i2c, dma1, global-util, eth0, eth1, crypto, pci0, pci1. core1 has L2, dma2, eth2, eth3, pci2, msi. MPIC is shared between two cores but each core will protect its interrupts from other core by using "protected-sources" of mpic. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>