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path: root/arch/powerpc/perf/power9-events-list.h (follow)
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2019-05-03powerpc/perf: Remove PM_BR_CMPL_ALT from power9 event listMadhavan Srinivasan1-2/+0
PM_BR_CMPL_ALT event is not supported, remove it from the power9 event list. Fixes: 24bedcb7c811 ("powerpc/perf: Fix branch event code for power9") Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2019-01-31powerpc/perf: Add mem access events to sysfsMadhavan Srinivasan1-0/+24
Add mem-loads/mem-stores events to sysfs. The event is formed based on raw event encoding. Primary PMU event used here is PM_MRK_INST_CMPL along with MMCRA[SM] modes and Thresholding bit Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-03-27powerpc/perf: Add blacklisted events for Power9 DD2.2Madhavan Srinivasan1-0/+15
These events either do not count, or do not count correctly, so to prevent user confusion block counting them at all. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> [mpe: Change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-03-27powerpc/perf: Add blacklisted events for Power9 DD2.1Madhavan Srinivasan1-0/+13
These events either do not count, or do not count correctly, so to prevent user confusion block counting them at all. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> [mpe: Change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-10powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in Power9 event listMadhavan Srinivasan1-1/+1
Fixes: 34922527a2bc ("powerpc/perf: Add power9 event list macros for generic and cache events") Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-10powerpc/perf: Add PM_LD_MISS_L1 and PM_BR_2PATH to power9 event listMadhavan Srinivasan1-0/+7
Add couple of more events (PM_LD_MISS_L1 and PM_BR_2PATH) to power9 event list and power9_event_alternatives array (these events can be counted in more than one PMC). Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-07-12powerpc/perf: Add POWER9 alternate PM_RUN_CYC and PM_RUN_INST_CMPL eventsAnton Blanchard1-0/+4
Similar to POWER8, POWER9 can count run cycles and run instructions completed on more than one PMU. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-06-28powerpc/perf: Fix branch event code for power9Madhavan Srinivasan1-1/+3
Correct "branch" event code of Power9 is "r4d05e". Replace the current "branch" event code with "r4d05e" and add a hack to use "r10012" as event code for Power9 DD1. Fixes: d89f473ff6f8 ("powerpc/perf: Fix PM_BRU_CMPL event code for power9") Reported-by: Anton Blanchard <anton@samba.org> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-17powerpc/perf: Add PM_INST_DISP event to Power9 event listMadhavan Srinivasan1-0/+3
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-18powerpc/perf: Fix PM_BRU_CMPL event code for power9Madhavan Srinivasan1-1/+1
Use 0x10012 event code for PM_BRU_CMPL event in power9 event list instead of current 0x40060. Fixes: 34922527a2bcb ('powerpc/perf: Add power9 event list macros for generic and cache events') Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-08-04powerpc/perf: Fix incorrect event codes in power9-event-listMadhavan Srinivasan1-3/+3
These have been changed in the hardware, update Linux's version. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-05powerpc/perf: Add power9 event list macros for generic and cache eventsMadhavan Srinivasan1-0/+55
Add macros for the generic and cache events on Power9 Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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